This paper proposes the design of a low group delay and low power ultra-wideband (UWB) power amplifier (PA) in 0.18μm CMOS technology. The PA design employs two stages cascade with inductive peaking technique to provide broad bandwidth characteristic and higher gain while gain flatness can be achieved by connecting inter-stage circuit. A common gate current-reused technique is adopted at the first stage amplifier to achieve good input matching, low group delay and low power. The simulation results show that the proposed PA design has an average gain of 11.5dB with flatness of ±0.4dB from 5–11GHz, while maintaining bandwidth of 4.2–12.3GHz. An input return loss (S11) less than −10.4dB and output return loss (S22) less than −9.5dB, respectively are obtained. The PA design achieves excellent phase linearity (i.e., group delay variation) of ±41ps and only consuming 17mW power from 1.2V supply voltage. A good output 1-dB compression point OP1dB of 3.7dBm is obtained. By using this method, the proposed design has low group delay variation and lowest power among the recently reported UWB CMOS PAs applications.
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