The Compact Muon Solenoid (CMS) experiment at the Large Hadron Collider (LHC) at CERN will undergo a major upgrade for the high-luminosity phase of the LHC (HL-LHC), which is expected to start in 2029 (Aberle et al., 2020 [1]). In addition to improving the detector rate capabilities and performance at increased higher luminosity, precision timing measurements are added to mitigate pile-up effects. The timing detector currently under construction covers pseudo-rapidity up to η=3 (The Phase-2 Upgrade of the CMS Tracker, 2017 [2]) . A possible pathway for further improvements is the extension of timing capabilities to cover the full tracker acceptance up to η=4. Low Gain Avalanche Detectors (LGAD) pixels have been shown to be a suitable candidate for replacing a part of the pixel detector end-caps during a future Long Shutdown or Year-End Technical Stop of the LHC. Here, we present preliminary results of our design efforts towards a readout Application-specific integrated circuit (ASIC) capable of operating with LGAD pixel sensors (Senger et al., 2023). The first results of the modeling of a part of the ASIC are demonstrated.