Low-field Hole Mobility Research Articles

Rigorous Modeling and Investigation of Low-Field Hole Mobility in Silicon and Germanium Gate-All-Around Nanosheet Transistors

The low-field hole mobility in p-type inversion-mode silicon (Si) and germanium (Ge) nanosheet (NS) transistors is rigorously calculated by a physics-based theoretical model, where momentum scatterings from phonons, charged impurities, and surface roughness are all considered. With a holistic physical picture of carrier scattering mechanisms, the effects of material, crystal orientation, channel width, strain/stress, and temperature are investigated comprehensively by the in-house developed numerical simulator. This sound and prospective theoretical work paves the way for clarifying the physics of achieving high hole mobility in ultrascaled NS channels, presenting some valuable insights and guidelines about the device design and fabrication for the next-generation CMOS technology.

Effect of uniaxial compressive stress with different orientations on the hole mobility of wurtzite GaN heterojunction quantum well

The influence of uniaxial compressive stress with different orientations to the current channel on the physical and transport properties of the wurtzite GaN heterojunction quantum well is investigated in this work. By using the six-band stress-dependent k × p Hamiltonian, accurate two-dimensional physical pictures are given for the quantized valence subband under the uniaxial compressive stress on the (0001) transport plane. The low-field hole mobility is obtained by the Kubo–Greenwood formula, taking the scattering rates for acoustic phonon, polar optical phonon, and surface roughness into account. Using these methods, the microscopic relationship between the orientation of uniaxial compressive stress and low-field hole mobility is obtained according to the variations of valence subband dispersion and hole effective mass. Results show that for temperatures around and above room temperature, the acoustic phonon scattering is predominant. We find that the mobility gain is mostly contributed from effective mass, and there is an increasing trend under uniaxial compressive stress with all orientations due to the effective mass reduction. For the same stress value, the mobility decreases monotonically as the stress orientation changes from 0° to 90° with respect to the current channel. At room temperature, the calculated low-field hole mobility is 182 cm2/V s under 8 GPa uniaxial compressive stress parallel to the current channel, with the hole density of 5.5 × 1013 cm−2 and the effective electric field of 0.93 MV/cm.

(Invited) Fabrication and Characterization of Ge-Based MIS Structures

Germanium (Ge) is a very attractive channel material for future high-performance metal-insulator-semiconductor (MIS) devices because it exhibits much higher low-field electron (two times higher) and hole (four times higher) mobilities than Si. In addition, the smaller band gap of Ge than that of Si should allow the further reduction of power consumption in advanced integrated circuits and the lower melting point of Ge than that of Si also enables Ge-based device integration at low processing temperatures. However, until the early years of the 2000s, the reported electrical properties of high-k/Ge interfaces had been so poor that one of the critical issues in establishing Ge-based MIS technology was the effective passivation of Ge surfaces by dielectrics with superior interface properties. Although the quality of the Ge-MIS structure has been remarkably improved in the past decade, the relationship between the processing methods and the quality has not been discussed precisely.In this paper, we report on the fabrication of Ge MIS structures with various high-k dielectric materials and interlayer materials through various methods. We also introduce the convenient method to characterize the interface trap densities (Dit's) of the MIS capacitors by spectroscopic measurement of the interface trap density in an insulator/Ge interface at room temperature [1]. The effects of the insertion of interlayers into the interface of high-k insulator/Ge and the application of heat treatment to the Ge MIS structures will be also presented.For instance, the Dit of Ta2O5/GeNx/Ge fabricated by electron-cyclotron-resonance (ECR) plasma nitridation and sputtering was estimated to be 4×1011 cm-2 · eV-1 [2], that of Si3N4/GeNx/Ge by ECR plasma nitridation to be 1×1011 cm-2 · eV-1 [3-6], and that of Al2O3/GeO2/Ge by ECR plasma oxidation and sputtering to be 4.5×1010 cm-2 · eV-1 [7-9]. These results have summarized that the adequate surface preparations of the interfaces and films by the ECR plasma process with low energy plasma irradiation have been effective to realize the low Dit of MIS structures with GeO2 and/or GeNx.These results have expanded to another MIS structures fabricated by more conventional film formation technique such as the atomic layer deposition (ALD) and the radio frequency (RF) magnetron sputtering. The Dit of Al2O3/Al germanate/Ge by ALD with trimethylaluminum (TMA) and microwave-generated atomic oxygen was estimated to be 2×1011cm-2 · eV-1 [10], and that of HfO2/Ge by RF magnetron sputtering to be 5.9×1011 cm-2 · eV-1. These results have summarized that the heat treatment after the fabrication of MIS strucures have affected interface properties of germanate/Ge and oxide/Ge.Although the mechanism by which the process conditions act on the interface state is now under estimation, it has been speculated that the fabrication method, the insertion of the interlayers, and the application of heat treatment have a great influence on the interface characteristics. The structures and the fabrication method of various MIS will be discussed.Part of this work was carried out under the Cooperative Research Project Program of the Research Institute of Electrical Communication, Tohoku University.

3-D Monte Carlo device simulator for variability modeling of p-MOSFETs

A device simulator for p-MOSFETs, based on the Monte Carlo method for the solution of the Boltzmann transport equation, was developed, and results and implementation challenges are presented and discussed in detail in this paper. By using a Monte Carlo device simulator (MCDS), it is possible to consider effects that affect state-of-the-art devices that cannot be adequately considered using other methods (drift–diffusion, hydrodynamic, etc.). Novel feature of the simulator is that it treats hole–hole and hole–impurity interactions in real space using particle–particle–particle–mesh coupling method, allowing the simulator to account for random dopant fluctuation and charged traps, responsible for random telegraph noise and bias temperature instability, while having a small computational cost enabling statistical simulations. The MCDS shows excellent agreement between experimental data for the hole drift velocity versus electric field and low-field hole mobility versus doping density.

Influence of alloy disorder scattering on the hole mobility of SiGe nanowires

In this work, we analyze the influence of the alloy disorder (AD) scattering on the low-field hole mobility of Si1-xGex nanowires (NWs). To do it, the electrostatic description is achieved through a self-consistent solution of the Poisson equation and the six-band k⋅p method in the cross section of the NW. The momentum relaxation time approximation is used to calculate the hole mobility, including alloy disorder and phonon scattering mechanisms, and the use of approximations to calculate the overlap integrals for the scattering matrix elements is discussed. We study the influence of the alloy disorder scattering on the total mobility compared to the phonon contribution, for different values of the AD scattering parameter proposed in the literature, and analyze the performance of SiGe NWs as a function of the Ge molar fraction for both low and high inversion charge densities.

Adaptation of the pseudo-metal–oxide–semiconductor field effect transistor technique to ultrathin silicon–on-insulator wafers characterization: Improved set-up, measurement procedure, parameter extraction, and modeling

This paper revisits and adapts of the pseudo-MOSFET (Ψ-MOSFET) characterization technique for advanced fully depleted silicon on insulator (FDSOI) wafers. We review the current challenges for standard Ψ-MOSFET set-up on ultra-thin body (12 nm) over ultra-thin buried oxide (25 nm BOX) and propose a novel set-up enabling the technique on FDSOI structures. This novel configuration embeds 4 probes with large tip radius (100–200 μm) and low pressure to avoid oxide damage. Compared with previous 4-point probe measurements, we introduce a simplified and faster methodology together with an adapted Y-function. The models for parameters extraction are revisited and calibrated through systematic measurements of SOI wafers with variable film thickness. We propose an in-depth analysis of the FDSOI structure through comparison of experimental data, TCAD (Technology Computed Aided Design) simulations, and analytical modeling. TCAD simulations are used to unify previously reported thickness-dependent analytical models by analyzing the BOX/substrate potential and the electrical field in ultrathin films. Our updated analytical models are used to explain the results and to extract correct electrical parameters such as low-field electron and hole mobility, subthreshold slope, and film/BOX interface traps density.

High-mobility p-channel metal-oxide-semiconductor field-effect transistors on Ge-on-insulator structures formed by lateral liquid-phase epitaxy

High-mobility p-channel metal-oxide-semiconductor field-effect transistors (MOSFETs) were fabricated on germanium-on-insulator (GOI) structures formed by lateral liquid-phase epitaxy (LLPE) from the Si seed areas. It was found that appropriate rapid annealing conditions for LLPE effectively suppress intermixing at the Si seed regions and produce tensile strained single-crystalline Ge layers surrounded by SiO2 microcrucibles. We examined the electrical properties of the thin Ge layers using GOI MOSFETs with back-gate control in the p-type accumulation mode. Excellent transistor performance, such as a low off-leakage current of 1 × 10−7 μA/μm, a high on/off current ratio of 106, and high low-field hole mobility of 480 cm2/Vs, which is 2.8 times higher than that of the reference silicon-on-insulator device, was demonstrated, indicating that the LLPE method provides high-quality local GOI structures and that it is a feasible way to fabricate the next-generation Ge-based devices.

High Hole-Mobility Strained-$\hbox{Ge/Si}_{0.6} \hbox{Ge}_{0.4}$ P-MOSFETs With High-K/Metal Gate: Role of Strained-Si Cap Thickness

Low-field effective hole mobility of highly strained (~2.4%, biaxial) germanium-channel (7.8 nm-thick) p-MOSFETs with high-K/metal gate stack has been experimentally investigated. Devices with various ultrathin strained-Si cap layer thicknesses, as thin as ~8 Å, show excellent capacitance-voltage characteristics with no hysteresis or frequency dispersion and hole mobility enhancement of more than 6.5X over Si universal and 2.3X over similar devices with no strained-Si cap, at <i xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">E</i> <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">eff</sub> = 0.6 MV/cm. The influence of the strained-Si cap thickness on the hole mobility is also studied. The mobility increases with increasing Si cap thickness up to ~1.8 nm (with a peak mobility of 940 cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> /Vs at this cap thickness) consistent with a reduction in remote Coulombic scattering.

Charge transport in non-polar and semi-polar III-V nitride heterostructures

Compared to the intense research focus on the optical properties, the transport properties in non-polar and semi-polar III-nitride semiconductors remain relatively unexplored to date. The purpose of this paper is to discuss charge-transport properties in non-polar and semi-polar orientations of GaN in a comparative fashion to what is known for transport in polar orientations. A comprehensive approach is adopted, starting from an investigation of the differences in the electronic bandstructure along different polar orientations of GaN. The polarization fields along various orientations are then discussed, followed by the low-field electron and hole mobilities. A number of scattering mechanisms that are specific to non-polar and semi-polar GaN heterostructures are identified, and their effects are evaluated. Many of these scattering mechanisms originate due to the coupling of polarization with disorder and defects in various incarnations depending on the crystal orientation. The effect of polarization orientation on carrier injection into quantum-well light-emitting diodes is discussed. This paper ends with a discussion of orientation-dependent high-field charge-transport properties including velocity saturation, instabilities and tunneling transport. Possible open problems and opportunities are also discussed.

Impact of Channel Direction Dependent Low Field Hole Mobility on (100) Orientation Silicon Surface

An obvious channel direction dependency of the low field hole mobility on (100) oriented silicon surface is experimentally obtained for p-channel metal–oxide–silicon field-effect-transistor (MOSFET) fabricated on atomically flattened silicon wafer. The low electric field hole mobility measured at a low temperature takes the maximal at [001] directions and the minimal at [011] directions, respectively. The obtained channel direction dependency agrees very well with that of the heavy hole effective mass. The correlations between the magnitude of channel direction dependency of the hole mobility and some physical parameters such as channel length, temperature, and lateral electric field are evaluated. As a result, a universal relationship was found between the mobility increase from [011] to [001] direction and the channel length over the average relaxation time constant of carrier scattering.

Theory of hole mobility in strained Ge and III-V p-channel inversion layers with high-κ insulators

We present a comprehensive investigation of the low-field hole mobility in strained Ge and III-V (GaAs, GaSb, InSb, and In1−xGaxAs) p-channel inversion layers with both SiO2 and high-κ insulators. The valence (sub)band structure of Ge and III-V channels, relaxed and under biaxial strain (tensile and compressive) is calculated using an efficient self-consistent method based on the six-band k⋅p perturbation theory. The hole mobility is then computed using the Kubo–Greenwood formalism accounting for nonpolar hole-phonon scattering (acoustic and optical), surface roughness scattering, polar phonon scattering (III-Vs only), alloy scattering (alloys only) and remote phonon scattering, accounting for multisubband dielectric screening. As expected, we find that Ge and III-V semiconductors exhibit a mobility significantly larger than the “universal” Si mobility. This is true for MOS systems with either SiO2 or high-κ insulators, although the latter ones are found to degrade the hole mobility compared to SiO2 due to scattering with interfacial optical phonons. In addition, III-Vs are more sensitive to the interfacial optical phonons than Ge due to the existence of the substrate polar phonons. Strain—especially biaxial tensile stress for Ge and biaxial compressive stress for III-Vs (except for GaAs)—is found to have a significant beneficial effect with both SiO2 and HfO2. Among strained p-channels, InSb exhibits the largest mobility enhancement. In0.7Ga0.3As also exhibits an increased hole mobility compared to Si, although the enhancement is not as large. Finally, our theoretical results are favorably compared with available experimental data for a relaxed Ge p-channel with a HfO2 insulator.

Experimental Evidence of Sidewall Enhanced Transport Properties of Mesa-Isolated (001) Germanium-On-Insulator pMOSFETs

In this brief, the hole transport properties of narrow-width germanium-on-insulator (GeOI) pMOSFETs are investigated. We report, for the first time, +65% low-field hole mobility enhancement in narrow-width (0.29-mum effective width <i xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">W</i> <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">eff</sub> ) versus large-width (10- mum <i xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">W</i> <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">eff</sub> ) GeOI mesa-isolated devices. The observed enhancement, which is independent of the device length down to 90 nm, is attributed to improved sidewall transport properties resulting in higher hole mobility on the sides than on the top of the devices. At high inversion charge density <i xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">N</i> <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">inv</sub> ~ 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">13</sup> cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-2</sup> , + 55% hole effective mobility improvement is preserved. The top and side low-field mobilities ( mu <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">top</sub> and mu <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">side</sub> , respectively) were extracted, showing + 90% mobility improvement at the sides (mu <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">top</sub> = 125 cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> /V middots <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-1</sup> and mu <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">side</sub> = 240 cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> /V middots <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-1</sup> ).

Physical modeling of strain-dependent hole mobility in Ge p-channel inversion layers

We present comprehensive calculations of the low-field hole mobility in Ge p-channel inversion layers with SiO2 insulator using a six-band k⋅p band-structure model. The cases of relaxed, biaxially, and uniaxially (both tensily and compressively) strained Ge are studied employing an efficient self-consistent method—making use of a nonuniform spatial mesh and of the Broyden second method—to solve the coupled envelope-wave function k⋅p and Poisson equations. The hole mobility is computed using the Kubo–Greenwood formalism accounting for nonpolar hole-phonon scattering and scattering with interfacial roughness. Different approximations to handle dielectric screening are also investigated. As our main result, we find a large enhancement (up to a factor of 10 with respect to Si) of the mobility in the case of uniaxial compressive stress similarly to the well-known case of Si. Comparison with experimental data shows overall qualitative agreement but with significant deviations due mainly to the unknown morphology of the rough Ge-insulator interface, to additional scattering with surface optical phonon from the high-κ insulator, to Coulomb scattering interface traps or oxide charges—ignored in our calculations—and to different channel structures employed.

Modeling the uniform transport in thin film SOI MOSFETs with a Monte-Carlo simulator for the 2D electron gas

In this paper, we present simulations of some of the most relevant transport properties of the inversion layer of ultra-thin film SOI devices with a self-consistent Monte-Carlo transport code for a confined electron gas. We show that size induced quantization not only decreases the low-field mobility (as experimentally found in [Uchida K, Koga J, Ohba R, Numata T, Takagi S. Experimental eidences of quantum-mechanical effects on low-field mobility, gate-channel capacitance and threshold voltage of ultrathin body SOI MOSFETs, IEEE IEDM Tech Dig 2001;633–6; Esseni D, Mastrapasqua M, Celler GK, Fiegna C, Selmi L, Sangiorgi E. Low field electron and hole mobility of SOI transistors fabricated on ultra-thin silicon films for deep sub-micron technology application. IEEE Trans Electron Dev 2001;48(12):2842–50; Esseni D, Mastrapasqua M, Celler GK, Fiegna C, Selmi L, Sangiorgi E, An experimental study of mobility enhancement in ultra-thin SOI transistors operated in double-gate mode, IEEE Trans Electron Dev 2003;50(3):802–8. [1–3]]), but also the electron saturation velocity and the carrier heating depend on the subband structure, and thus on the silicon film thickness.

Ambipolar Charge Transport in Films of Methanofullerene and Poly(phenylenevinylene)/Methanofullerene Blends

Herein, we report experimental studies of electron and hole transport in thin films of [6,6]-phenyl C61 butyric acid methyl ester (PCBM) and in blends of poly[2-methoxy-5-(3',7'-dimethyloctyloxy)-l,4-phenylenevinylene] (MDMO-PPV) with PCBM. The low-field hole mobility in pristine MDMO-PPV is of the order of 10 - 7 cm 2 V - 1 s - 1 , in agreement with previous studies, whereas the electron mobility in pristine PCBM was found by current-density-voltage (J-V) measurements to be of the order of 10 - 2 cm 2 V - 1 s - 1 , which is about one order of magnitude greater than previously reported. Adding PCBM to the blend increases both electron and hole mobilities, compared to the pristine polymer, and results in less dispersive hole transport. The hole mobility in a blend containing 67 wt.-% PCBM is at least two orders of magnitude greater than in the pristine polymer. This result is independent of measurement technique and film thickness, indicating a true bulk property of the material. We therefore propose that PCBM may assist hole transport in the blend, either by participating in hole transport or by changing the polymer-chain packing to enhance hole mobility. Time-of-flight mobility measurements of PCBM dispersed in a polystyrene matrix yield electron and hole mobilities of similar magnitude and relatively non-dispersive transport. To the best of our knowledge, this is the first report of hole transport in a methanofullerene. We discuss the conditions under which hole transport in the fullerene phase of a polymer/fullerene blend may be expected. The relevance to photovoltaic device function is also discussed.

Partially Depleted SOI MOSFETs Under Uniaxial Tensile Strain

The effects of tensile uniaxial strain on the DC performance of partially-depleted silicon-on-insulator n and p-channel MOSFETs as a function of orientation and gate length are reported. The drain current of the n-MOSFETs increases for both longitudinal and transverse strain orientations with respect to the current flow direction. In the n-MOSFET, longitudinal strain provides greater enhancement than transverse strain. In contrast, for p-MOSFETs, longitudinal strain decreases the current while transverse strain increases the drain current. The magnitude of the fractional change in drain current decreases as gate length is reduced from 20 to 0.35 /spl mu/m. These phenomena are consistent with those of bulk silicon MOSFETs and are shown to be qualitatively correlated with the piezoresistance coefficients of the Si inversion layer. Analysis of the linear drain current versus gate voltage characteristics shows that the threshold voltage is independent of strain while the change in drain current tracks with the change in effective electron and hole mobility. Closer examination shows that as the gate length is reduced from 20 to 0.35 /spl mu/m, the relative increase in low-field electron and hole mobility is constant for transverse strain and generally decreases with gate length for longitudinal strain.

An experimental study on transport issues and electrostatics of ultrathin body SOI pMOSFETs

We present an experimental study of the transport properties (low field hole mobility /spl mu//sub h/) and electrostatics (threshold voltage V/sub th/, and gate-to-channel capacitance C/sub gc/) of ultrathin body (UTB) SOI pMOSFETs using a large RingFet structure. Body thicknesses were /spl sim/4.3 nm to 50 nm. We find that 1) hole mobility decreases significantly as T/sub Si/<10 nm, and tends to show negligible dependence on the transverse electric field for extremely thin T/sub Si/ (<6 nm) and 2) a V/sub th/ shift of /spl sim/150 mV occurs over the studied T/sub Si/ range, accompanied by enhancement of weak inversion capacitance in thin body devices. Simulations were performed to provide insight into the experimental observations.

Low field electron and hole mobility of SOI transistors fabricated on ultrathin silicon films for deep submicrometer technology application

In this paper, we present a comprehensive experimental characterization of electron and hole effective mobility (/spl mu//sub eff/) of ultrathin SOI n- and p-MOSFETs. Measurements have been performed at different temperatures using a special test structure able to circumvent parasitic resistance effects. Our results indicate that, at large inversion densities (N/sub inv/), the mobility of ultrathin SOI transistors is largely insensitive to silicon thickness (T/sub SI/) and is larger than in heavily doped bulk MOS because of a lower effective field. At small N/sub inv/, instead, mobility of SOI transistors exhibits a systematic reduction with decreasing T/sub SI/. The possible explanation for this /spl mu//sub eff/ degradation in extremely thin silicon layers is discussed by means of a comparison to previously published experimental data and theoretical calculations. Our analysis suggests a significant role is played by an enhancement of phonon scattering due to carrier confinement in the thinnest semiconductor films. The experimental mobility data have then been used to study the possible implications for ultrashort SOI transistor performance using numerical simulations.

Modelling of hole mobilities in heavily doped strained SiGe

Low-field hole mobilities have been calculated for heavily relaxed and strained doped SiGe alloy layers with Ge contents varying from 0 to 50%, using a novel semi-analytical bandstructure model which incorporates the effects of strain on the valence band of the alloy. We obtain poor results compared with experiment for mobilities in heavily doped Si, and attribute this to (i) a failure of the Born approximation at low carrier energies and (ii) the omission of additional effects associated with heavy doping and high carrier concentrations. For the strained doped and intrinsic alloy we observe that both the in-plane and out-of-plane hole drift mobilities increase with increasing Ge content relative to those for Si. These enhancements are due mainly to the effects of strain, and to a lesser extent due to alloying with Ge, but are offset by the presence of alloy scattering. Our results are sensitive to the details of the models used for scattering by ionized impurities; however, the large uncertainties and scatter of the experimental data preclude accurate estimates of the alloy potential. We find that an alloy potential of 2.0 eV gives an in-plane mobility consistent with experimental data for intrinsic material. Our calculations for heavily doped layers are affected by uncertainties in the value of the alloy potential and highlight a need for a better quantitative understanding of the scattering processes which are important in heavily doped alloy layers.

Low-field hole mobility in a photorefractive polymer

We present the time-of-flight measurements of hole mobility in a photorefractive polymer composite as a function of temperature and applied electric field. The analysis shows that the temperature dependence of the low-field mobility is in apparent disagreement with the predictions of the Gaussian disorder model and also with polaron models.