Low Differential Nonlinearity Research Articles

A Time-to-Amplitude Converter With High Impedance Switch Topology for Single-Photon Time-of-Flight Measurement

This paper presents a novel time-to-amplitude converter (TAC) for single-photon direct time-of-flight (d-TOF) measurement. An innovative high impedance switch approach is proposed to significantly improve the stability of the integral current and to increase the swing of the timing voltage, enabling high linearity together with low power consumption on TAC. Implemented in a standard $0.18~\mu \text{m}$ CMOS technology, the TAC occupies only an area of $100~\mu \text{m}^{2}$ , featuring a compact configuration. The experimental results indicate that the presented TAC can acquire a 78 ps timing resolution in a 20 ns full-scale range (FSR) under the supply of 1.8 V. In particular, the TAC gains an excellent linearity characteristic with the very low differential nonlinearity (DNL) and integral nonlinearity (INL) within ±0.1 LSB and ±0.15 LSB, respectively. Additionally, the extremely low dynamic power consumption of $20~\mu \text{W}$ and the high pixel fill factor of 16 % are also achieved simultaneously. Thanks to the outstanding advantages of high-performance and compactness, the proposed TAC may be a promising candidate to realize high-density compact TOF-based imagers.

Time-to-Digital Converter IP-Core for FPGA at State of the Art

The Field Programmable Gate Array (FPGA) structure poses several constraints that make the implementation of complex asynchronous circuits such as Time-Mode (TM) circuits almost unfeasible. In particular, in Programmable Logic (PL) devices, such as FPGAs, the operation of the logic is usually synchronous with the system clock. However, it can happen that a very high-performance specifications demands to abandon this paradigm and to follow an asynchronous implementative solution. The main driver forcing the use of programmable logic solutions instead of tailored Application Specific Integrated Circuits (ASIC), best suiting an asynchronous design, is the request coming from the research community and industrial R&D of fast-prototyping at low Non Recursive Engineering (NRE) costs. For instance in the case of a high-resolved Time-to-Digital Converter (TDC), a signal clocked at some hundreds of MHz implemented in FPGA allows implementing a TDC with resolution at ns. If a higher resolution is required, the signal frequency cannot be increased further and one of the aces up the designer's sleeve is the propagation delay of the logic in order to quantize the time intervals by means of a so-called Tapped Delay-Line (TDL). This implementation of TDL-based TDC in FPGAs requires special attention by the designer both in making the best use of all available resources and in foreseeing how signals propagate inside these devices. In this paper, we investigate the implementation of a high-performance TDL-TDC addressed to 28-nm 7-Series Xilinx FPGA, taking into account the comparison between different technological nodes from 65-nm to 20-nm. In this context, the term high-performance means extended dynamic-range (up to 10.3 s), high-resolution and single-shot precision (up to 366 fs and 12 ps r.m.s respectively), low differential and integral non-linearity (up to 250 fs and 2.5 ps respectively), and multi-channel capability (up to 16).

Characterization of a Time-Resolved Diffuse Optical Spectroscopy Prototype Using Low-Cost, Compact Single Photon Avalanche Detectors for Tissue Optics Applications.

Time-resolved diffuse optical spectroscopy (TR-DOS) is an increasingly used method to determine the optical properties of diffusive media, particularly for medical applications including functional brain, breast and muscle measurements. For medical imaging applications, important features of new generation TR-DOS systems are low-cost, small size and efficient inverse modeling. To address the issues of low-cost, compact size and high integration capabilities, we have developed free-running (FR) single-photon avalanche diodes (SPADs) using 130 nm silicon complementary metal-oxide-semiconductor (CMOS) technology and used it in a TR-DOS prototype. This prototype was validated using assessments from two known protocols for evaluating TR-DOS systems for tissue optics applications. Following the basic instrumental performance protocol, our prototype had sub-nanosecond total instrument response function and low differential non-linearity of a few percent. Also, using light with optical power lower than the maximum permissible exposure for human skin, this prototype can acquire raw data in reflectance geometry for phantoms with optical properties similar to human tissues. Following the MEDPHOT protocol, the absolute values of the optical properties for several homogeneous phantoms were retrieved with good accuracy and linearity using a best-fitting model based on the Levenberg-Marquardt method. Overall, the results of this study show that our silicon CMOS-based SPAD detectors can be used to build a multichannel TR-DOS prototype. Also, real-time functional monitoring of human tissue such as muscles, breasts and newborn heads will be possible by integrating this detector with a time-to-digital converter (TDC).

8-channel acquisition system for time-correlated single-photon counting

Nowadays, an increasing number of applications require high-performance analytical instruments capable to detect the temporal trend of weak and fast light signals with picosecond time resolution. The Time-Correlated Single-Photon Counting (TCSPC) technique is currently one of the preferable solutions when such critical optical signals have to be analyzed and it is fully exploited in biomedical and chemical research fields, as well as in security and space applications. Recent progress in the field of single-photon detector arrays is pushing research towards the development of high performance multichannel TCSPC systems, opening the way to modern time-resolved multi-dimensional optical analysis. In this paper we describe a new 8-channel high-performance TCSPC acquisition system, designed to be compact and versatile, to be used in modern TCSPC measurement setups. We designed a novel integrated circuit including a multichannel Time-to-Amplitude Converter with variable full-scale range, a D∕A converter, and a parallel adder stage. The latter is used to adapt each converter output to the input dynamic range of a commercial 8-channel Analog-to-Digital Converter, while the integrated DAC implements the dithering technique with as small as possible area occupation. The use of this monolithic circuit made the design of a scalable system of very small dimensions (95 × 40 mm) and low power consumption (6 W) possible. Data acquired from the TCSPC measurement are digitally processed and stored inside an FPGA (Field-Programmable Gate Array), while a USB transceiver allows real-time transmission of up to eight TCSPC histograms to a remote PC. Eventually, the experimental results demonstrate that the acquisition system performs TCSPC measurements with high conversion rate (up to 5 MHz/channel), extremely low differential nonlinearity (<0.04 peak-to-peak of the time bin width), high time resolution (down to 20 ps Full-Width Half-Maximum), and very low crosstalk between channels.

Time-correlated single-photon counting system based on a monolithic time-to-amplitude converter

Modern time-correlated single-photon counting (TCSPC) systems can achieve very high performance, but advanced applications also demand the implementation of multichannel acquisition chains. To fit the specifics of TCSPC applications we developed a complete single-channel measurement system, composed by three main parts: a single-photon detection module, a TCSPC acquisition board and a power management unit. The system is based on a single-photon avalanche diode (SPAD) and on a fully integrated time-to-amplitude converter (TAC). We designed the module to be very compact, in order to be enclosed in a small case (110 × 50 × 40 mm). The system features high temporal resolution (71 ps), low differential nonlinearity (0.05 LSB), high counting rate (4 MHz) and low power. Moreover a four-channel TAC has already been manufactured and tested; the very low crosstalk between channels, together with low power and low area make the converter suitable for large scale multi-channel acquisition chains, allowing the implementation of architectures for multidimensional TCSPC measurements.

Four Channel, 40 ps Resolution, Fully Integrated Time-to-Amplitude Converter for Time-Resolved Photon Counting

Recently, a growing interest has arisen about the time-correlated single photon counting (TCSPC) technique, that allows the analysis of fast and weak light waveforms with a time resolution in the picosecond order. Since TCSPC basically consists of the measurement of the arrival time of a photon, a high resolution and high linearity time measurement block is of the utmost importance; moreover, the use of multianode Photo Multiplier Tube and of single photon avalanche diode arrays led to the development of multichannel acquisition systems, where the time measurement block has to be integrated to reduce both cost and area. We have designed and fabricated a four channel fully integrated time-to-amplitude converter (TAC), built in 0.35 μm Si-Ge technology, characterized by an excellent time resolution (less than 50 ps full width half maximum), low differential nonlinearity (better than 0.02 LSB peak-peak and 0.0003 LSB rms), high counting rate (16 MHz), low and constant power dissipation (50 mW) and low area occupation (2.58 × 1.28 mm2 ). Moreover, the very low crosstalk ( -115 dB) between channels, together with low power and low area makes the converter suitable for large scale multi-channel acquisition chains.

Note: Fully integrated time-to-amplitude converter in Si–Ge technology

Over the past years an always growing interest has arisen about the measurement technique of time-correlated single photon counting TCSPC), since it allows the analysis of extremely fast and weak light waveforms with a picoseconds resolution. Consequently, many applications exploiting TCSPC have been developed in several fields such as medicine and chemistry. Moreover, the development of multianode PMT and of single photon avalanche diode arrays led to the realization of acquisition systems with several parallel channels to employ the TCSPC technique in even more applications. Since TCSPC basically consists of the measurement of the arrival time of a photon, the most important part of an acquisition chain is the time measurement block, which must have high resolution and low differential nonlinearity, and in order to realize multidimensional systems, it has to be integrated to reduce both cost and area. In this paper we present a fully integrated time-to-amplitude converter, built in 0.35 μm Si-Ge technology, characterized by a good time resolution (60 ps), low differential nonlinearity (better than 3% peak to peak), high counting rate (16 MHz), low and constant power dissipation (40 mW), and low area occupation (1.38×1.28 mm(2)).

Monolithic time to amplitude converter for time correlated single photon counting

Time correlated single photon counting techniques allow in depth examinations of very important chemical and biological processes involving complex interactions of biomolecules. Understanding of these processes is of the utmost importance to address vital medical issues such as the origin and growth of tumors. Modern developments of fluorescence analysis techniques require compact, low cost, and high performance instrumentation, and a major path to these goals is the successful integration of the electronics. In this paper we present a fully monolithic time to amplitude converter, built in standard 0.35 microm CMOS technology, characterized by good time resolution (60 ps), low differential nonlinearity (better than 0.5% rms), short dead time (80 ns), low power dissipation (60 mW), and low area occupation (1.8x1.4 mm(2)).

Development of a fast 12-bit ADC for a nuclear spectroscopy system

A fast 12-bit ADC using the sliding scale technique has been developed for nuclear spectroscopy applications. The new approach takes advantage of the latest high-speed 12-bit flash ADC of AD 9042 from Analog-Devices and Field Programmable Gate Arrays (FPGA). The fast 12-bit ADC features a short conversion time of 1 μs and low differential nonlinearity of 1%. This performance of the fast 12-bit ADC is achieved with low circuit complexity. Experimental results using a HPGe detector and fast 12-bit ADC are also discussed.

A pipeline A/D converter architecture with low DNL

A pipeline analog-to-digital converter architecture can reduce the differential nonlinearity (DNL) with a swapping technique without involving special calibration techniques. An implementation of the overrange stages in the analog pipeline suitable for high-speed applications is proposed. A 14-bit 5-MSample/s converter has been fabricated in a double-poly 0.5-/spl mu/m CMOS process. The 3.3/spl times/3.3 mm/sup 2/ chip dissipates 320 mW from a single 5 V supply and achieves a signal-to-noise ratio of 79 dB, a dynamic range of 82 dB, and a DNL below 0.4 LSB.

CMOS charge-transfer preamplifier for offset-fluctuation cancellation in low-power A/D converters

We have developed a low-power, high-accuracy comparator composed of a dynamic latch and a CMOS charge transfer preamplifier (CT preamplifier). The CT preamplifier amplifies the input signal with no static power dissipation, and the operation is almost insensitive to the device parameter fluctuations. The low-power and high-accuracy comparator has been realized by combining the CT preamplifier with a dynamic latch circuit. The fluctuation in the offset voltage of a dynamic latch is reduced by a factor of the preamplifier gain. A 4-bit flash A/D converter circuit has been designed and fabricated by 0.6-/spl mu/m CMOS process. Low differential nonlinearity of less than /spl plusmn/4 mV has been verified by the measurements on test circuits, showing 8-bit resolution capability. Very low power operation at 4.3 /spl mu/W per MS/s per comparator has also been achieved.

Ultra-linear, 14-bit spectroscopy ADC

An ultralinear 14-b analog-to-digital converter (ADC) utilizing a new averaging technique has been developed for nuclear spectroscopy applications. This technique utilizes a sliding scale of 14 b that provides 100% averaging while maintaining full ADC dynamic range. The modulation circuit required in the previous technique is no longer required. This elimination of circuitry lowers part count, power consumption, circuit complexity, potential drift problems, and calibration time, and improves circuit stability. Results have shown that low differential nonlinearity can be realized. >

A new method for DAC corrections for application in nuclear ADC

The paper describes a new method for measurement and correction of errors associated with DACs. Very small errors of a few μV can be measured and corrected. The method enables us to correct commercially available monolithic DACs, so that they can be used in nuclear ADCs where high integral accuracy and low differential nonlinearity (DNL) are required. This cuts down the circuit size and cost for DACs applied in nuclear ADCs. The paper proposes a “theorem of DAC code correction” which is based on the relationship existing between the errors associated with different bits of a DAC. Complete mathematical proof is given to establish the correctness of the method. The “theorem” can be implemented if the correct value of any bit or of the full scale voltage is known. The method also provides a check on whether errors are correctly measured and whether they are perfectly compensated. The illustration of the relationship between errors associated with different bits also reveals that the conventional ways of adjusting DNL for 16-bit and 18-bit (0.5 LSB) DACs followed by commercial manufacturers are not accurate. These corrections can be implemented more effectively if the procedure described is followed.

252Cf-plasma desorption mass spectrometry multistop time digitizer

A multistop time digitizer is described which was designed specifically for 252Cf-plasma desorption time-of-flight mass spectrometry. The digitizer is a high resolution time intervalometer capable of measuring the times of a number of stop events following a common start. A resolution of 78.125 ps is achieved. The time range can be varied from 5 ms to 320 ms in 16 steps. Stop event processing time takes less than one microsecond, enabling high resolution measurements of closely spaced bursts of events. The digitizer consists of the following three modules. A clock module provides the accurate time reference including a precision time calibrator. An analog module contains a special tandem stretcher by which the high resolution and low differential nonlinearity are achieved. A digital module comprises the counting, logic and interface circuits. Up to four complete digitizers can be housed in and powered by a standard CAMAC crate.

Digitally controlled deflection power supply for electron guns

A simple electron gun deflection power supply design is presented, which can be used when high-resolution stairstep variation of output voltage, with low integral and differential nonlinearity, is required.