Low Development Effort Research Articles

Parallel programming in mobile devices with FancyJCL

Mobile devices and handheld systems, such as the smartphones and tablets universally extended, are becoming increasingly powerful. Their basic hardware configuration is usually state-of-the-art heterogeneous architectures consisting of multi-core processors and some kind of accelerator such as GPUs or DSPs. Specific code adapted to the architecture is mandatory if high-performance computation is required and low-level libraries and parallelism are needed, which constitutes an important barrier for the usual developer in such devices. In this context, we propose the FancyJCL framework. It provides a high-level abstraction layer that hides implementation details and allows to develop parallel programs for mobile devices. The target platform for FancyJCL is mainly Android and Java developers due to their high market penetration. A very simple, seemingly sequential encoding results in parallel efficient OpenCL code. FancyJCL is itself based on the Fancier framework, which enables optimal memory management across memory spaces on unified memory systems. Benchmarks of FancyJCL code developed for a wide range of image processing algorithms show good performance with low development effort.

Hardware-In-The-Loop and Software-In-The-Loop Testing of the MOVE-II CubeSat

This article reports the ongoing work on an environment for hardware-in-the-loop (HIL) and software-in-the-loop (SIL) tests of CubeSats and the benefits gained from using such an environment for low-cost satellite development. The satellite tested for these reported efforts was the MOVE-II CubeSat, developed at the Technical University of Munich since April 2015. The HIL environment has supported the development and verification of MOVE-II’s flight software and continues to aid the MOVE-II mission after its launch on 3 December 2018. The HIL environment allows the satellite to interact with a simulated space environment in real-time during on-ground tests. Simulated models are used to replace the satellite’s sensors and actuators, providing the interaction between the satellite and the HIL simulation. This approach allows for high hardware coverage and requires relatively low development effort and equipment cost compared to other simulation approaches. One key distinction from other simulation environments is the inclusion of the electrical domain of the satellite, which enables accurate power budget verification. The presented results include the verification of MOVE-II’s attitude determination and control algorithms, the verification of the power budget, and the training of the operator team with realistic simulated failures prior to launch. This report additionally presents how the simulation environment was used to analyze issues detected after launch and to verify the performance of new software developed to address the in-flight anomalies prior to software deployment.

Ad Hoc Information Extraction for Clinical Data Warehouses.

Summary Background: Clinical Data Warehouses (CDW) reuse Electronic health records (EHR) to make their data retrievable for research purposes or patient recruitment for clinical trials. However, much information are hidden in unstructured data like discharge letters. They can be preprocessed and converted to structured data via information extraction (IE), which is unfortunately a laborious task and therefore usually not available for most of the text data in CDW. Objectives: The goal of our work is to provide an ad hoc IE service that allows users to query text data ad hoc in a manner similar to querying structured data in a CDW. While search engines just return text snippets, our systems also returns frequencies (e.g. how many patients exist with “heart failure” including textual synonyms or how many patients have an LVEF < 45) based on the content of discharge letters or textual reports for special investigations like heart echo. Three subtasks are addressed: (1) To recognize and to exclude negations and their scopes, (2) to extract concepts, i.e. Boolean values and (3) to extract numerical values. Methods: We implemented an extended version of the NegEx-algorithm for German texts that detects negations and determines their scope. Furthermore, our document oriented CDW PaDaWaN was extended with query functions, e.g. context sensitive queries and regex queries, and an extraction mode for computing the frequencies for Boolean and numerical values. Results: Evaluations in chest X-ray reports and in discharge letters showed high F1-scores for the three subtasks: Detection of negated concepts in chest X-ray reports with an F1-score of 0.99 and in discharge letters with 0.97; of Boolean values in chest X-ray reports about 0.99, and of numerical values in chest X-ray reports and discharge letters also around 0.99 with the exception of the concept age. Discussion: The advantages of an ad hoc IE over a standard IE are the low development effort (just entering the concept with its variants), the promptness of the results and the adaptability by the user to his or her particular question. Disadvantage are usually lower accuracy and confidence. This ad hoc information extraction approach is novel and exceeds existing systems: Roogle [ 1 ] extracts predefined concepts from texts at preprocessing and makes them retrievable at runtime. Dr. Warehouse [ 2 ] applies negation detection and indexes the produced subtexts which include affirmed findings. Our approach combines negation detection and the extraction of concepts. But the extraction does not take place during preprocessing, but at runtime. That provides an ad hoc, dynamic, interactive and adjustable information extraction of random concepts and even their values on the fly at runtime. Conclusions: We developed an ad hoc information extraction query feature for Boolean and numerical values within a CDW with high recall and precision based on a pipeline that detects and removes negations and their scope in clinical texts.

SpExSim: assessing kernel suitability for C-based high-level hardware synthesis

We present SpExSim, a software tool for quickly surveying legacy code bases for kernels that could be accelerated by FPGA-based compute units. We specifically aim for low development effort by considering the use of C-based high-level hardware synthesis, instead of complex manual hardware designs. SpExSim not only exploits the spatially distributed model of computation commonly used on FPGAs, but can also model the effect of two different microarchitectures commonly used in C-to-hardware compilers, including pipelined architectures with modulo scheduling. The estimations have been validated against actual hardware generated by two current HLS tools.

COMFIT: A development environment for the Internet of Things

This paper presents COMFIT (Cloud and Model based IDE for the Internet of Things), a development environment for the Internet of Things that was built grounded on the paradigms of model driven development and cloud computing. COMFIT is composed of two different modules: (1) the App Development Module, a model-driven architecture (MDA) infrastructure, and (2) the App Management and Execution Module, a module that contains cloud-based web interface connected to a server hosted in the cloud with compilers and simulators for developing Internet of Things (IoT) applications. The App Development Module allows the developers to design IoT applications using high abstraction artifacts (models), which are tailored to either the application perspective or the network perspective, thus creating a separation between these two concerns. As models can be automatically transformed into code through the App Development Module, COMFIT creates an environment where there is no need of additional configurations to properly compile or simulate the generated code, integrating the development lifecycle of IoT applications into a single environment partially hosted in the client side and partially in the cloud. In its current version, COMFIT supports two operating systems, namely Contiki and TinyOS, which are widely used in IoT devices. COMFIT supports automatic code generation, execution of simulations, and code compilation of applications for these platforms with low development effort. Finally, COMFIT is able to interact with IoT-lab, an open testbed for IoT applications, which allows the developers to test their applications with different configurations without the need of using local IoT devices. Several evaluations were performed to assess COMFIT’s key features in terms of development effort, quality of generated code, and scalability.

Energy and low carbon development efforts in Ghana: institutional arrangements, initiatives, challenges and the way forward

Over the years, Ghana has invested considerable effort and resources together with international partners to develop the energy sector and to mainstream energy low carbon pathways into national development plans. Low carbon development (LCD) provides a good opportunity, of not only building upon earlier energy and climate change local processes and structures but also help to mainstream low carbon agenda in economic activities and national development plans. For this to work however, require efficient institutions and effective institutional arrangements. Based on extensive literature analysis, personal communications and inputs from stakeholders, the paper highlights the key institutional arrangements, their interactions, challenges and proffers recommendations for improvements. To improve energy and low carbon development effort from the perspectives of institutional structures, would require, clearer institutional mandates, continuous improvements in institutional coordination (intra and inter), capacity and skills development, sustained visibility of the essence of energy and LCD at high political levels as well as engagement by civil societies. Equally important are the issues of finance, data availability and quality, monitoring and evaluation.

Graphillion: software library for very large sets of labeled graphs

Several graph libraries have been developed in the past few decades, and they were basically designed to work with a few graphs. However, there are many problems in which we have to consider all subgraphs satisfying certain constraints on a given graph. Since the number of subgraphs can increase exponentially with the graph size, explicitly representing these is infeasible. Hence, libraries concerned with efficiently representing a single graph instance are not suitable for such problems. In this paper, we develop Graphillion, a software library for very large of (vertex-)labeled graphs, based on zero-suppressed binary decision diagrams. Graphillion is not based on a traditional representation of graphs. Instead, a graph is simply regarded as a set of edge sets ignoring vertices, which allows us to employ powerful tools of a of sets (a of sets) and permits large graph to be handled efficiently. We also utilize advanced graph enumeration algorithms, which enable the simple family tools to understand the graph structure. Graphillion is implemented as a Python library to encourage easy development of its applications, without introducing significant performance overheads. In experiments, we consider two case studies, a puzzle solver and a power network optimizer, in which several operations and heavy optimization have to be performed over very large of constrained graphs (i.e., cycles or forests with complicated conditions). The results show that Graphillion allows us to manage a huge number of graphs with very low development effort.

Assessment of Improved Molten Salt Solar Tower Plants

The temperature level increase of molten salt solar tower plants is one important task on the development schedule to increase the system's overall efficiency. In the conventional power plant technology, modern supercritical steam power plants work with life steam temperatures near 620°C. To apply these modern power blocks in molten salt solar tower plants, salt temperatures near 650°C are required. Today's molten salt tower plants reach salt temperatures of 565°C. To follow the positive development tendencies of fossil power plants, in the present work the combination of supercritical steam power plants with solar towers is analyzed. As stated in recent literature (Kolb, Kelly, Singer), the state of the art tubular central receiver concept coupled with increased steam parameters of the power block (300bar/600°C/610°C) shows a marginal potential to decrease LEC. The identification of future concept innovations with significant cost reduction potential in the field of molten salt tower plants, the enhancement of the receiver efficiency as well as the assessment of critical aspects related to their feasibility is the task of this paper.Therefore this work first focuses on the state of the art molten salt tower technology and related improved concepts with molten salt. The selected improvements follow on the one hand the aim to increase the receiver's maximum temperature level to approximately 650°C to be able to feed modern supercritical power blocks, on the other hand the aim to require a low development effort. After the reference concept is characterized, the objective is the systematic comparison of receiver technologies, which show a potential of improved thermal efficiencies.The assessed receiver candidates are tubular and direct absorption receivers, either external or located in a cavity. The analyzed power level is 125 MWel, while the steam process parameters are varied from low temperature level (550°C) and subcritical steam to high temperature level (620°C) and supercritical steam. With this, selected molten salt power plants were specified and then modeled with different sizes of solar fields and different storage capacities and analyzed on an annual basis. The results show, that the assessed concept options close to the state of the art require drastically decreased investment costs to end up with significant LEC reduction and cost-competitiveness. The increase in overall efficiency of these improved concepts is compensated by their higher financial effort. Results of further concept assessments as well as the sensitivity analysis of parameters and costs are described.

Combined 3D and 2.5D modeling of the floating zone process with Comsol Multiphysics

The floating zone (FZ) technique is an industrially used method to crystallize silicon and make use of induction heating. The shape of the single-turn coil can be optimised with the help of numerical simulation of the electric current. The next step in process design is to discern the consequences on the temperature field, for what our axisymmetric model includes all important features like movement of silicon parts, temperature-dependent heat conductivity, view factor approximation for radiation heat transport, latent heat production and consumption along the phase boundaries as well as interface tracking. The simulations are conducted in Comsol Multiphysics and Matlab, assuming steady-state conditions. To verify the results, the calculated deflection of the crystallization interface is compared to results obtained from other numerical calculation software as well as to measurements, both showing a good agreement.The calculated temperature field is used as input to other physical models in Comsol. We calculated the thermal stress field of the crystal and the melt flow under the influence of a static magnetic field in axial direction. Model for other physical quantities like the doping distribution could be added with relatively low development effort.

GUEST EDITORIAL: "SPECIAL ISSUE: ULTRA-WIDEBAND ANTENNAS AND PROPAGATION"

In February 2002, the Federal Communications Commission (FCC) released the unlicensed frequency band of 3.1–10.6 GHz for commercial applications. This has greatly spurred the development of commercial ultra-wideband (UWB) communications systems and devices worldwide. Due to the extremely wide spectrum, the UWB-based systems have the potential to achieve high data rate in the order of 500Mbps up to even Gbps. On the other hand, in the low power and low data rate applications, the research and development effort has been focused on high accuracy localization or positioning systems. In UWB technology, to cater for the increase in transmission speed, reduction in power consumption and transceiver cost, a comprehensive investigation of UWB system issues, RF circuitry, antenna design, and propagation characteristics must be carried out. This Special Issue with eight strictly selected papers presents advanced progress in research and development of Antennas and Propagation for promising UWB applications. We have to mention here that the response from the community to this Special Issue is pretty good after the call for paper was announced for only six months, and we received 16 very high quality papers. The contributions cover almost all topics related to UWB antennas and propagation. Unfortunately, due to the limited space available, we have to make a very hard decision to include only eight of them in this Special Issue. Some of them have been recommended for possible publication as regular papers in International Journal of Wireless and Optical Communications in the future. The major content of the eight papers in this Special Issue can be summarized below. The first paper entitled “Antenna Time Domain Planar Near-field Measurement System” by N. Wang et al. reports on the advanced progress in development of time-domain near-field measurement. Such time-domain near-field measurement technology is the key to obtain antenna under test’s (AUT) far-field radiation patterns in frequency domain by Fourier transforming the far-field in time domain which is the outcome of transform of near-field far-field and time domain probe correction. The work started in 1996 and has been focused on developing software for general measurement system design, such as system control, time domain sampling, frequency domain probe correction, near-field far-field transform, results correction and analysis. In 2003, the authors built the first antenna time

Enabling reuse-based software development of large-scale systems

Software reuse enables developers to leverage past accomplishments and facilitates significant improvements in software productivity and quality. Software reuse catalyzes improvements in productivity by avoiding redevelopment and improvements in quality by incorporating components whose reliability has already been established. This study addresses a pivotal research issue that underlies software reuse - what factors characterize successful software reuse in large-scale systems. The research approach is to investigate, analyze, and evaluate software reuse empirically by mining software repositories from a NASA software development environment that actively reuses software. This software environment successfully follows principles of reuse-based software development in order to achieve an average reuse of 32 percent per project, which is the average amount of software either reused or modified from previous systems. We examine the repositories for 25 software systems ranging from 3,000 to 112,000 source lines from this software environment. We analyze four classes of software modules: modules reused without revision, modules reused with slight revision (<25 percent revision), modules reused with major revision (/spl ges/25 percent revision), and newly developed modules. We apply nonparametric statistical models to compare numerous development variables across the 2,954 software modules in the systems. We identify two categories of factors that characterize successful reuse-based software development of large-scale systems: module design factors and module implementation factors. We also evaluate the fault rates of the reused, modified, and newly developed modules. The module design factors that characterize module reuse without revision were (after normalization by size in source lines): few calls to other system modules, many calls to utility functions, few input-output parameters, few reads and writes, and many comments. The module implementation factors that characterize module reuse without revision were small size in source lines and (after normalization by size in source lines): low development effort and many assignment statements. The modules reused without revision had the fewest faults, fewest faults per source line, and lowest fault correction effort. The modules reused with major revision had the highest fault correction effort and highest fault isolation effort as wed as the most changes, most changes per source line, and highest change correction effort. In conclusion, we outline future research directions that build on these software reuse ideas and strategies.

A formal concurrency model based architecture description language for synthesis of software development tools

Rapidly increasing design and manufacturing non-recurring engineering (NRE) costs are prompting a shift in electronic design from hardwired application specific integrated circuits (ASICs) to the use of software on programmable platforms. However, in order to minimize the power and performance overhead of such processors, we are seeing the introduction of domain or application specific processors such as network and communication processors. The design of such specialized processors requires software development tools such as simulators and compilers. In order to quickly develop these tools for multiple design points under consideration, it is highly desirable to have them synthesized from formal processor descriptions written in Architecture Description Languages (ADLs). In this paper, we present the Mescal Architecture Description Language (MADL). MADL features a two-layer structure, a core layer and an annotation layer. The core layer is based on a formal and flexible microprocessor model -- the operation state machine (OSM), which enables MADL to express the concurrency at the operation execution level for a wide range of architectures. We address the challenges faced in designing the core layer to combine the OSM model with techniques for achieving compact processor descriptions. The annotation layer features a generic syntax that allows creating annotation schemes to specify implementation dependent or tool specific information. To show the effectiveness of MADL, we present an MADL-based simulator synthesis framework that has been used to generate efficient cycle accurate simulators and instruction set simulators with very low development effort. We also describe our annotation schemes that enable the extraction of architecture properties for use in instruction scheduling and integer-linear-programming based register allocation. Our experimental results demonstrate the efficacy of MADL as a practical and promising language for the development of programmable platforms.

APPLYING CASE-BASED REASONING TO SUPPORT DYNAMIC FRAMEWORK DOCUMENTATION

From the framework-based application developer point of view, good documentation approaches are those that gather appropriate framework information (usage experiences, descriptive knowledge) and provide efficient mechanisms both for accessing the information represented and discovering new information from the initial one. From the framework developer point of view, documentation approaches involving a low development effort are preferable. This paper presents a Case-Based Reasoning approach for framework documentation whose retrieval and adaptation mechanisms help framework users in the access and discovery processes. The learning mechanism lets the user enrich the initial set of usage experiences, reducing thereby the initial documentation development effort.

Migrant threads on process farms: parallel programming with Ariadne

We present a novel and portable threads-based system for concurrent applications on shared- and distributed-memory environments. The Ariadne system provides stateful user-space threads that can be very effective in medium to coarse grained applications. The interface is the same for uniprocessors and multiprocessors. Sequential programs are readily converted into parallel programs for shared or distributed memory, with low development effort. Ariadne supports the development of customized schedulers, and offers a thread migration capability in distributed environments. Scheduling of computations at the threads level enables both task- and data-driven executions. Thread migration is a useful feature which turns remote memory accesses into local accesses, enables load-balancing and simplifies program development. Ariadne employs a unique runtime stack rewriting mechanism to migrate threads between homogeneous processors. Ariadne currently runs on the SPARC (SunOS 4.x, SunOS 5.x), Sequent Symmetry, Intel Paragon, Silicon Graphics IRIX and IBM RS/6000 environments. We present some examples of Ariadne programs, along with performance measurements. © 1998 John Wiley & Sons, Ltd.