Low-density Parity-check Coding System Research Articles

Performance Evaluation of Burst Error Correction by LDPC Coding and Iterative Decoding System in Magnetic Tape Drive

The tolerance for burst error of interleaved low-density parity-check (LDPC) code is evaluated with the cross-interleaved Reed–Solomon code (CIRC) in the magnetic tape drive using a BaFe magnetic tape. We evaluate the interleaved LDPC coding and iterative decoding system with burst error detector (LDPC-BD) system by the required signal-to-noise ratio (SNR) to achieve “No errors” for the burst-like deterioration such as media defects to the CIRC with erasure error correction (CIRC-EC) system by computer simulation. The results clarify that the LDPC-BD system tolerates the longer burst errors than the CIRC-EC system and the LDPC-BD system achieves “No errors” with the 3.0–4.5 dB lower SNR than the CIRC-EC system.

A Study on AM–FM Combined Detection for Magnetic Recording Using STO Reading

A 3-D magnetic recording using microwave-assisted magnetic recording (MAMR) and a spin-torque oscillator (STO) as a reading sensor has been proposed as a candidate for the prospective recording technologies. In the STO reading system, the temporal magnetization dynamics of the STO vary not only in amplitude but also in frequency, depending on the recorded pattern. Therefore, we have constructed the STO signal model which considers both amplitude and frequency fluctuations to develop a combined signal processing using the detection of amplitude and frequency fluctuations. Furthermore, we have applied the STO signal model to the low-density parity-check (LDPC) coding and iterative decoding system with the detectors for amplitude modulation (AM) and frequency modulation (FM) and have proposed the AM-FM combined detection. Then, we have evaluated the bit error rate (BER) performances by computer simulation. The results show that the system with AM-FM combined detection improves the performance of the LDPC coding and iterative decoding system, which achieves “no errors” at the carrier-to-noise ratio for system noise CNR <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">S</sub> = 15.9$ dB, whereas the AM and FM detections require CNR <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">S</sub> = 21.2 and 17.2 dB.

UIBF decoding to lower the error floors of high‐rate systematic LDPC codes

An unreliability-based information bit flipping (UIBF) decoding using cyclic redundancy check is proposed to lower the error floors of high-rate systematic low-density parity-check (LDPC) codes. Unsuccessfully decoded codeword is redecoded by the UIBF decoding with very low complexity at the end of every iteration of the sum–product (SP) decoding. The proposed scheme is applied to LDPC codes of the IEEE 802.16e standard. Simulation results show that the proposed scheme effectively lowers the error floors of systematic LDPC codes with smaller number of iterations compared with the conventional SP decoding scheme, which leads to the reduced power consumption and increased data throughput.

Design of Low-Density Parity-Check Codes for Half-Duplex Three-Phase Two-Way Relay Channels

In two-way relay channels, two terminal nodes exchange information with the help of a relay node. Designing practical coding schemes for such channels is challenging, especially when messages are encoded into multiple streams and a destination node receives signals from multiple nodes. In this paper, we prove an achievable region for half-duplex three-phase two-way relay channels. Furthermore, we propose low-density parity-check (LDPC) codes for such channels where two source codewords are encoded by systematic LDPC codes at the relay node. To analyze the performance of the codes, discretized density evolution is derived for the joint decoder at terminal nodes. Based on the discretized density evolution, degree distributions are optimized by iterative linear programming in 3 steps. The length of the obtained optimized codes is 26% longer than the theoretic one.

Nonbinary LDPC Coding System With Symbol-By-Symbol Turbo Equalizer for Shingled Magnetic Recording

Two-dimensional magnetic recording (TDMR) by shingled magnetic recording (SMR) is one of the most promising technologies for realizing high areal densities. The read/write (R/W) channel model based on a discrete Voronoi model is relatively easily implemented to evaluate the performance of signal processing for TDMR. The nonbinary low-density parity-check (LDPC) coding and iterative decoding system provides the better performance compared with the conventional binary LDPC coding system. Furthermore, a two-dimensional equalizer (2D-EQ) can mitigate the influence of the intertrack interference (ITI) in TDMR. In this paper, the symbol-by-symbol turbo equalizer which consists of a symbol-by-symbol a posteriori probability (APP) decoder for a generalized partial response class-I (GPR1) channel with a 2D-EQ and a sum-product (SP) decoder for a nonbinary LDPC coder over Galois field of GF(28) is evaluated by computer simulation at an areal recording density of 4.12 Tbit/in2. The result shows that the symbol-by-symbol turbo equalizing system provides an SNR improvement of about 3.7 dB over the bit-by-bit turbo equalizing system.

Channel Modelling Scheme for UWB with Multiple Antennas Using Ray-Tracing Approach for Rate-Compatible Low-Density Parity-Check Codes

The work in this paper can be broadly divided into three distinct parts. In first part of this work, a deterministic channel model is developed using the art of computer game technology. The developed system can compute the impulse response of an indoor environment. First, both reflection and refraction phenomenon were considered followed by the frequency effect on the channel impulse response (CIR) analysis for 500 MHz to 4 GHz range. In the second part of the work, the designed channel model is extended to inherent antenna diversity. An efficient MIMO-UWB channel modelling scheme is implemented based on the above-mentioned channel model. First, the channel is simulated using single antenna on both sides of the system. The dense multipath channel of UWB is then efficiently exploited using different configuration of multiple antennas on both sides. Simulation results show great improvement in CIR for multiple antennas case. The last part of the work is aimed at testing the model for low-density parity-check (LDPC) codes. The results show the consistency and fine compatibility of our model under LDPC coding system.

Nonbinary LDPC Coding and Iterative Decoding System With 2-D Equalizer for TDMR R/W Channel Using Discrete Voronoi Model

A 2-D magnetic recording (TDMR) by shingled magnetic recording (SMR) is one of the most promising technologies for realizing ultra-high areal densities. We have developed the discretized granular medium model with nonmagnetic grain boundaries and the simple writing process considering intergranular exchange fields and magnetostatic interaction fields between grains on the discrete Voronoi model for TDMR. In this paper, the bit-error rate (BER) performance of the iterative decoding system using a nonbinary low-density parity-check (LDPC) code over Galois field GF(q) with the 2-D finite-impulse-response equalizer (2D-FIRE) is obtained via computer simulation using an R/W channel model employing the writing process under TDMR specifications of 4.12 Tb/in2, and it is compared to that with the 1-D FIRE (1D-FIRE). The results show that the BER performance of the nonbinary LDPC coding and iterative decoding system with the 2D-FIRE is better than that with the 1D-FIRE.

Turbo Equalization Effect for Nonbinary LDPC Code in BPM R/W Channel

It is expected for the nonbinary low-density parity-check (LDPC) coding and iterative decoding system to introduce the turbo equalization in order to enhance the error correction ability in the bit-patterned medium (BPM) R/W channel. In this paper, we investigate the effect of the turbo equalization on the bit-error rate (BER) performance of nonbinary LDPC coding and iterative decoding system over Galois filed GF(2 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">8</sup> ) in BPM R/W channel with write-error at an areal recording density of 2 Tbit/inch <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> considering the coding rate loss. The performance of turbo equalization using the nonbinary LDPC coding and iterative decoding system is evaluated by computer simulation, and it is compared to that without turbo equalization. The results show that the nonbinary LDPC and iterative decoding system with the turbo equalization has the larger write-margin compared to that without turbo equalization.

A Study on Nonbinary LDPC Coding and Iterative Decoding System in BPM R/W Channel

In this paper, the iterative decoding system using the nonbinary low-density parity-check (LDPC) code is studied in the magnetic recording system using a bit-patterned media (BPM) R/W channel affected by the write head field gradient, the media switching field distribution (SFD), the demagnetization field from adjacent dots, and the dot position deviation in an areal recording density of 2 Tb/in <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> . The performance of iterative decoding system using the nonbinary LDPC code over Galois field of GF(2 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">8</sup> ) is evaluated by the computer simulation, and it is compared with the conventional iterative decoding system using the binary LDPC code. The results show that the nonbinary LDPC system provides better performance compared with the binary LDPC system.

Performance Evaluation of LDPC Coding and Iterative Decoding System in BPM R/W Channel Affected by Head Field Gradient, Media SFD and Demagnetization Field

We evaluate the performance of the write-margin for the low-density parity-check (LDPC) coding and iterative decoding system in the bit-patterned media (BPM) R/W channel affected by the write-head field gradient, the media switching field distribution (SFD), the demagnetization field from adjacent islands and the island position deviation. It is clarified that the LDPC coding and iterative decoding system in R/W channel using BPM at 3 Tbit/inch2 has a write-margin of about 20%.

A Study of LDPC Coding and Iterative Decoding System in Magnetic Recording System Using Bit-Patterned Medium With Write Error

In this paper, low-density parity-check (LDPC) coding and iterative decoding system is studied in the magnetic recording system using a bit-patterned medium (BPM). The magnetic recording system using BPM has a serious problem of requiring precise write synchronization to correctly write the recording sequence on each intended island. In this paper, an error locator using the parity-check matrix of LDPC code is utilized to curb the influence of write error on the iterative decoding process. The performance of the proposed system with the error locator is evaluated by computer simulation for magnetic recording system using BPM with synchronization write error at a recording density of 2 Tb/in <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> , and it is compared with a conventional Reed-Solomon (RS) encoding and decoding system. The results show that the proposed system provides better performance.

A New Burst Detection Scheme Using Parity Check Matrix of LDPC Code for Bit Flipping Burst-like Signal Degradation

In this paper, a new burst detection method using the check matrix of low-density parity-check (LDPC) code is proposed. The burst detection for the bit flipping burst-like signal degradation which the conventional burst detection using a reproducing waveform, an equalizer output, an a posteriori probability (APP) decoder output and so on cannot detect is studied. The performance of the LDPC coding and iterative decoding system with the proposed burst detector is evaluated by computer simulation for a perpendicular magnetic recording channel with bit flipping burst-like signal degradation, and it is compared with that of the RS encoding and decoding system using the erasure correction. The results show that the LDPC coding and iterative decoding system with our burst detector shows the better performance and has the resistance to the bit flipping burst-like signal degradation of about 1500 bits.

Iterative decoding algorithm using attenuated information in PMR with bit-patterned medium

In this paper, a low-density parity check (LDPC) coding and iterative decoding system is studied in perpendicular magnetic recording (PMR) with a bit-patterned medium. We propose the efficient iterative decoding algorithm attenuating reliability information, and evaluate the sector error rate (SER) performance of the LDPC coding and iterative decoding system by R/W computer simulations. It is clarified that the proposed systems provide better SER performances than that of the conventional system at an areal density of 1 Tbit/in 2 and can also prevent the error floor which appears in the performance of conventional system.

Construction of nonsystematic Low-Density Parity-Check codes based on Symmetric Balanced Incomplete Block Design

This paper studies the nonsystematic Low-Density Parity-Check (LDPC) codes based on Symmetric Balanced Incomplete Block Design (SBIBD). First, it is concluded that the performance degradation of nonsystematic linear block codes is bounded by the average row weight of generalized inverses of their generator matrices and code rate. Then a class of nonsystematic LDPC codes constructed based on SBIBD is presented. Their characteristics include: both generator matrices and parity-check matrices are sparse and cyclic, which are simple to encode and decode; and almost arbitrary rate codes can be easily constructed, so they are rate-compatible codes. Because there are sparse generalized inverses of generator matrices, the performance of the proposed codes is only 0.15dB away from that of the traditional systematic LDPC codes.

High-performance simple-encoding generator-based systematic irregular LDPC codes and resulted product codes

Low-Density Parity-Check (LDPC) code is one of the most exciting topics among the coding theory community. It is of great importance in both theory and practical communications over noisy channels. The most advantage of LDPC codes is their relatively lower decoding complexity compared with turbo codes, while the disadvantage is its higher encoding complexity. In this paper, a new approach is first proposed to construct high performance irregular systematic LDPC codes based on sparse generator matrix, which can significantly reduce the encoding complexity under the same decoding complexity as that of regular or irregular LDPC codes defined by traditional sparse parity-check matrix. Then, the proposed generator-based systematic irregular LDPC codes are adopted as constituent block codes in rows and columns to design a new kind of product codes family, which also can be interpreted as irregular LDPC codes characterized by graph and thus decoded iteratively. Finally, the performance of the generator-based LDPC codes and the resultant product codes is investigated over an Additive White Gaussian Noise (AWGN) and also compared with the conventional LDPC codes under the same conditions of decoding complexity and channel noise.

Decoding Behavior Study of LDPC Codes Under a Realistic Magnetic Recording Channel Model

Low-density parity check (LDPC) codes have shown near-capacity performance in additive white Gaussian noise (AWGN) channels. However, in magnetic recording systems, the readback signals suffer from various impairments (namely, transition noise, nonlinear transition shift, and partial erasure) in addition to AWGN. In this paper, we describe an FPGA-based advanced magnetic recording channel simulator (that includes these impairments) and an LDPC coding system. The error correcting performances of LDPC codes in the presence of such realistic impairments are investigated down to bit error rate (BER) of 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-11</sup> and frame error rate (FER) of 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-8</sup>

Block-LDPC: a practical LDPC coding system design approach

This paper presents a joint low-density parity-check (LDPC) code-encoder-decoder design approach, called Block-LDPC, for practical LDPC coding system implementations. The key idea is to construct LDPC codes subject to certain hardware-oriented constraints that ensure the effective encoder and decoder hardware implementations. We develop a set of hardware-oriented constraints, subject to which a semi-random approach is used to construct Block-LDPC codes with good error-correcting performance. Correspondingly, we develop an efficient encoding strategy and a pipelined partially parallel Block-LDPC encoder architecture, and a partially parallel Block-LDPC decoder architecture. We present the estimation of Block-LDPC coding system implementation key metrics including the throughput and hardware complexity for both encoder and decoder. The good error-correcting performance of Block-LDPC codes has been demonstrated through computer simulations. With the effective encoder/decoder design and good error-correcting performance, Block-LDPC provides a promising vehicle for real-life LDPC coding system implementations.