Abstract
Low-density parity check (LDPC) codes have shown near-capacity performance in additive white Gaussian noise (AWGN) channels. However, in magnetic recording systems, the readback signals suffer from various impairments (namely, transition noise, nonlinear transition shift, and partial erasure) in addition to AWGN. In this paper, we describe an FPGA-based advanced magnetic recording channel simulator (that includes these impairments) and an LDPC coding system. The error correcting performances of LDPC codes in the presence of such realistic impairments are investigated down to bit error rate (BER) of 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-11</sup> and frame error rate (FER) of 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-8</sup>
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