Load Commutation Switch Research Articles

Design and Analysis of a Controllable Reactor Solid-State Circuit Breaker for Enhanced Fault Current Interruption in AC/DC Microgrids

The occurrence of short-circuit faults in AC/DC microgrids gives rise to exceptionally high currents with rapid escalation, particularly in DC feeders where current zero-crossing is absent. This study introduces a comprehensive design procedure for a solid-state breaker tailored to address this challenge. A key innovation of the proposed solid-state circuit breaker lies in the incorporation of a current limiter reactor, which effectively constrains the current flow in both the load commutation switch and main breakers. Additionally, the inclusion of a resistive branch diminishes energy dissipation in the main breakers, safeguarding them against voltage stress. Consequently, the operational efficiency of the breaker is significantly enhanced, ensuring swift and efficient fault current interruption in vulnerable AC/DC microgrid scenarios. The efficacy of the proposed solid-state breaker was rigorously examined through analytical studies, and the results were validated using MATLAB/Simulink simulations. This breakthrough design represents a promising advancement in the realm of microgrid protection, offering a robust solution for mitigating the impact of short-circuit faults in AC/DC systems.

Experimental Evaluation of 5 kV, 2 kA, DC Circuit Breaker With Parallel Capacitor

This article describes design, operation and experimental testing of a mechanical DC CB (Circuit Breaker) with parallel capacitors. The topology resembles hybrid DC CB but there are possible advantages in the costs since the main semiconductor valve is replaced with capacitors, and in performance since this breaker inserts counter voltage earlier. A detailed PSCAD model is employed to support DC CB design and to analyse operating principles. A 5 kV, 2 kA hardware demonstrator with 1.5 ms disconnector opening time is developed in the university laboratory. The test results demonstrate successful breaking of DC currents, with the measured time for insertion of capacitor voltage of around 290 μs. Further experimental analysis evaluates stresses on the key components, optimal timing for opening of LCS (Load Commutation Switch) and the margins for successful current interruption.

Hybrid MVDC Circuit Breaker Based on Enhanced Arc Voltage of Vacuum Interrupter

The hybrid dc circuit breaker (HDCCB) is one of the most promising solutions for the dc interruption. But the power electronics-based load commutation switch (LCS) in the main current path causes the high on-state loss and cost, which inhibits the application of the HDCCB. In this paper, a novel hybrid dc circuit breaker is proposed, in which the vacuum interrupter with the external transverse magnetic field (ETMF) is designed to improve the arc voltage and thus enhance the current commutation to power electronics. The ETMF-based vacuum interrupter achieves the fast current commutation instead of the LCS, which realizes the low on-state loss and cost while preserving the short commutation and interruption time. The arc voltage characteristic with ETMF is analyzed, and the influence of the different factors on the commutation time and <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">di/dt</i> before current zero are investigated in detail. Based on the calculation results, a 10 kV dc breaker prototype based on the proposed topology is developed with the breaking current of 15.5 kA. Finally, the application of the proposed scheme in HVdc grids is discussed.

Topology and control of a novel hybrid HVDC circuit breaker with self-powered capability

Power supply for IGBT drive circuit of HVDC circuit breaker is a great challenge in practical engineering. At present, most of the HVDC circuit breakers rely on external power sources. This paper proposes a self-powered hybrid HVDC circuit breaker. The HVDC circuit breaker consists of an ultra-fast mechanical disconnector (UFD), a load commutation switch (LCS) and a main circuit breaker (MB). The LCS and the MB are formed by series connection of enhanced half-bridge sub-modules (EHBSMs). By this design, the energy stored in the EHBSM capacitor can be used for IGBT triggering. Thus, the self-powered function of the HVDC circuit breaker is realized. Three operation modes of the HVDC circuit breaker, including the star-up mode, the steady-state operation mode and the DC fault handling mode are analysed in detail. Finally, a four-terminal HVDC model is constructed in PSCAD simulation software. The simulation results verify the feasibility and effectiveness of the self-powered HVDC circuit breaker.

Improved multiline HVDC circuit breakers with asymmetric conducting branches

This paper proposes two improved multiline HVDC circuit breakers (DCBs) for HVDC grid applications, including type-1 improved multiline DCB and type-2 improved multiline DCB. The two improved DCBs draw on the core idea of extended H-bridge. m adjacent DC transmission lines share a single main breaker (MB) and surge arrester. Due to the extended H-bridge design, bidirectional current flow can be achieved by a unidirectional MB. An upper conducting branch and a lower conducting branch are connected to a DC line. The upper and lower conducting branches in the two improved multiline DCBs are asymmetric. The upper conducting branch of both two improved DCBs is formed by a load commutation switch (LCS) and an ultra-fast disconnector (UFD). The lower conducting branch of the type-1 improved scheme is composed of a diode and a UFD; and of the type-2 improved scheme is made up of diode stack. Compared with other DCBs, the proposed type-1 DCB and type-2 DCB are more cost effective. Among the five DCBs, the type-2 improved scheme requires the least number of individual switching actions. The effectiveness and feasibility of the proposed schemes are verified through simulation of a bipolar three-terminal HVDC grid in PSCAD/EMTDC.

Arc Characteristics of Ultra-Fast Opening Switching Contacts in Hybrid Breakers

A mechanical switch can be used instead of a power electronic load commutation switch in orderto reduce the losses during normal power flow in standard hybrid DC circuit breakers. The success of current commutation in such hybrid breakers depends on the arc voltage formed across the contacts in the mechanical switch. The behaviour of rapidly elongated, wall constricted arcsgenerated during the opening of an ultra-fast mechanical switch in the air is studied here. The voltage-current characteristics of the generated arcs are obtained for steady state contact opening velocities of 6, 11 and 21 m/s. It is found that the arc voltage at a given current and contact separation increases with the contact opening velocity. It is shown that stationary,zero-contact-velocity characteristics can not be used to accurately quantify the voltage build-up in fast elongating arcs in hybrid breakers. A best-fitting black-box equation for the dynamic arc characteristics is presented for the tested velocities. The obtained voltage-current characteristics are used as input to simulate the current commutation process in a 12 kV hybridDC circuit breaker case-study. Different scenarios of current commutation failure related to the arc voltage build up are identified. It is shown that these failures scenarios can be avoided by increasing the contact opening velocity.

An Ultraefficient DC Hybrid Circuit Breaker Architecture Based on Transient Commutation Current Injection

Protection against circuit faults represents a major technical challenge in the emerging dc transmission and distribution power networks. A popular prior-art dc hybrid circuit breaker (HCB) using a series load commutation switch (LCS) offers an excellent solution with arcless operation but suffers from a high conduction power loss associated with the LCS. This article proposes a new HCB architecture that relies on a switching-mode transient commutation current injector (TCCI) circuit instead of the LCS. The TCCI in the electronic path remains in a standby mode with near-zero power loss under normal conditions, but can rapidly generate a pulse current matching the fault current, and therefore facilitate current commutation from the mechanical to the electronic path. It completely eliminates the conduction power loss associated with the LCS, and delivers ultrahigh transmission efficiency. The TCCI circuit provides a near-zero voltage and a small high-frequency ac ripple current condition for the mechanical contacts to separate arclessly. A 600-V/20-A HCB prototype based on a two-phase current source buck converter topology and a high-voltage vacuum relay has experimentally validated the HCB concept, and demonstrated a mechanical to electronic commutation time of 7.2 μs, a total active response time of 310 μs, and a peak interrupted fault current of 89 A at a dc bus voltage of 400 V. The new HCB architecture can be applicable in medium voltage direct current (MVDC) (>5 kV) and high voltage direct current (HVDC) (>100 kV) applications as well.

DC Fault Current Blocking With the Coordination of Half-Bridge MMC and the Hybrid DC Breaker

In this article, a modified hybrid dc breaker and a half-bridge modular multilevel converter (MMC) are employed to interrupt the dc fault current in a high-voltage direct current transmission system. In the hybrid dc breaker, parallel to the main branch, a series connection of an energy-absorbing capacitor and a Thyristor stack is employed. When a dc fault current is recognized, the Thyristor stack is triggered and the load commutation switch in the main branch is turned off. In addition, in the fault clearing state, the MMC is programmed to generate zero voltages at all arms. Using this mechanism, a second-order RLC circuit with zero input is formed, and the fault current is cleared in a very short time. A freewheeling path is provided to bypass the dc line when the equivalent inductance seen from the dc line is large. In contrast to conventional approaches, the peak of dc fault current is limited to a specific limit and the necessity to ultrafast mechanical switches is avoided. In addition, the amplitude of arms currents and corresponding insulated-gate bipolar transistors are kept in the safe operating area. A detailed circuit analysis of the new method is given and design formulas are extracted. Simulation results are provided in PSCAD/EMTDC environment, and experimental results are presented for a scaled-down prototype.

Development of a Novel HVdc Circuit Breaker Combining Liquid Metal Load Commutation Switch and Two-Stage Commutation Circuit

The emerging demand on development of high-voltage direct current (HVdc) networks brings about an increasingly urgent need for a fast and reliable HVdc circuit breaker. This paper proposes a novel topology of HVdc circuit breaker combining a liquid metal load commutation switch and a two-stage commutation circuit, which offers an effective solution for isolating faults while preserving larger current breaking capability and lower overvoltage rate of rise. With the topology optimized in terms of circuit parameters for determining their optimum design values, the handling of short-circuit faults for the proposed circuit breaker in HVdc application is predicted theoretically. Finally, preliminary tests from a developed low-power prototype are presented together with a comparative simulation study provided to verify the performance of the proposed HVdc circuit breaker.

No-Load Dielectric Recovery of the Ultra-Fast Vacuum Switch in Hybrid DC Circuit Breaker

The no-load curve of the dielectric recovery strength of the ultra-fast mechanical vacuum switch (MVS) changing with time is the theoretical foundation to optimize the turn-off strategy of the hybrid direct current circuit breaker with load commutation switch. To avoid the shortcomings of the classic synthetic circuit, a novel test circuit is proposed to measure the no-load dielectric recovery curve of the MVS in this paper. In the test circuit, a succession of pulse voltages is automatically applied on the MVS, and multiple breakdowns of the MVS occur in one test. Therefore, the dielectric strength of the MVS at multiple time points is obtained, and the envelope of the applied voltage on the MVS during one test can describe the dielectric recovery curve of the MVS; as a result, the test workload could be reduced dramatically and the measurement is more authentic. By changing test conditions, including the rate of rise of the test voltage and the operating speed of the MVS, no-load dielectric recovery characteristics are studied. The research has shown that the dielectric recovery speed of the MVS is irrelative with the rate of rise of the test voltage and it is directly proportional to the opening speed of the MVS.

A Modular Multilevel Converter Integrated With DC Circuit Breaker

The direct-current (dc) fault-clearance capability of the modular multilevel converter (MMC) is a key issue for overhead line applications of voltage source converter-based high-voltage dc (VSC-HVDC) transmission systems. An MMC integrated with a dc circuit breaker (IDCB-MMC) is proposed to provide a cost-effective DC fault clearance and isolation solution. A mechanical switch (MS) and a load commutation switch are connected in series as the main branch of the dc circuit breaker. DC fault currents can be forced to transfer to converter- and line-side energy absorbing branches when submodule bypass protection and dc circuit breaker interrupting operations are coordinated. Therefore, the bulky and costly solid-state branch that uses numerous semiconductor devices and surge arresters can be eliminated. The dc fault clearance and isolation capability of the IDCB-MMC were verified through the simulation results for one pole of a 1000 MW/±320 kV VSC-HVDC system. Compared with an MMC that uses half-bridge SMs, the IDCB-MMC only requires few additional capacitors and switching devices and a simple MS, thereby resulting in several advantages, such as low cost, footprint requirements, and additional conduction losses.

Integrated HVDC Circuit Breakers With Current Flow Control Capability

Two key problems in meshed high-voltage direct current (HVDC) transmission grids are managing line power flows and protection against dc faults. Current flow controllers (CFCs) will be required to balance cable currents in meshed dc grids, in order to prevent individual line power capacity limits restricting overall power flow in the grid. Direct current circuit breakers (DCCBs) will be also required to protect HVDC grids from dc faults. This paper demonstrates that the current flow controller functionality can be added into a hybrid CB's design. This paper proposes integrating an interline CFC into the load commutation switch (LCS) of a hybrid DCCB. The integrated design LCS/CFC is analyzed and a state-space model is derived. The control of the CFC is designed and the performance of the LCS/CFC during normal operation is verified by means of MATLAB Simulink and PSCAD simulations. A comparison of the integrated LCS/CFC and the separate design is given. The case studies show a reduction in total power losses, and improved protection operation times can be achieved.

Technical Assessment of Load Commutation Switch in Hybrid HVDC Breaker

The development of a large-scale high-voltage direct current (HVDC) power grid requires a reliable, fast, and low-loss circuit breaker. The load commutation switch (LCS) is an essential part of ABB's 1200-MW hybrid HVDC breaker concept, which builds up a low-loss conducting path for the load current. The technical requirements for the LCS are expressed in this paper by studying the operation principle of the hybrid HVDC breaker. The voltage stress over the LCS is determined based on a dc grid with 320 and 2 kA rated voltage and current. A system model of the hybrid HVDC breaker is developed in PSCAD/EMTDC to study the design criteria for snubber circuit and arrester blocks. It is observed that conventional snubber circuits are not suitable for a bidirectional LCS as the current of snubber capacitors prevent the fast interruption action. A modified snubber circuit is proposed in this paper along with two more alternatives for the LCS to overcome this problem. Moreover, the power loss model for a semiconductor device is discussed in this paper based on the 4.5-kV StakPak IGBT. The model is used to calculate the conduction power losses for different LCS topologies. Ultimately, a matrix of 3 $\times$ 3 IGBT modules is selected to provide a reliable LCS design which can handle several internal fault cases with no interruption of operation. A full-scale prototype has been constructed and tested in ABB HVDC Center, Ludvika, Sweden. The experimental test results are also included in the paper in order to verify the calculation and simulation study.