Linear Network Topology Research Articles

Arithmetic on a distributed-memory quantum multicomputer

We evaluate the performance of quantum arithmetic algorithms run on a distributed quantum computer (a quantum multicomputer). We vary the node capacity and I/O capabilities, and the network topology. The tradeoff of choosing between gates executed remotely, through “teleported gates” on entangled pairs of qubits (telegate), versus exchanging the relevant qubits via quantum teleportation, then executing the algorithm using local gates (teledata), is examined. We show that the teledata approach performs better, and that carry-ripple adders perform well when the teleportation block is decomposed so that the key quantum operations can be parallelized. A node size of only a few logical qubits performs adequately provided that the nodes have two transceiver qubits. A linear network topology performs acceptably for a broad range of system sizes and performance parameters. We therefore recommend pursuing small, high-I/O bandwidth nodes and a simple network. Such a machine will run Shor's algorithm for factoring large numbers efficiently.

Distributed Arithmetic on a Quantum Multicomputer

We evaluate the performance of quantum arithmetic algorithms run on a distributed quantum computer (a quantum multicomputer). We vary the node capacity and I/O capabilities, and the network topology. The tradeoff of choosing between gates executed remotely, through "teleported gates" on entangled pairs of qubits (telegate), versus exchanging the relevant qubits via quantum teleportation, then executing the algorithm using local gates (teledata), is examined. We show that the teledata approach performs better, and that carry-ripple adders perform well when the teleportation block is decomposed so that the key quantum operations can be parallelized. A node size of only a few logical qubits performs adequately provided that the nodes have two transceiver qubits. A linear network topology performs acceptably for a broad range of system sizes and performance parameters. We therefore recommend pursuing small, high-I/O bandwidth nodes and a simple network. Such a machine will run Shor's algorithm for factoring large numbers efficiently.

A note on the performance of ENET II

The performance of the ENET II protocol is discussed and compared to the performance of the commercial Ethernet. Linear network topologies with various number of stations uniformly distributed along the bus are considered. The comparison is based on extensive simulation studies and a recently published performance analysis of ENET II by Y.-C. Liu and G.L. Wise (1987). The experimental results agree with the analysis by Liu and Wise, but they do not confirm the results of M.K. Molloy (1985).< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

Computer-aided linear modelling of high-frequency bipolar transistors

The paper describes a modelling technique which employs the modified Gauss-Newton optimisation algorithm in conjunction with some strategies for modifying linear network topology. Results obtained in a number of cases of modelling high-frequency transistors are given, demonstrating the power of the technique. It is emphasised that all changes in model topology are decided entirely automatically by the computer.