Lightweight Architectures Research Articles

Design and Deployment of an Image Polarity Detector with Visual Attention

Embedding the ability of sentiment analysis in smart devices is especially challenging because sentiment analysis relies on deep neural networks, in particular, convolutional neural networks. The paper presents a novel hardware-friendly detector of image polarity, enhanced with the ability of saliency detection. The approach stems from a hardware-oriented design process, which trades off prediction accuracy and computational resources. The eventual solution combines lightweight deep-learning architectures and post-training quantization. Experimental results on standard benchmarks confirmed that the design strategy can infer automatically the salient parts and the polarity of an image with high accuracy. Saliency-based solutions in the literature prove impractical due to their considerable computational costs; the paper shows that the novel design strategy can deploy and perform successfully on a variety of commercial smartphones, yielding real-time performances.

Disease detection in tomato leaves via CNN with lightweight architectures implemented in Raspberry Pi 4

Deep learning has made essential contributions to classification and detection tasks applied to precision agriculture; however, it is vitally important to move towards an adoption of these techniques and algorithms through low-cost and low-consumption devices for daily use in crop fields. In this paper, we present the training and evaluation of four recent Convolutional Neural Networks models for the classification of diseases in tomato leaves. A subset of the Plantvillage dataset consisting of 18,160 RGB images has been divided into ten classes for transfer learning. The selected models have depthwise separable convolution architecture for application in low-power devices. Evaluation and analysis quantitatively and qualitatively is performed via quality metrics and saliency maps. Finally, an implementation on the Raspberry Pi 4 microcomputer with a graphical user interface is developed.

A Training Method for Low Rank Convolutional Neural Networks Based on Alternating Tensor Compose-Decompose Method

Over the past decade, deep learning-based computer vision methods have been shown to surpass previous state-of-the-art computer vision techniques in various fields, and have made great progress in various computer vision problems, including object detection, object segmentation, face recognition, etc. Nowadays, major IT companies are adding new deep-learning-based computer technologies to edge devices such as smartphones. However, since the computational cost of deep learning-based models is still high for edge devices, research is being actively carried out to compress deep learning-based models while not sacrificing high performance. Recently, many lightweight architectures have been proposed for deep learning-based models which are based on low-rank approximation. In this paper, we propose an alternating tensor compose-decompose (ATCD) method for the training of low-rank convolutional neural networks. The proposed training method can better train a compressed low-rank deep learning model than the conventional fixed-structure based training method, so that a compressed deep learning model with higher performance can be obtained in the end of the training. As a representative and exemplary model to which the proposed training method can be applied, we propose a rank-1 convolutional neural network (CNN) which has a structure alternatively containing 3-D rank-1 filters and 1-D filters in the training stage and a 1-D structure in the testing stage. After being trained, the 3-D rank-1 filters can be permanently decomposed into 1-D filters to achieve a fast inference in the test time. The reason that the 1-D filters are not being trained directly in 1-D form in the training stage is that the training of the 3-D rank-1 filters is easier due to the better gradient flow, which makes the training possible even in the case when the fixed structured network with fixed consecutive 1-D filters cannot be trained at all. We also show that the same training method can be applied to the well-known MobileNet architecture so that better parameters can be obtained than with the conventional fixed-structure training method. Furthermore, we show that the 1-D filters in a ResNet like structure can also be trained with the proposed method, which shows the fact that the proposed method can be applied to various structures of networks.

A Lightweight and Real-Time Hardware Architecture for Interference Detection and Mitigation of Time Synchronization Attacks Based on MLP Neural Networks

Stationary GPS receivers provide time information for critical infrastructures, such as phasor measurement units (PMUs), communication networks, and financial systems. Therefore, they are prone to a specific type of spoofing attack called time synchronization attack (TSA), which affects time information such as clock offset and clock drift. The receiver’s position remains constant during the attack; hence, attack detection and mitigation are challenging. Various countermeasures have been suggested to mitigate TSA effects. However, they are mainly software-based and are exploited to protect software implemented software-defined radios (SDRs). In this research, two hardware protection approaches are contributed for hardware-based SDRs based on multi-layer perceptron neural network (MLP NN) with sigmoid activation function. The most challenging part of MPL NN implementation is the activation function approximation. Therefore, two lightweight architectures are proposed for sigmoid function implementation. Linear approximation and look-up table (LA-LUT) and piece-wise linear approximation (PLA) are exploited for this task. The synthesis results demonstrate that the PLA approach has a slightly higher resource utilization in comparison to LA-LUT, while this method is more accurate. The mean squared error (MSE) of the PLA approach is equal to 0.019, which is 57% better than the LA-LUT approach with an MSE of 0.033. Furthermore, the designs are evaluated by two conventional types of TSA. According to the results, both methods are lightweight, and they only consume less than 0.3% of slice registers, 5% of slice LUTs, and 8% of DSP48E1Ss. Furthermore, they are real-time, and can mitigate the attack consequences; however, the PLA architecture has a better performance compared to LA-LUT.

A Meta-Heuristic Automatic CNN Architecture Design Approach Based on Ensemble Learning

Convolutional Neural Networks (CNNs) models achieve a dominant performance on immense domains. There are CNNs that come in numerous topologies of different sizes. This field’s challenge is to design the right CNN architecture for a specific problem to attain high results with low computing resources for training this architecture. Our proposed automatic design approach is concerned with finding a solution to this challenge. The suggested framework is based on the genetic algorithm that works on evolving a population of CNN models to find the best-fitted architecture. Unlike the co-related work, our proposed method is concerned with generating lightweight architectures that are characterized by a low number of parameters with preserving high validation accuracy based on an ensemble learning technique. This framework is designed to work on limited computing resources to be feasible for deployment in a variety of environments. Four popular benchmark image datasets are used to validate the proposed framework, and it is compared to the peer competitors work based on various methods in terms of validation accuracy, the number of model’ parameters, the number of used Graphical Processing Units (GPUs), and GPU days was taken to complete the process. Our experimental results showed mainly superiority in terms of GPU days with relatively high validation accuracy and a low number of parameters of the discovered model.

Melting SNOW-V: improved lightweight architectures

SNOW-V is a stream cipher proposed by Ekdahl et al. at IACR ToSC 2019(3) with an objective to be deployed as the encryption primitive in 5G systems. The stream cipher offers 256-bit security and is ready for deployment in the post-quantum era, in which as a rule of thumb (due to Grover’s algorithm), quantum security will vary as the square root of the classical security parameters. The authors further report good software performance figures in systems supporting the AES-NI instruction set. However, they only provide a theoretical analysis of the cipher’s hardware efficiency. In this paper, we aim to fill this gap. We look at the three most important metrics of hardware efficiency: area, speed and power/energy, and propose circuits that optimize each of these metrics and validate our results using three different standard cell libraries. The smallest SNOW-V circuit we propose occupies only around 4776 gate equivalents of silicon area. Furthermore, we also report implementations which consume as little as 12.7 pJ per 128 bits of keystream and operate at a throughput rate of more than 1 Tbps.

DEEP SEMANTIC SEGMENTATION FOR THE OFF-ROAD AUTONOMOUS DRIVING

Abstract. This paper is devoted to the problem of image semantic segmentation for machine vision system of off-road autonomous robotic vehicle. Most modern convolutional neural networks require large computing resources that go beyond the capabilities of many robotic platforms. Therefore, the main drawback of such models is extremely high complexity of the convolutional neural network used, whereas tasks in real applications must be performed on devices with limited resources in real-time. This paper focuses on the practical application of modern lightweight architectures as applied to the task of semantic segmentation on mobile robotic systems. The article discusses backbones based on ResNet18, ResNet34, MobileNetV2, ShuffleNetV2, EfficientNet-B0 and decoders based on U-Net and DeepLabV3 as well as additional components that can increase the accuracy of segmentation and reduce the inference time. In this paper we propose a model using ResNet34 and DeepLabV3 decoding with Squeeze & Excitation blocks that was optimal in terms of inference time and accuracy. We also demonstrate our off-road dataset and simulated dataset for semantic segmentation. Furthermore, we present that using pre-trained weights on simulated dataset achieves to increase 2.7% mIoU on our off-road dataset compared pre-trained weights on the Cityscapes. Moreover, we achieve 75.6% mIoU on the Cityscapes validation set and 85.2% mIoU on our off-road validation set with a speed of 37 FPS for a 1,024×1,024 input on one NVIDIA GeForce RTX 2080 card using NVIDIA TensorRT.

PolSAR Image Classification with Lightweight 3D Convolutional Networks

Convolutional neural networks (CNNs) have become the state-of-the-art in optical image processing. Recently, CNNs have been used in polarimetric synthetic aperture radar (PolSAR) image classification and obtained promising results. Unlike optical images, the unique phase information of PolSAR data expresses the structure information of objects. This special data representation makes 3D convolution which explicitly modeling the relationship between polarimetric channels perform better in the task of PolSAR image classification. However, the development of deep 3D-CNNs will cause a huge number of model parameters and expensive computational costs, which not only leads to the decrease of the interpretation speed during testing, but also greatly increases the risk of over-fitting. To alleviate this problem, a lightweight 3D-CNN framework that compresses 3D-CNNs from two aspects is proposed in this paper. Lightweight convolution operations, i.e., pseudo-3D and 3D-depthwise separable convolutions, are considered as low-latency replacements for vanilla 3D convolution. Further, fully connected layers are replaced by global average pooling to reduce the number of model parameters so as to save the memory. Under the specific classification task, the proposed methods can reduce up to 69.83% of the model parameters in convolution layers of the 3D-CNN as well as almost all the model parameters in fully connected layers, which ensures the fast PolSAR interpretation. Experiments on three PolSAR benchmark datasets, i.e., AIRSAR Flevoland, ESAR Oberpfaffenhofen, EMISAR Foulum, show that the proposed lightweight architectures can not only maintain but also slightly improve the accuracy under various criteria.

A2Net: Adjacent Aggregation Networks for Image Raindrop Removal

Existing methods for single images raindrop removal either have poor robustness or suffer from parameter burdens. In this paper, we propose a new Adjacent Aggregation Network (A 2 Net) with lightweight architectures to remove raindrops from single images. Instead of directly cascading convolutional layers, we design an adjacent aggregation architecture to better fuse features for rich representations generation, which can lead to high quality images reconstruction. To further simplify the learning process, we utilize a problem-specific knowledge to force the network focus on the luminance channel in the YUV color space instead of all RGB channels. By combining adjacent aggregating operation with color space transformation, the proposed A 2 Net can achieve state-of-the-art performances on raindrop removal with significant parameters reduction.

4D Printing of Recyclable Lightweight Architectures Using High Recovery Stress Shape Memory Polymer

High-performance lightweight architectures, such as metallic microlattices with excellent mechanical properties have been 3D printed, but they do not possess shape memory effect (SME), limiting their usages for advanced engineering structures, such as serving as a core in multifunctional lightweight sandwich structures. 3D printable self-healing shape memory polymer (SMP) microlattices could be a solution. However, existing 3D printable thermoset SMPs are limited to either low strength, poor stress memory, or non-recyclability. To address this issue, a new thermoset polymer, integrated with high strength, high recovery stress, perfect shape recovery, good recyclability, and 3D printability using direct light printing, has been developed in this study. Lightweight microlattices with various unit cells and length scales were printed and tested. The results show that the cubic microlattice has mechanical strength comparable to or even greater than that of metallic microlattices, good SME, decent recovery stress, and recyclability, making it the first multifunctional lightweight architecture (MLA) for potential multifunctional lightweight load carrying structural applications.

New Lightweight Architectures for Secure FSM Design to Thwart Fault Injection and Trojan Attacks

Finite state machine (FSM) is a critical part in digital processing devices used in Internet of Things (IoT) applications as it controls complete functionality of the device. The synthesis tool implements deterministic FSM by adding extra don’t care states/transitions during optimization. This additional insertion makes the FSM vulnerable to setup-time violation based fault injection (STVFI) and hardware Trojan attacks. The existing techniques are inefficient to completely mitigate these vulnerabilities and exhibit significant design overhead. Therefore, this paper presents a novel lightweight secure machine design technique that completely mitigates the vulnerabilities with minimum overhead. The paper first proposes a new metric to identify all types of vulnerable transitions (VTs) followed by a trustworthy FSM design algorithm and efficient vulnerability mitigation architecture (EVMA). Though our EVMA completely alleviates the vulnerabilities to STVFI and Trojan attacks, it slightly increases the overhead due to additional multiplexers. Hence, we also propose new secure FSM design algorithm and two new lightweight vulnerability mitigation architectures (LVMA-I and LIVMA-II) that control the FFs using existing clear and/or preset pins instead of multiplexers. The experimental results on AES and RSA encryption modules show that the proposed technique detects 100% VTs. Further, ASIC and FPGA implementation of the proposed LIVMA-II using Cadence RTL and Xilinx Vivado presents on an average 40%, 59.6%, and 51.1% reduced area, power and delay respectively compared to the well-known technique. Due to negligible design overhead, our technique is best suitable for designing secure controller of portable IoT devices.

Lightweight Architectures for Reliable and Fault Detection Simon and Speck Cryptographic Algorithms on FPGA

The widespread use of sensitive and constrained applications necessitates lightweight (low-power and low-area) algorithms developed for constrained nano-devices. However, nearly all of such algorithms are optimized for platform-based performance and may not be useful for diverse and flexible applications. The National Security Agency (NSA) has proposed two relatively recent families of lightweight ciphers, that is, Simon and Speck, designed as efficient ciphers on both hardware and software platforms. This article proposes concurrent error detection schemes to provide reliable architectures for these two families of lightweight block ciphers. The research work on analyzing the reliability of these algorithms and providing fault diagnosis approaches has not been undertaken to date to the best of our knowledge. The main aim of the proposed reliable architectures is to provide high error coverage while maintaining acceptable area and power consumption overheads. To achieve this, we propose a variant of recomputing with encoded operands. These low-complexity schemes are suited for low-resource applications such as sensitive, constrained implantable and wearable medical devices. We perform fault simulations for the proposed architectures by developing a fault model framework. The architectures are simulated and analyzed on recent field-programmable grate array (FPGA) platforms, and it is shown that the proposed schemes provide high error coverage. The proposed low-complexity concurrent error detection schemes are a step forward toward more reliable architectures for Simon and Speck algorithms in lightweight, secure applications.

Implementing QC-MDPC McEliece Encryption

With respect to performance, asymmetric code-based cryptography based on binary Goppa codes has been reported as a highly interesting alternative to RSA and ECC. A major drawback is still the large keys in the range between 50 and 100KB that prevented real-world applications of code-based cryptosystems so far. A recent proposal by Misoczki et al. showed that quasi-cyclic moderate-density parity-check (QC-MDPC) codes can be used in McEliece encryption, reducing the public key to just 0.6KB to achieve an 80-bit security level. In this article, we provide optimized decoding techniques for MDPC codes and survey several efficient implementations of the QC-MDPC McEliece cryptosystem. This includes high-speed and lightweight architectures for reconfigurable hardware, efficient coding styles for ARM’s Cortex-M4 microcontroller, and novel high-performance software implementations that fully employ vector instructions. Finally, we conclude that McEliece encryption in combination with QC-MDPC codes not only enables high-performance implementations but also allows for lightweight designs on a wide range of different platforms.

Dual-Basis Superserial Multipliers for Secure Applications and Lightweight Cryptographic Architectures

Cryptographic algorithms utilize finite-field arithmetic operations in their computations. Due to the constraints of the nodes which benefit from the security and privacy advantages of these algorithms in sensitive applications, these algorithms need to be lightweight. One of the well-known bases used in sensitive computations is dual basis (DB). In this brief, we present low-complexity superserial architectures for the DB multiplication over GF(2 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">m</sup> ). To the best of our knowledge, this is the first time that such a multiplier is proposed in the open literature. We have performed complexity analysis for the proposed lightweight architectures, and the results show that the hardware complexity of the proposed superserial multiplier is reduced compared with that of regular serial multipliers. This has been also confirmed through our application-specific integrated circuit hardware- and time-equivalent estimations. The proposed superserial architecture is a step forward toward efficient and lightweight cryptographic algorithms and is suitable for constrained implementations of cryptographic primitives in applications such as smart cards, handheld devices, life-critical wearable and implantable medical devices, and constrained nodes in the blooming notion of Internet of nano-Things.

The First Launch of an Autonomous Thrust-Driven Microrobot Using Nanoporous Energetic Silicon

As the capability and complexity of robotic platforms continue to evolve from the macro to the micron scale, the challenge of achieving autonomy requires the development of robust, lightweight architectures. These architectures must provide a platform upon which actuators, control, sensing, power, and communication modules are integrated for optimal performance. In this paper, the first autonomous jumping microrobotic platform is demonstrated using a hybrid integration approach to assemble on-board control, sensing, power, and actuation directly onto a polymer chassis. For the purposes of this paper, jumping is defined as brief parabolic motion achieved via an actuation pulse at takeoff. In this paper, the actuation pulse comes from the rapid release of chemical energy to create propulsion. The actuation pulse lasts several microseconds and is achieved using a novel high-force/low-power thrust actuator, nanoporous energetic silicon, resulting in 250 μJ of kinetic energy delivered to the robot and a vertical height of approximately 8 cm.

Business intelligence for small and middle-sized entreprises

Data warehouses are the core of decision support systems, which nowadays are used by all kind of enterprises in the entire world. Although many studies have been conducted on the need of decision support systems (DSSs) for small businesses, most of them adopt existing solutions and approaches, which are appropriate for large-scaled enterprises, but are inadequate for small and middle-sized enterprises. Small enterprises require cheap, lightweight architectures and tools (hardware and software) providing online data analysis. In order to ensure these features, we review web-based business intelligence approaches. For real-time analysis, the traditional OLAP architecture is cumbersome and storage-costly; therefore, we also review in-memory processing. Consequently, this paper discusses the existing approaches and tools working in main memory and/or with web interfaces (including freeware tools), relevant for small and middle-sized enterprises in decision making.

Using event-driven lightweight DSC-based agents for MAS modelling

To date several agent models and related programming frameworks have been introduced for developing distributed applications in terms of multi-agent systems in open and dynamic environments. Among them, those based on lightweight architectures, asynchronous messages/events and state-based programming such as JADE, Bond and Actors have demonstrated great effectiveness for modelling open and distributed software systems. In this paper, we propose the event-driven lightweight distilled statecharts-based agent (ELDA) model which is based on the same fundamentals of the aforementioned agent models and frameworks, and provides a more effective design enabled by: a Statecharts-based specification of the agent behaviour, multiple coordination spaces for local/remote inter-agent and agent/non-agent-component interactions, and a coarse-grained strong agent mobility. A MAS based on the ELDA model can be easily designed through the ELDA meta-model and programmed through a Java-based implementation of the meta-model (ELDAFramework). Visual programming and automatic code generation of the MAS under-development is supported by an Eclipse-based visual tool (ELDATool). The produced MAS code can be executed by a discrete-event simulator framework (ELDASim) which allows for the validation of the MAS under-development. A simple yet effective case study is provided to exemplify the proposed model and its related tools.