Memory Lifetime Research Articles

Light-induced fictitious magnetic fields for quantum storage in cold atomic ensembles

In this paper, we have demonstrated that optically generated fictitious magnetic fields can be utilized to extend the lifetime of quantum memories in cold atomic ensembles. All the degrees of freedom of an AC Stark shift, such as polarization, spatial profile, and temporal waveform, can be readily controlled in a precise manner. Temporal fluctuations over several experimental cycles and spatial inhomogeneities along a cold atomic gas have been compensated by an optical beam. The advantage of employing fictitious magnetic fields for quantum storage lies in the speed and spatial precision with which these fields can be synthesized. Our simple and versatile technique can find widespread application in coherent pulse and single-photon storage across various atomic species. Published by the American Physical Society 2024

AmLuCEP: Amalgamating LUT-based Compression and Adaptive Encoding Assisted Block Placement To Improve Lifetime of PCM-based Main Memories

With the rising demands for high capacity memory and poor scalability of the existing DRAM-based main memories, the emerging Non-volatile memories captures higher attention due to their high density and low leakage power consumption. However, the possible consideration of such memories as alternatives of DRAM is largely hindered by their intrinsic drawbacks like high write latency, high write energy and low write endurance. In this article, we propose an integrated solution by combining the effect of compression and encoding assisted block placement to improve lifetime of NVMs. We have developed a compression technique called LUT_Comp by exploiting the word-level redundancy present in the words of the incoming cache blocks to NVM. LUT_Comp remains effective in reducing bit-flips in NVMs by offering a balance in compression ratio and coverage (Cov). Additionally, we also propose an encoding based block placement policy that places the compressed blocks in the appropriate half within the memory. The integrated approach of compression and block placement termed AmLuCEP offers a uniform bit-flips distribution while further reducing bit-flips in NVM. Experimental results show that AmLuCEP reduces bit-flips by 54%, 42%, 37%, 21%; energy consumption by 41%, 28%, 24%, 13%; and improves lifetime by 57%, 40%, 38%, 21% over baseline and the existing techniques READ [ 38 ], COEF [ 39 ] and SELEC [ 13 ], respectively.

Software stewardship and advancement of a high-performance computing scientific application: QMCPACK

We provide an overview of the software engineering efforts and their impact in QMCPACK, a production-level ab-initio Quantum Monte Carlo open-source code targeting high-performance computing (HPC) systems. Aspects included are: (i) strategic expansion of continuous integration (CI) targeting CPUs, using GitHub Actions own runners, and NVIDIA and AMD GPUs used in pre-exascale systems, (ii) incremental reduction of memory leaks using sanitizers, (iii) incorporation of Docker containers for CI and reproducibility, and (iv) refactoring efforts to improve maintainability, testing coverage, and memory lifetime management. We quantify the value of these improvements by providing metrics to illustrate the shift towards a predictive, rather than reactive, maintenance approach. Our goal, in documenting the impact of these efforts on QMCPACK, is to contribute to the body of knowledge on the importance of research software engineering (RSE) for the stewardship and advancement of community HPC codes to enable scientific discovery at scale.

Increasing memory lifetime of quantum low-density parity check codes with sliding-window noisy syndrome decoding

Increasing memory lifetime of quantum low-density parity check codes with sliding-window noisy syndrome decoding

A Joint Sensing and Decoding for Improving the Hard-Decision Lifetime of NAND Flash Memories

A Joint Sensing and Decoding for Improving the Hard-Decision Lifetime of NAND Flash Memories

Creation of memory-memory entanglement in a metropolitan quantum network.

Towards realizing the future quantum internet1,2, a pivotal milestone entails the transition from two-node proof-of-principle experiments conducted in laboratories to comprehensive multi-node set-ups on large scales. Here we report the creation of memory-memory entanglement in a multi-node quantum network over a metropolitan area. We use three independent memory nodes, each of which is equipped with an atomic ensemble quantum memory3 that has telecom conversion, together with a photonic server where detection of a single photon heralds the success of entanglement generation. The memory nodes are maximally separated apart for 12.5 kilometres. We actively stabilize the phase variance owing to fibre links and control lasers. We demonstrate concurrent entanglement generation between any two memory nodes. The memory lifetime is longer than the round-trip communication time. Our work provides a metropolitan-scale testbed for the evaluation and exploration of multi-node quantum network protocols and starts a stage of quantum internet research.

Superconducting quantum memory with a suspended coaxial resonator

A promising way to store quantum information is by encoding it in the bosonic excitations of microwave resonators. This provides for long coherence times, low dephasing rates, as well as a hardware-efficient approach to quantum error correction. There are two main methods used to make superconducting microwave resonators: by traditionally machining them out of bulk material and by lithographically fabricating them on a chip in thin film. 3D resonators have few loss channels and larger mode volumes, and therefore smaller participations in the lossy parts, but it can be challenging to achieve high material quality. On-chip resonators can use low-loss thin films, but they confine the field more tightly, resulting in higher participations and additional loss channels from the dielectric substrate. In this work, we present a design in which a dielectric scaffold supports a thin-film conductor within a 3D package, thus combining the low surface participations of bulk-machined cavities with high quality and control over materials of thin-film circuits. By incorporating a separate chip containing a transmon qubit, we realize a quantum memory and measure single-photon lifetimes in excess of a millisecond. This hybrid 3D architecture has several advantages for scaling as it relaxes the importance of the package and permits modular construction with separately replaceable qubit and resonator devices.

Time-delayed single satellite quantum repeater node for global quantum communications

Global-scale quantum networking faces significant technical and scientific obstacles. Quantum repeaters (QRs) have been proposed to overcome the inherent direct transmission range limit through optical fiber. However, QRs are typically limited to a total distance of a few thousand kilometers and/or require extensive hardware overhead. Recent proposals suggest that strings of space-borne QRs with on-board quantum memories (QMs) are able to provide global coverage. Here, we propose an alternative to such repeater constellations using a single satellite with two QMs that effectively acts as a time-delayed version of a single QR node. By physically transporting stored qubits, our protocol improves long-distance entanglement distribution with reduced system complexity over previous proposals. We estimate the amount of secure key in the finite block regime and demonstrate an improvement of at least three orders of magnitude over prior single-satellite methods that rely on a single QM, while simultaneously reducing the necessary memory capacity similarly. We propose an experimental platform to realize this scheme based on rare-earth ion doped crystals with appropriate performance parameters. By exploiting recent advances in quantum memory lifetimes, we are able to significantly reduce system complexity while achieving high key rates, bringing global quantum networking closer to implementation.

A Scalable Wear Leveling Technique for Phase Change Memory

Phase Change Memory (PCM), one of the recently proposed non-volatile memory technologies, has been suffering from low write endurance. For example, a single-layer PCM cell could only be written approximately 10 8 . This limits the lifetime of a PCM-based memory to a few days rather than years when memory-intensive applications are running. Wear leveling techniques have been proposed to improve the write endurance of a PCM. Among those techniques, the region-based start-gap (RBSG) scheme is widely cited as achieving the highest lifetime. Based on our experiments, RBSG can achieve 97% of the ideal lifetime, but only for relatively small memory sizes (e.g., 8–32GB). As the memory size goes up, RBSG becomes less effective and its expected percentage of the ideal lifetime reduces to less than 57% for a 2TB PCM. In this article, we propose a table-based wear leveling scheme called block grouping to enhance the write endurance of a PCM with a negligible overhead. Our research results show that with a proper configuration and adoption of partial writes (writing back only 64B subblocks instead of a whole row to the PCM arrays) and internal row shift (shifting the subblocks in a row periodically so no subblock in a row will be written repeatedly), the proposed block grouping scheme could achieve 95% of the ideal lifetime on average for the Rodinia, NPB, and SPEC benchmarks with less than 1.74% performance overhead and up to 0.18% hardware overhead. Moreover, our scheme is scalable and achieves the same percentage of ideal lifetime for PCM of size from 8GB to 2TB. We also show that the proposed scheme can better tolerate memory write attacks than WoLFRaM (Wear Leveling and Fault Tolerance for Resistive Memories) and RBSG for a PCM of size 32GB or higher. Finally, we integrate an error-correcting pointer technique into our proposed block grouping scheme to make the PCM fault tolerant against hard errors.

Bilayer LDPC Codes Combined with Perturbed Decoding for MLC NAND Flash Memory.

This paper presents a coding scheme based on bilayer low-density parity-check (LDPC) codes for multi-level cell (MLC) NAND flash memory. The main feature of the proposed scheme is that it exploits the asymmetric properties of an MLC flash channel and stores the extra parity-check bits in the lower page, which are activated only after the decoding failure of the upper page. To further improve the performance of the error correction, a perturbation process based on the genetic algorithm (GA) is incorporated into the decoding process of the proposed coding scheme, which can convert uncorrectable read sequences into error-correctable regions of the corresponding decoding space by introducing GA-trained noises. The perturbation decoding process is particularly efficient at low program-and-erase (P/E) cycle regions. The simulation results suggest that the proposed bilayer LDPC coding scheme can extend the lifetime of MLC NAND flash memory up to 10,000 P/E cycles. The proposed scheme can achieve a better balance between performance and complexity than traditional single LDPC coding schemes. All of these findings indicate that the proposed coding scheme is suitable for practical purposes in MLC NAND flash memory.

Interleaved LDPC Decoding Scheme Improves 3-D TLC NAND Flash Memory System Performance

Although NAND flash memory does a lot of work in effectively using Error Correcting Code(ECC) to reduce Uncorrectable Bit Error Rate(UBER). However, if the Frame Error Rate(FER) is not reduced, the lower UBER cannot effectively reduce the read latency of the flash memory system. This phenomenon is especially evident at the end of the flash memory lifetime, where conventional methods significantly reduce the UBER but not to zero, and the remaining error bits are still evenly distributed throughout the flash memory page, resulting in a significant increase in read latency. In this paper, an interleaved LDPC decoding scheme is proposed. By re-evaluating the flash memory channel during the decoding process, the codewords in the flash memory page are corrected frame by frame, and the problem of high FER is solved at the end of the flash memory lifetime. Compared with the conventional algorithm, the proposed method can reduce the FER by up to 34%, reduce the average decoding iterations by 63.4%, and reduce the read latency by up to 65%.

High-Precision Short-Term Lifetime Prediction in TLC 3-D NAND Flash Memory as Hot-Data Storage

3D NAND flash memory is the ubiquitous non-volatile memory (NVM) on the market because of its large storage capacities, high reliability, and low bit-cost. The reliability characteristics of 3D NAND flash memory, however, are considerably different from those of 2D NAND flash memory due to the peculiar architectures. In this paper, read disturb (RD) at various program/erase (P/E) stages is thoroughly explored. To adjust the low-density parity check (LDPC) codes dynamically and extend the lifetime of 3D NAND flash memory, short-term lifetime prediction models of RD and endurance are proposed based on in-depth studies on the correlations of fail bit count (FBC) at various lifetime stages, and their accuracy is tested experimentally. A new short-term warning system (STWS) is proposed to extend the lifetime of 3D NAND-based storages. It consists of the error-bits’ prediction module (EBPM) and the self-adjustable low-density parity check codes module (SLDPC), where EBPM predicts FBC periodically and SLDPC pre-allocates LDPC codes for future use based on the result of EBPM. The experimental result shows that our prediction models have high reliability, and STWS can effectively prolong the lifetime of NAND flash. The findings of this study provide fundamental insights into FBC degradation in 3D NAND flash, as well as a simple and practical method for building 3D NAND-based storage with high reliability.

Memory Carousel: LLVM-Based Bitwise Wear Leveling for Nonvolatile Main Memory

Emerging non-volatile memory yields, alongside many advantages, technical shortcomings, such as reduced cell lifetime. Although many wear-leveling approaches exist to extend the lifetime of such memories, usually a trade-off for the granularity of wear-leveling has to be made. Due to iterative write schemes (repeatedly sense and write), wear-out of memory in certain systems is directly dependent on the written bit value and thus can be highly imbalanced, requiring dedicated bit-wise wear-leveling. Such a bit-wise wear-leveling so far has only be proposed together with a special hardware support. However, if no dedicated hardware solutions are available, especially for commercial off-the-shelf systems with non-volatile memories, a software solution can be crucial for the system lifetime. In this work, we propose entirely software-based bit-wise wearleveling, where the position of bits within CPU words in main memory is rotated on a regular basis. We leverage the LLVM intermediate representation to adjust load and store operations of the application with a custom compiler pass. Experimental evaluation shows that the lifetime by applying local rotation within the CPU word can be extended by a factor of up to 21×. We also show that our method can incorporate with coarser-grained wear-leveling, e.g. on block granularity and assist achievement of higher lifetime improvements.

Cavity-enhanced and temporally multiplexed atom-photon entanglement interface.

Practical realization of quantum repeaters requires quantum memories with high retrieval efficiency, multi-mode storage capacities, and long lifetimes. Here, we report a high-retrieval-efficiency and temporally multiplexed atom-photon entanglement source. A train of 12 write pulses in time is applied to a cold atomic ensemble along different directions, which generates temporally multiplexed pairs of Stokes photons and spin waves via Duan-Lukin-Cirac-Zoller processes. The two arms of a polarization interferometer are used to encode photonic qubits of 12 Stokes temporal modes. The multiplexed spin-wave qubits, each of which is entangled with one Stokes qubit, are stored in a "clock" coherence. A ring cavity that resonates simultaneously with the two arms of the interferometer is used to enhance retrieval from the spin-wave qubits, with the intrinsic retrieval efficiency reaching 70.4%. The multiplexed source gives rise to a ∼12.1-fold increase in atom-photon entanglement-generation probability compared to the single-mode source. The measured Bell parameter for the multiplexed atom-photon entanglement is 2.21(2), along with a memory lifetime of up to ∼125 µs.

Протокол оптической памяти ROSE в волноводе кристаллa Tm : YAG

In this work, optical spectroscopy of thulium ions in a single-mode optical waveguide fabricated in a Tm3+:Y3Al5O12 crystal using the femtosecond laser printing method was carried out and an optical quantum memory protocol was demonstrated in a revival of silenced echo scheme. An analysis of the experimental data indicates the presence of instantaneous spectral diffusion at a thulium ion concentration of less than 0.01%, a weak effect of imperfections in the formed waveguide on the lifetime of the optical memory, and indicates the possibility of achieving a high efficiency of input signal recovery in the implemented waveguide scheme of the protocol.

Data Representation Aware of Damage to Extend the Lifetime of MLC NAND Flash Memory

Multilevel cell (MLC) NAND flash memory uses the voltages of the memory cells to represent bits, but high voltages cause much more damage on the cells than low voltages. Free space in MLC can be leveraged to reduce the usage of the high voltages and thus extend the lifetime of MLC. However, limited by the conventional data representation rule that represents bits by the voltage of one single cell, the high voltages are used in a high probability. To fully explore the potential of the free space on reducing the usage of high voltages without changing the total density of MLC, we propose a novel data representation aware of damage, named DREAM. DREAM uses the low voltage combinations of multiple cells instead of the voltage of one single cell to represent bits. It enables to represent the same bits through flexibly replacing the high voltages in some cells with the low voltages in other cells when free space is available. Hence, high voltages which cause more damage are less used and the lifetime of the MLC memory is extended. In addition, complementary techniques are proposed to mitigate performance loss induced by DREAM. Theoretical analysis and simulation results demonstrate the effectiveness and efficiency of DREAM.

Robust quantum-network memory based on spin qubits in isotopically engineered diamond

Quantum networks can enable quantum communication and modular quantum computation. A powerful approach is to use multi-qubit nodes that provide quantum memory and computational power. Nuclear spins associated with defects in diamond are promising qubits for this role. However, dephasing during optical entanglement distribution hinders scaling to larger systems. Here, we show that a 13C-spin quantum memory in isotopically engineered diamond is robust to the optical link operation of a nitrogen-vacancy centre. The memory lifetime is improved by two orders-of-magnitude upon the state-of-the-art, surpassing reported times for entanglement distribution. Additionally, we demonstrate that the nuclear-spin state can survive ionisation and recapture of the nitrogen-vacancy electron. Finally, we use simulations to show that combining this memory with previously demonstrated entanglement links and gates can enable key network primitives, such as deterministic non-local two-qubit gates, paving the way for test-bed quantum networks capable of investigating complex algorithms and error correction.

Lifetime reductions and read-out oscillations due to imperfect initial level preparations of atoms in a long-lived DLCZ-like quantum memory

Entanglement between a spin-wave qubit (memory qubit) and a photonic qubit is a basic building block for quantum repeaters. Duan-Lukin-Cirac-Zoller (DLCZ) scheme, which generates spin waves via spontaneous Raman scattering (SRS) of Stokes photons in atomic ensemble, provides a promising way to generate such entanglement. In a recent work [arXiv: 2006.05631, accepted by communications physics], DLCZ-like quantum memory that generates long-lived atom-photon entanglement has been experimentally demonstrated, where magnetic-field-insensitive (MFI) coherence is used to store spin waves. For realizing such MFI spin-wave storage, the atoms have to be initially prepared in a specific Zeeman sublevel, which is achieved by applying optical pumping lasers. Here, we demonstrate the memory lifetimes for the cases that the atoms are perfectly and imperfectly prepared in the specific Zeeman level, respectively. The experimental results show that the spin waves associated with magnetic-field-sensitive (MFS) and MFI coherences will be simultaneously created for the case that the atoms are imperfectly prepared in the Zeeman sublevel. Thus, the read outs will experience decay oscillations due to interferences between the two spin waves and the memory lifetime will be shorten due to dephasing of MFS coherence. A detailed theoretical analysis has been developed for explaining the experimental results. The present work will help one to understand decoherence of spin waves (SWs) and then enable one to obtain optimal lifetime of the entanglement storage in the cold atoms.

LDPC code-dependent quantization for the NAND flash channel

With the improvement of scaling technologies and the evolution of storage strategies, the storage density of NAND flash memory is gradually growing. However, the increase in storage density increases error probability, which reduces the lifespan of NAND flash memory. Error correction coding technology is a powerful tool for ensuring data reliability in NAND flash memory, but how to maximize the error correction ability through quantization in the reading process is an important problem that must be addressed. In view of the shortcomings of the maximum mutual information (MMI) quantization, this study proposes to utilize the density evolution (DE) algorithm to perform quantization on the basis of the features of low-density parity-check codes. To meet the conditions of the DE algorithm, this research also proposes to implement a bit flipper in the NAND controller for symmetrizing the asymmetric input distribution of the decoder. Then, the constant ratio method is chosen to further reduce the complexity of searching for the best read-voltage thresholds. Through numerical simulation and verification, the proposed algorithm is proven to provide better decoding performance than the MMI quantization and significantly improve the lifetime of the NAND flash memory.

Stochastic consolidation of lifelong memory

Humans have the remarkable ability to continually store new memories, while maintaining old memories for a lifetime. How the brain avoids catastrophic forgetting of memories due to interference between encoded memories is an open problem in computational neuroscience. Here we present a model for continual learning in a recurrent neural network combining Hebbian learning, synaptic decay and a novel memory consolidation mechanism: memories undergo stochastic rehearsals with rates proportional to the memory’s basin of attraction, causing self-amplified consolidation. This mechanism gives rise to memory lifetimes that extend much longer than the synaptic decay time, and retrieval probability of memories that gracefully decays with their age. The number of retrievable memories is proportional to a power of the number of neurons. Perturbations to the circuit model cause temporally-graded retrograde and anterograde deficits, mimicking observed memory impairments following neurological trauma.