Level-shifted Pulse Width Modulation Research Articles

The Wavelet-Modulation Technique for , 5-Level, Power Electronic Converters—Part I: Development and Testing

This work extends the wavelet modulation (WM) technique for operating three-phase ( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$3\phi$</tex-math></inline-formula> ), five-level (5L) power electronic converters (PECs). The WM technique is extended by resolution segmentation of the synthesis scale-based linearly combined wavelet functions, which are used as switching signals. The resolution segmentation is created based on the dilation property of synthesis scale-based linearly combined wavelet functions. Each leg of the <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$3\phi$</tex-math></inline-formula> VS, 5L dc–ac PEC is operated by two sets of resolution-segmented synthesis scale-based linearly combined wavelet basis functions to produce the voltage of one phase. The extended WM technique is implemented for performance testing, when operating <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$3\phi$</tex-math></inline-formula> VS, 5L, diode-clamped and flying-capacitor dc–ac PECs. In this article, Part I, simulation test results are presented and compared with results obtained using the level-shifted pulsewidth modulation, phase-shifted PWM, and space vector modulation. Test results show significant reductions of output harmonics, along with improvements in fundamental components of output voltages and PEC efficiency.

The Wavelet-Modulation Technique for 5-Level, Power Electronic Converters—Part II: Implementation and Experimental Performance

This article presents the implementation and experimental testing of the wavelet-modulation technique for three-phase ( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$3\phi$</tex-math></inline-formula> ) 5-level (5L) power electronic converters (PECs). This version of the wavelet modulation technique is structured as a multiresolution analysis that can support a redundant nonuniform recurrent sampling-reconstruction of three reference-modulating signals. The reconstruction of reference-modulating signals is achieved by sets of resolution-segmented scale-base linearly combined synthesis wavelet basis functions, which are used as switching signals to activate the switching elements of a <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$3\phi$</tex-math></inline-formula> , 5L, VS dc–ac PEC. The presented wavelet-modulation technique is implemented in real time using a digital signal-processing board. Switching pulses generated by the extended wavelet-modulation technique are used to operate <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$3\phi$</tex-math></inline-formula> , 5L, VS, diode-clamped and flying-capacitor dc–ac PECs. Experimental performance of the tested 5L dc–ac PECs is evaluated, when operated by the presented wavelet modulation, level-shifted pulsewidth modulation (PWM), phase-shifted PWM, and space vector modulation techniques. Experimental tests are conducted for linear, dynamic, and nonlinear loads fed by the tested 5L PECs. Test results show that magnitudes of output voltage fundamental components can be significantly increased, and harmonic distortions can be effectively reduced using the wavelet-modulation technique. These features are further demonstrated by performance comparisons with other techniques under similar operating conditions.

Grid‐connected operation and control of single‐phase asymmetrical multilevel inverter for distributed power generation

In recent times, multilevel inverters (MLIs) are gaining popularity for grid integration of distributed power generation sources. In this paper, a proportional-resonant (PR) controller based on current control logic is proposed for a single-phase eleven-level inverter topology, enabling the integration of distributed power generation sources into the grid. The presented topology utilizes eight two-quadrant switches and three dc sources to produce an eleven-level output voltage. The level-shifted pulse width modulation (LS-PWM) scheme is used for providing switching signals to the inverter under grid-connected operation. Simulation and real-time results are presented for the eleven-level inverter to validate the presented current control logic under the grid-connected mode of operation. The hardware-in-loop emulator (Typhoon HIL-402) is used for taking real-time results of the presented grid-connected topology. The total harmonic distortion (THD) of the eleven-level inverter voltage and grid current is 12.10% and 0.46%, respectively. The efficiency of the inverter while supplying 2 kW active power to the grid is 98.4%.

A Simple SVM Technique on Three-Phase MPUC7 Inverter for Solar Photovoltaic System

In This paper, a simple single-dimension Space Vector Modulation (SVM) technique is introduced to implement on three-phase thirteen-level Modified Packed U-Cell (MPUC) inverter for photovoltaic system in which many DC sources are available. The three-phase thirteen-level converter consists of three single-phase seven-level MPUCs that each phase has six switches and two isolated DC sources. One major advantage of proposed method is to produce an output voltage with nearly constant amplitude in desired range in case of input DC voltage fluctuations, which is common in renewable sources like Photovoltaic Systems (PV). On the other hand, the conventional Pulse Width Modulation (PWM) strategies do not have such capability. Thus, the converter behavior is investigated for the proposed control method and Level Shift PWM (LS-PWM) and it is shown that the LS-PWM method does not function properly when the DC voltage varies. In order to produce an output voltage with seven equal levels, which results in reduction of the switching losses and Total Harmonic Distortion (THD), it is necessary to trigger switches in proper way. Consequently, two switching patterns are introduced and the significant decrease in power loss due to the second switching pattern is shown. Furthermore, it is investigated that in three-phase mode, the 3rd order line-voltage harmonics are eliminated well and the voltage and current THD are further improved by the proposed method. To validate the proposed SVM technique, MATLAB Simulink simulation results are presented and a comparative analysis is done between the proposed method and LS-PWM.

Split-Capacitor Five-Level Transformerless Grid Connected Single Phase PV System using Level Shifted PWM Technique

This paper proposes Level shifted Pulse Width Modulation (PWM) methods for single phase transformerless Multi Level Inverter (MLI). Many of the existing topologies have high variations in Common Mode Voltage (CMV) and high leakage current. The proposed topology with level shifted PWM technique for five level single phase MLI, reduces the variations in CMV, minimizes the leakage current according to VDE0126-1-1 standard and the reduced number of switches makes the losses less than the conventional topologies. This topology reduces the current THD. Finally, simulations are carried in MATLAB/Simulink for different inverter topologies.

Improved Modulation Strategy for Singe-Phase Cascaded H-Bridge Multilevel Inverter

In this letter, two new improved pulsewidth modulation (PWM) techniques are proposed for single-phase cascaded H-bridge inverter. Compared with the conventional modulation methods, including phase-shifted PWM (PS-PWM), level-shifted PWM (LS-PWM), discontinuous modulation (D-PWM), only PS-PWM can ensure the output quality and maintain the power balance between each module. That is why it is widely used. However, the switch with PS-PWM always operates in a high-frequency mode, resulting in the high switching losses and low efficiency. In order to solve the problem, two improved cascaded H-bridge multilevel PWM methods are proposed in this letter. With the proposed PWM methods, the power can be evenly distributed among modules, the utilization rate of switching devices is the same, while the switching times are reduced, which improves the system efficiency. Finally, the experimental tests are carried out on a digital-control single-phase cascaded H-bridge seven-level inverter. And the experimental results verify the effectiveness of the proposed solution.

A New Reduced Switch Seven-Level Triple Boost Switched Capacitor Based Inverter

This paper proposes a new reduced switch count seven-level triple boost inverter based on switched capacitor technique. The proposed topology has fewer number of components and has the ability of balancing the voltage across the capacitors. The structure of the proposed topology is very simple and can be easily extended to higher number of voltage levels. The generalized structure for higher number of levels is presented. The level shifted pulse width modulation approach is used to evaluate the proposed topology. In addition, design of switched capacitors and power loss calculation of semiconductor switches are provided. This proposed inverter topology is compared with the state-of-art topologies to demonstrate its superior performance. Further, thermal modelling of the topology is done in PLECS to calculate the power losses and efficiency. Finally, this proposed 7-level topology is simulated using MATLAB/Simulink and tested on experimental prototype for the performance verification and the results are included.

Total Harmonic Distortion Reduction of 9-Level Packed E-Cell (PEC9) Inverter

In this paper phase-shift PWM technique (PS-PWM) is applied to reduce total harmonic distortion (THD) of PEC-9 inverter and the results have been compared with the level-shift PWM method (LS-PWM). PEC-9 inverter consists of one voltage source, seven active devices and one DC-link which contains two capacitors where each of them must be balanced to one-quarter of Dc source to achieve nine output level. Active balancing method for capacitors was integrated with PS-PWM and the regulation was carried out through redundant switching states of PEC-9. Each output level of the inverter is produced via comparing a set of carrier waveforms with one reference signal. The PS-PWM and LS-PWM techniques have been applied for PEC-9 using MATLAB / SIMULINK program. With 5mH L-filter, the THD of LS-PWM was determined as 2.28%, while THD for PS-PWM was 0.34%.

Simplified Diagnosis Method for CHBMIs under Open-circuit Switch or Battery Failure

This paper deals with the diagnosis of cascaded H-bridge multilevel inverters controlled by a sinusoidal level-shifted pulse-width modulation technique. For this purpose, the behaviour of 3, 5, 7 and 9-level inverters is studied for regular and faulty operation modes. Three types of recurring faults are considered, namely open-circuit of a switch, damaged and disconnected battery. Under a single fault, the output voltage signals are presented where the impact of each fault is discussed. In order to detect, identify and locate the three types of fault, a signal processing method is proposed, elaborating the output voltage of inverters with and without fault. The obtained results are convincing for the considered cases. The study shows no real correlation between the selected features from one to the other type of fault. Indeed, each fault type has its own trajectory with respect to the evolution of the output voltage characteristics. Thus, localizing the faulty component within the multilevel inverter can be made with no ambiguity. Such findings obviously solve a large part of problems associated with the presence of faults in multilevel inverters. They can help improving the reliability of the inverter in such way it continues working.

Symmetrical Cascaded Switched-Capacitor Multilevel Inverter Based on Hybrid Pulse Width Modulation

Multilevel inverters have been widely used in various industrial applications such as renewable energy generation and electric vehicles. An improved circuit of symmetrical cascaded switched-capacitor multilevel inverter is proposed so that the reactive power is absorbed by its power supply instead of capacitors. Then, a special hybrid pulse width modulation strategy combing level-shifted pulse width modulation (LS-PWM) and phase-shifted pulse width modulation (PS-PWM) was developed for the inverter. With this modulation algorithm, the power between cascaded units is automatically balanced, and the voltage of the capacitor in each unit is also automatically balanced to the dc input voltage. In addition, the optimized capacitor voltage ripple makes it possible to use a smaller capacitor to produce a better output voltage waveform. Theoretical analysis, simulation and experimental results show that the equivalent switching frequency of the cascaded multilevel inverter is twice the original frequency so that the output voltage harmonics are only distributed near even multiples of the carrier frequency.

Modified PWM Technique for a Multi-Pulse Converter Fed Multilevel Inverter Based IM Drive

This article presents a 36-pulse converter and five-level cascaded H-bridge multilevel inverter (CHB-MLI) fed medium voltage induction motor drive (MVIMD) system. The multiwinding transformer (MWT) for a 36-pulse ac–dc converter is designed in such a way that it requires the least number of windings and enhances power quality at the grid end. This is helpful to reduce the size, weight, and cost of the presented MVIMD. The modified carrier level shifted pulsewidth modulation (MC-LSPWM) is used to control five-level CHB-MLI fed induction motor, which adheres the power quality standard IEEE519 at drive end. The main characteristic of used PWM is that it has inherent rotating switching pattern nature, which is helpful to enhance the power quality performance and to decrease the continuous conduction time of the H-bridge. Whereas, this continuous conduction among H-bridges, is not balanced in the level-shifted pulsewidth modulation (LSPWM). Therefore, conduction losses among the H-bridges of CHB-MLI are balanced and reduced by this MC-LSPWM for continuous operation, which is not possible with the conventional LSPWM. The practicality of this MVIMD with an indirect field-oriented control and MC-LSPWM technique, is substantiated via a comparison with the configuration reported in the literature, simulation, and experimentation, respectively. Performance of the drive system is evaluated during different operating conditions, such as starting, steady-state, speed and load perturbations. Further, a detailed comparative analysis of results is presented, which demonstrates that presented MWT configuration has fewer number of windings (only thirty-three windings), less conductor material and minimum losses. Thus, the presented configuration of MVIMD shows excellent performance characteristics with reduced size and weight such as currents total harmonic distortion is 2.5% (grid end), 3.66% (drive end) and efficiency of the drive is 88.101%, when the drive runs at rated conditions.

Novel Level-Shifted PWM Technique for Cascaded Multilevel Quasi-Impedance Source Inverter

In a multilevel quasi-impedance source inverter (qZSI), phase-shifted carrier pulsewidth modulation (PS-PWM) is the most popular modulation method as it offers advantages such as simple implementation and evenly powered distribution among all qZSI modules with optimum total harmonic distortion (THD). However, it results in higher switching losses. An approach to solving this problem would be development and implementation of a PWM method which results in lower switching losses. With this aim, a novel hybrid phase-opposition disposed, phase-shifted (PWM) (PODPS-PWM) technique is proposed in this article. With the proposed PWM method, reduced switching losses are achieved. Active state losses are reduced to 6% and switching losses are reduced to at least >39% in qZSI modules. A mathematical relationship between the PS-PWM and the proposed PODPS-PWM has been deduced. For experimental validation, a 1.5-kW seven-level qZSI setup is developed. Different performance aspects are presented, discussed, and analyzed, which help in validating the superior performance of the proposed solution. Moreover, an application for the solar photovoltaic (PV) multilevel inverter system has been discussed, for the partial shading condition. During this condition, the PS-PWM forces the extraction of lower power from the remaining healthy modules. This is due to the evenly powered distribution nature of the PS-PWM. Comparatively, the proposed PWM yields higher power. To validate higher power extraction, simulation results are presented and compared for both modulations under healthy and different partially shaded conditions. Under extreme partial shading conditions, the increase in power extraction is up to 29%.

Open-Circuit Fault Diagnosis for Cascaded H-Bridge Multilevel Inverter Based on LS-PWM Technique

Multilevel inverters have been widely used in high voltage and high-power applications on account of their remarkable performance in recent years. The multilevel inverters have an increased chance of switch fault due to a considerably large number of semiconductor switches associated with the power conversion. Therefore it is crucial to detect and locate faults quickly. In this context, an open-circuit fault diagnosis method for cascaded H-bridge multilevel inverter (CHBMI) based on the level-shifted pulse width modulation (LS-PWM) technique is proposed. Unlike the fault diagnosis based on the algorithm, the proposed method only needs a certain logical judgment to diagnose the fault based on subtle fault characteristics. The output voltage of the H-bridge and load current are used for fault diagnosis.

Design and Investigation of a New Multilevel Inverter with Reduced Number of Semiconductors for Photovoltaic Systems

In this research, a single-phase multilevel inverter with a reduced number of switches and driver circuits is introduced for analysis in photovoltaic systems. The proposed multilevel inverter consists of two parts, basic circuit, and H-bridge, which are responsible for generating voltage levels and symmetry of voltage levels (positive and negative), respectively. The proposed basic circuit in this paper consists of six unidirectional switches and three input sources and doesn’t use any capacitors or diodes, which reduces the volume and complexity of the control system. In this paper, the seven-level proposed structure is simulated in the MATLAB/Simulink software and the utilized modulation to generate the output voltage levels is level shifted pulse width modulation. Moreover, photovoltaic systems are exploited to supply the proposed inverter’s input sources, which work with perturb and observe algorithm at the maximum power point. In the simulation section, the voltage, current, power waveforms of the photovoltaic system, and the voltage of the proposed inverter input sources are demonstrated, and the voltage and current waveforms of the inverter for different conditions such as radiation and modulation index change are given. Finally, to show the merits and features of the proposed topology, the inverter is compared with some recent symmetrical structures in terms of the number of components and the rated voltage of the switches.

Open-Switch Fault-Tolerant Operation of T-Type Active Neutral-Point-Clamped Converter Using Level-Shifted PWM

The T-type active neutral-point-clamped (T-ANPC) converter is an emerging hybrid multilevel topology, which owns superior characteristics such as low conduction losses, flexible in control. Reliability improvement is essential for the T-ANPC due to the large number of power switches. For this motivation, this brief develops a carrier-based fault-tolerant control strategy for the T-ANPC converter in the case of typical open-switch faults. A modified level-shifted pulse width modulation (LS-PWM) is employed to control the converter to obtain the desired outputs under single/multiple open-switch fault modes. The fault-tolerant operations with full and reduced power ratings are realized by rearranging the carriers and modulation signals of the LS-PWM. Finally, the feasibility and effectiveness of the proposed control strategy for the T-ANPC is evaluated experimentally.

Analysis of hybrid switches symmetric flying capacitor multilevel inverter based STATCOM

Static compensator (STATCOM) based on cascaded H-bridge (CHB) multilevel inverter (MLI) uses a lower number of switches compared to the other topologies. Therefore, it is preferred due to lower switch losses. However, it is possible to reduce further the number of switches and its losses in cascaded STATCOM. In this context, a STATCOM based on a cascaded symmetric flying capacitor (SFC) constituted by IGBT and IGCT is presented in this paper. Furthermore, the common issue of imbalance due to asymmetric switch losses has been resolved by proposing and implementing multistage feedback voltage control with a combination of level-shifted and phase-shifted LS-PS PWM switching techniques. Moreover, the switching and conduction power losses calculations and efficiencies of SFC-MLI based on these semiconductors are also presented. Finally, the experimental results show the effectiveness of the proposed topology and the control strategy.

A new family of boost active neutral point clamped inverter topology with reduced switch count

A new family of inverter topology for active neutral point clamped (ANPC) is proposed. The traditional ANPC gives the output voltage of half the input voltage which necessitates the use of higher input dc-link voltage. To fix this problem, a floating capacitor is used to increase the voltage of the output, which decreases the dc-link requirement. Moreover, no sensors are needed to stabilize the floating condenser for the proposed topology, which minimizes inverter complexities. The neutral point is connected directly to the load terminals, which decreases the leakage current and makes it suitable for solar PV integration. Two modes of operation of the proposed topology have been discussed while considering the voltage of the floating capacitor used in the topology. Furthermore, two extensions of the proposed topology with generalized structure have also been provided in the paper. A detailed comparison with similar topologies has been provided. The level-shifted pulse width modulation technique has been used for the control of the proposed active neutral point clamped topology. In order to illustrate the idea of the proposed active neutral point clamped inverter, the theory of operation and analysis is accompanied by simulation, and experimental waveforms obtained from a laboratory prototype are provided.

Decentralized control of level-shifted carrier-based pwm for modular multilevel interlinking converter in hybrid microgrid

The interlinking converters is one of the important components in the hybrid mirogrid system, the study of structure and control method of the interlinking converters in hybrid mirogrid has been implemented and achieved positive results. This paper proposes an improved decentralized control of level-shifted carrier-based PWM for a modular multilevel interlinking converter (IC-MMC) in standalone hybrid microgrid (HMG-Hybrid Microgrid). Main research objectives is to study the capability of the decentralized control method proposed for the IC-MMC unit when performing the power exchange control task between the DC and AC bus in the HMG system, increased flexibility in controls. Furthermore, the proposed control method for IC-MMC for HMG is also verified in term of dynamically reconfiguration when changing the number of modules in the MMC when the improve of system reliability is needed. The feasibility of the carrier level shift control method for IC-MMC in HMG has been verified by simulation model on MATLAB/Simulink software to evaluate the ability to exchange power between the DC bus and the AC bus.

One-Cycle Control of Three-Phase Five-Level Diode-Clamped STATCOM

This paper presents a new multilevel one-cycle control (OCC) technique for a five-level diode-clamped multilevel converter (DCMC)-based static VAR compensator (STATCOM). The OCC algorithm in combination with multi-carrier level-shifted PWM control is used in the proposed five-level DCMC-based STATCOM. The automatic dc link voltage balance is simply realized by four voltage compensators presented as the part of the OCC controller. In this paper the OCC principle of a two-level converter-based STATCOM is reviewed and extended to the five-level DCMC-based STATCOM. The proposed multilevel OCC control method of the five-level DCMC-based STATCOM in steady-state and dynamic operation modes is verified by simulation and experimental results.

Multilevel diode clamped D-Statcom for power quality improvement in distribution systems

Power quality is one big issue in power system and a big challenge for power engineers today. Electrical consumers (or otherwise load devices) expect electrical power received power should be of first-class. Bad quality in electrical power directs to fuse blowing, machine overheating, increase in distribution losses, damage to sensitive load devices and many more. DSTATCOM is one of the FACTS controllers designed to improve the quality in electrical power and thus improving the performance of distribution system. This paper presents a multilevel DSTATCOM topology to enhance power quality in power distribution system delivering high-quality power to the customer load devices. Diode-clamped structure is employed for multi-level DSTATCOM structure. ‘PQ’ based control strategy generates reference signal which is further processed through level-shifted multi-carrier PWM strategy for the generation of gate pulses to multi-level DSTATCOM structure. Simulation work of proposed system is developed and the result analysis is presented using MATLAB/SIMULINK software. Performance of multi-level DSTATCOM topology is verified with fixed and variable loads.