Level Inverter Research Articles

Simulation design and analysis 9-level H-bridge single phase stepdown cyclo inverter

This DC-to-AC voltage converter is designed for output frequency controlled by a 9-level cascade H-bridge cyclo inverter with pulse width adjustment. The aim of the study was to determine the pattern and format of the voltage, output frequency, and Total Harmonic Distortion index of a 9-level IGBT cyclo inverter. The method used is to build a unidirectional power converter design modeling into 9 alternating levels with cyclo converter-controlled frequency settings using the Simulink MATLAB tool. The cyclo converter section is constructed with two P and N converters in a parallel arrangement. The frequency and trigger pulse width of both converters control the output voltage and frequency format of the cyclo inverter. The test results show a series of ladder waves with an output frequency, of (1/2f, 1/3f, 1/4f, 1/5f, 1/6f, 1/7f, 1/8f, 1/9f, and 1/10f). The simulation results show that the nth input frequency divider waveform is characterized by the emergence of a number of step pulses of n positive half cycles and negative half cycles. The Total Harmonic Distortion Index gets bigger when the system circuit is designed at a low frequency. This modeling can be implemented into a prototype that is used for variable-speed DC motor drivers.

Modified SPWM technique for single phase variable voltage nine level inverter for PV system

<span lang="EN-US">Multilevel inverters are widely popular because they boost the overall staging of the network with low harmonic distortion, less strain, and simply create highest possible development in industrial and electrical vehicle applications. Here a hybrid multilevel inverter having few switches compare to traditional multi-level inverters has been implemented. It has the capability to operate as a 3-level, 5-level, 7-level and 9-level inverter with different magnitudes of output voltage by varying the modulation index without changing of circuit topology and switching sequences. A new variable amplitude phase opposition disposition sinusoidal pulse width modulation (VAPODPWM) technique is proposed to control the inverter. In this concept unsymmetrical carrier wave form, i.e. A single triangular wave is divided into three triangular waves of different magnitude was chosen. it reduces the volt-sec of output due to that it gives less total harmonic distortion (THD) compare to other conventional space pulse width modulation (SPWM) techniques and conventional space vector pulse width modulation (CSVPWM) control techniques. The ease of conversion capability with less count of switches and operation with less THD shows the effectiveness of the converter. The converter is simulated by using MATLAB/Simulink and results are discussed.</span>

Design of 3-Level T-type NPC Inverter for EV Applications

In recent years, there has been a significant demand for lightweight converters that provide exceptional control performance while generating minimal acoustic noise. This has resulted in higher switching signals for hard- switched 2-level low voltage 3-phase inverters. However, the increased switching frequencies have a negative impact on the inverters’ efficiency, requiring the use of expensive switch technology to maintain high efficiency. This paper aims to tackle these challenges by introducing the design and implementation of a extremely effective 3-Level T-Type Neutral Point Clamped (NPC) inverter designed for Electric Vehicle (EV) applications. 3-Level T-Type NPC inverter associates the strengths of both NPC and T-Type inverters. Similar towards the NPC, it offers a lower breakdown voltage for the switching devices, thereby reducing switching losses. Additionally, it shares the characteristics of the T-Type inverter, resulting in fewer conduction losses. To validate the feasibility of the converter, simulation is performed using MATLAB software, followed by the development and testing of a lab-scale prototype. The proposed three-level T-type NPC inverter have several merits over traditional 2-level inverters, including reduced distortion, switching losses, and improved efficiency. These benefits contribute to enhanced motor drive performance, reduced electromagnetic interference (EMI), and extended battery life in EVs.

A Fifteen-Level Reduced Switch Count Multilevel Inverter with Multicarrier PWM

A multilevel inverter performs a major role in increasing the range of the level of output voltage without the use of a transformer in the power sector. Here an asymmetrical 15-level multilevel inverter fed from three unequal voltage sources has been proposed. The various modes of the conduction of the eight switches with the switching pattern are discussed with the circuit’s operation. The performance of the circuit is analysed using various techniques under MC-PWM methodologies such as Phase disposition (PD) PWM, Alternate POD (APOD) PWM, and Phase Opposition Disposition (POD) PWM. Key Finding: The logical expression used for generating the pulse pattern of the above techniques using the level shifting PWM technique to reduce the harmonics is performed, simulated, and compared by implementing three techniques for linear and non-linear load. The performance in terms of THD of output voltage under various modulation indexes is compared for various Llvel-shifting techniques. The performance of this 15L-MLI is simulated using MATLAB/Simulink and implemented in a prototype hardware model.

Dual Motor Power Sharing Control for Electric Vehicles With Battery Power Management

Induction motor powertrains are emerging as a cost-effective option for high-power electric vehicles (EVs). A differential four-wheel drive (D4WD) EV based on two open end winding induction motor (OEWIM) propulsion is presented in this paper. Each OEWIM is driven by two 2-level voltage source inverters (VSI) with two isolated battery packs as the source. The proposed drive control algorithm integrates the uniform state-of-charge (SoC) distribution and fault-tolerant operation. A two-stage look-up table (LUT) based direct torque control (DTC) scheme is proposed to balance the SoC of batteries by selecting the suitable redundant VSI voltage vectors. The proposed LUT-DTC scheme is less sensitive to variations in motor parameters and provides excellent steady-state and transient performance. The results show the superiority of the proposed controller in terms of battery SoC balancing. The performance of the EV drive with the proposed LUT-DTC is validated by both simulation and laboratory experiments for the FTP75 and HFET driving cycles under different operating modes under normal and fault conditions. The dual motor driven D4WD with the proposed LUT-DTC is found to achieve 89.2% efficiency.

Development of Various Types of Independent Phase Based Pulsewidth Modulation Techniques for Three-Phase Voltage Source Inverters

Discontinuous pulse-width-modulation (DPWM) methods have been extensively used in the industrial area to reduce overall losses, which decreases the corresponding thermal stress on the power switches of converters. However, local thermal overload can arise due to different aging conditions of semiconductor devices or failure in the cooling system. This leads to reduced reliability of the converter system due to the low expected lifespan of the most aged switches or phase legs. In this paper, the modified DPWM strategies for independent control of per-phase switching loss are introduced to deal with this matter. The proposed per-phase DPWM techniques are generated by modifying the conventional three-phase DPWM methods for reducing the switching loss in a specific leg, whereas the output performance is not degraded. This paper reports on output performance, including output current total harmonic distortion (THD) and power loss of switching devices, analysis for the various modified DPWM strategies for independent control of per-phase switching loss, which is applicable in 2-level 3-phase voltage source inverters (2L3P VSIs). The results are compared to the corresponding continuous PWM technique to verify and analyze the effectiveness and accuracy of the modified DPWM strategies for independent control of per-phase switching loss.

Analysis of the Performance of a 5-Level Modular Multilevel Inverter for a Solar Grid-Connected System

The main purpose of a multilevel inverter is to combine numerous levels of dc voltage to create a nearly sinusoidal voltage. The synthesized output waveform has more stages as the number of levels rises, creating a staircase ripple which resembles the preferred waveform. As the number of voltage levels rises, the output wave's harmonic distortion diminishes and eventually approaches zero. In particular, the performance analysis of a five-level inverter with variable loads is highlighted in this paper. This topology has fewer devices than traditional multilevel inverters for the same five output levels, which makes it more affordable due to lesser driver circuits. The proposed modular five level topology is simulated using both high frequencies switching pulse width modulation and basic frequency switching modulation techniques. The output voltage, current waveform, and THD are examined and compared using Simulink to confirm the viability of the modular multilevel inverter topology.

Improved the two DC capacitors’ voltage balancing of three-level NPC inverters applied in electric vehicles

Excessive unbalance of the DC capacitor voltages of the inverter can cause overvoltages on power components and capacitors, causing unintended low-order harmonics on the load side such as second harmonics, 3rd, 4th, 5th, ..., causing direct harm to the motor load, reducing the controllability of the reverse voltage and filter compensating current for the active filter circuit, affect to the performance of electric vehicles (EVs). Therefore, maintaining the DC capacitors' voltage balance will control the multi-level inverter's input quality and ensure the output quality in terms of Total Harmonic Distortion (THD). The paper proposes a method to control the two DC capacitors’ voltage balance of the 3-level inverter, using the principle of offset function separation. The analysis results suggest that the NPC three-level modulation technique should be implemented to satisfactorily achieve the neutral line current (iNP). Compared with recent international publications, the proposed new algorithm can save and reduce switching loss; the transient dynamic response can be adjusted easily. Maintaining the capacitor voltage balance allows the design with the smallest capacity to reduce voltage stress on components. The proposed results are partially verified through simulation and experiment.

Switched capacitor based 7-level and 9-level multilevel inverters with single DC source and reduced voltage stress

This paper proposes two different switched capacitor based Multilevel Inverter topologies having single dc voltage source. One of the proposed MLIs is a seven-level structure whereas the other circuit successfully generates a nine-level output voltage. The special features of the seven-level topology consist of reduced number of circuit elements, lower voltage stress on switches, and boosted output voltage. The nine-level MLI having unity gain also possess the reduced switch count along with lower value of switch voltage stress. Fundamental frequency based Nearest Level Control modulation and Level-Shifted Pulse Width Modulation have been used for generating the required voltage levels. Successful implementation of the proposed MLI circuits has been done with the help of a laboratory prototype and its results are presented and explained in the paper to show its practical suitability. Other type of analysis include loss analysis which has been done in PLECS software. From this analysis, the efficiency has been estimated. A comparative analysis of both the proposed structures has been carried out with some other similar topologies on different performance parameters. From the analysis and comparison, it is evident that the proposed MLIs are better than some of the existing topologies and can be used for industrial applications.

A Dual Source 13 Level Inverter with Reduced Component Count for Renewable Energy Applications

An innovative multilevel inverter (MLI) relying on switched capacitor (SC) architecture is suggested for single-phase inverters with 13-levels. This suggested SCMLI is expected to be capable of generating output AC voltages at appropriate levels while utilizing fewer switches. The suggested inverter utilizes two count of capacitors, two asymmetrical dc sources, two diodes, and 11 switches. As fewer switches are needed, fewer gate drivers are also needed, increasing the converter's power density. The challenge of preserving self-voltage balance across the capacitors in an SC-MLI circuit is yet another task. Additionally, when the modulation index is low, self-voltage preservation is subpar. It is possible to maintain the self-voltage balance with the capacitors connected in this suggested SC-MLI avoiding the requirement of any ancillary devices or challenging control schemes. Regardless of the modulation index values, capacitors operate at self-balanced levels in all regions of the spectrum. The suggested SC-MLI has a strong ability to achieve good power quality and can balance capacitor voltages even at low modulation indices. The suggested SC-MLI is first modelled using different loading conditions in the MATLAB/Simulink® platform, and subsequently it is validated with the help of typhoon-HIL real-time emulator. Using the simulation tool PLEXIM-PLECS, the suggested inverter's overall switching losses and efficiency are estimated and found out to be 95.87%.

Review of multilevel inverter for high-power applications

PurposeTraditional level inverter technology has drawbacks in the aspect of Total harmonic distortion (THD) and switching losses for higher frequencies. Due to these drawbacks, two-level inverters have become unprofitable for high-power applications. Multilevel inverters (MLIs) are used to enhance the output waveform characteristics (i.e. low THD) and to offer various inverter topologies and switching methods.Design/methodology/approachMLIs are upgraded versions of two-level inverters that offer more output levels in current and voltage waveforms while lowering the dv/dt and di/dt ratios. This paper aims to review and compare the different topologies of MLI used in high-power applications. Single and multisource MLI's working principal and switching states for each topology are demonstrated and compared. A Simulink model system integrated using detailed circuit simulations in developed in MATLAB®–Simulink program. In this system, a constant voltage source connected to MLI to feed asynchronous motor with squirrel cage rotor type is used to demonstrate the efficacy of the MLI under different varying speed and torque conditions.FindingsMLI has presented better control and good range of system parameters than two-level inverter. It is suggested that the MLIs like cascade-five-level and NPC-five-level have shown low current harmonics of around 0.43% and 1.87%, respectively, compared to two-level inverter showing 5.82%.Originality/value This study is the first of its kind comparing the different topologies of single and multisource MLIs. This study suggests that the MLIs are more suitable for high-power applications.

Sliding Input Output Control of Squirrel Cage Motor Based NPC Five Level Inverter

Speed squirrel cage motor control is an area of research that has been in evidence for some time now. In this paper, a nonlinear controller is presented for the squirrel cage motor drives, based on a combination between input-output feedback linearization control (IOLC) technique and sliding mode control (SMC) to create a new control which is sliding input-output linearization (SIOLC) control of squirrel cage motors which associates by an NPC five levels inverter PWM technical used for the variation of its speed, where the sliding mode control it used for controlling the speed of squirrel cage motor and the input-output linearization control applied for two input witch are flux and current. To test robustness and performance of sliding input-output linearization control (SIOLC) we created a variation of internal parameters of the motor. The simulation results show robustness the sliding input-output linearization control of squirrel cage motor responses.

High power T-type-based multi-level inverter for electric vehicles

This paper presents an extension of a 5-level T-Type inverter to a high-power multi-level inverter that can be implemented in electric vehicles and trucks. The proposed inverter possesses several advantages over standard topologies such as Neutral Point Clamped, Flying Capacitor, and Cascaded H-bridge. The main advantages are a low number of components, an estimated lower price and weight, smaller dimensions, and the implementation of only one DC voltage source per phase. The proposed topology can be implemented for any required odd number of voltage levels. Due to the estimated reduced dimensions and weight, the proposed topology is especially suitable for electric transportation applications. The operation of the proposed topology was validated for 9- and 13-level configurations under PD, POD, and APOD PWMs. The simulation results show the inverter’s practicability for supplying motors of electric trucks.

Induction motor performance improvement using a five-level inverter topology and sliding mode controllers

This research intends to establish a robust vector control (VC) of a 3-ϕ induction motor (IM). The classical 2-level inverter is displaced by a 5-level neutral-pointclamped (NPC) inverter. The 2-level inverter may only supply 8 voltage vectors, while the 5-level NPC inverter can furnish 125 voltage vectors. The objective is to bring about a command voltage vector that converges to the reference voltage vector as closely as possible; hence, guaranteeing a quick response on one hand and improving the dynamic performance on the other hand. A robust sliding mode controller (SMC) structure is used in all regulation loops. Satisfactory results are obtained for various speed zones. The quality and robustness of the global system are tested under resistive torque disturbance, reversal, high, and low-speed ranges in order to prove system stability. All the simulations have been performed under MATLAB/Simulink.

Red deer algorithm-based selective harmonic elimination technique for multilevel inverters

This paper proposed a red deer algorithm (RDA)-based selective harmonic elimination (SHE) method for multilevel inverters (MLIs). To eliminate the desired harmonic orders, the optimum switching angles of the MLI have been calculated using the proposed RDA. The calculated switching angles have been applied to the 3-phase cascaded H-bridged 11-level inverter. In addition, the performance of the proposed RDA method was compared with the results of methods such as the Newton-Raphson (NR) method, LSHADE/EpSin technique (LSHADE), whale optimization algorithm (WOA), and particle swarm optimization (PSO) used for the SHE problem in the literature. The results obtained prove that the proposed RDA optimization solves the SHE problems more effectively than other methods. It has also been observed that RDA produces good solutions in different modulation indexes.

Design of a 15-Level Non-Modular Multilevel-Inverter in a Grid-Connected Solar PV System: A Hybrid ZOA-SNN Technique

In this paper, a hybrid strategy is proposed for an innovative 15-level inverter method for the grid-connected photovoltaic (PV) system. The proposed technique is combined with the Zebra Optimization Algorithm (ZOA) plus the spiking neural network (SNN) and is called the ZOASNN method. The major goals of the ZOASNN approach are to fulfill the power demand of load, lessen harmonics, and improve the PV system power regulation or maximal energy conversion. The multilevel inverter (MLI) is used to operate at symmetrical and asymmetrical configurations aimed at utilizing reduced power components. The proposed ZOASNN controller develops the operating modes of two-generation methods to determine the converter switching states for this purpose. Using this control method, load demands are optimally fulfilled while external disturbances and fluctuations in system parameters are minimized. The proposed strategy is implemented in MATLAB and its performance is estimated with other algorithms, such as the Grasshopper Optimization Algorithm (GOA), the Random Forest Algorithm (RFA), and the Cuckoo Search Algorithm (CSA). The proposed method shows high efficiency, low total harmonics distortion (THD), and lower cost than other existing methods.

A Modified Indirect Current Vector-Controlled CHB Three-Level Inverter-fed Induction Motor Drive for Electric Vehicle

Low-cost electric vehicles (EVs) prefer induction motor (IM) based drive systems which are mostly operated with 2-level inverters (2LIs) because they require fewer component counts and minimum control complexity. While an IM operated with 2LI has a higher total harmonic distortion (THD) and lower efficiency. An indirect current vector control (ICVC) scheme is an effective and simplest control scheme used for IM of EVs. This ICVC scheme required one speed sensor and three current sensors which increased its cost and control complexity. Therefore, in this paper, a cascaded H-bridge 3-level inverter (CHB-3LI) fed IM drive (IMD) is presented. A modified ICVC scheme having only one speed sensor is presented and used to control the CHB-3LI fed IMD. The steady-state and transient performances of CHB-3LI fed IMD with the modified ICVC scheme are analyzed through simulation in MATLAB Simulink and validated through experiments on a developed laboratory setup.

Efficient operation of photovoltaic-interfaced reduced switch 11-level inverter using adaptive swarm-based metaheuristic

Efficient operation of photovoltaic-interfaced reduced switch 11-level inverter using adaptive swarm-based metaheuristic

A New Level Shifted Carrier Based PWM Technique for a Cascaded Multilevel Inverter Based Induction Motor Drive

The pulse width modulation (PWM) techniques are becoming the game changer for multi-pulse power converter fed multilevel inverter-based induction motor drive (IMD) due to their significant impacts on power quality. In this paper, a new level shifted carrier-based PWM technique is proposed for a 5-level cascaded H-bridge (CHB) multilevel inverter driven by a 36-pulse ac-dc converter based IMD. To meet the power quality demand of IEEE-519 at grid side, a modular transformer is used, and the transformer is coupled to form a 36-pulse ac-dc converter. A 5-level CHB multilevel inverter is utilized on the motor side, which uses the proposed carrier based PWM technique for switching action to ensure superior performance of the IMD. The proposed PWM technique is named as third-harmonic injected inverted sinusoidal carrier PWM (THI2SCPWM), which utilizes 3 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">rd</sup> harmonic injection principle with inverted sinusoidal signal to form the proposed carrier signal. The 5-level CHB inverter used in the IMD shows less power loss and total harmonic distortion (THD) with the proposed THI2SCPWM technique. Moreover, the IMD with the THI2SCPWM shows low stator voltage THD, stator current THD, and smooth dynamic response. Apart from these, the THI2SCPWM mitigates the torque ripple of the IMD. The motor drive system with the THI2SCPWM technique is modeled and its performance is simulated on MATLAB/Simulink environment. A scaled down experimental setup is utilized to validate the superiority of the proposed PWM technique.

A Reduced Switch Count, Self-Balanced, 13-Level Inverter Based on a Dual T-Type Configuration

A new Dual T-Type 13-Level inverter topology is presented in this paper, featuring less power switches, gate drivers, and diodes, than inverters based on traditional multilevel topologies, such as Neutral Point Clamped, Flying Capacitor, T-Type and Cascaded H-Bridge, or previously proposed reduced switch count 13-level inverter topologies. Moreover, no additional circuits are required to equalize the voltage of capacitors present in each pole, nor complex modulation strategies, leading to a reduction of cost and power losses. Exploiting a Nearest Level Modulation technique, the proposed topology performs well in terms of efficiency and total harmonic distortion, as confirmed by experimental tests.