Recently, nonvolatile spintronic memory elements have drawn a lot of attention for designing nanoscale integrated circuit design due to their several advantages such as near-zero static power, high endurance, good scalability, and compatibility with the current process technologies. In this paper, a high-speed and low-power spintronic-based nonvolatile level converter flip-flop (NVLCFF) is proposed. This efficient design facilitates the use of power gating and dual-supply techniques simultaneously for ultra-energy-efficient integrated circuits. The proposed NVLCFF uses the spin Hall effect-assisted spin-transfer torque magnetic tunnel junction (SHE-assisted STT-MTJ) to provide nonvolatile data storage. Furthermore, a new voltage level converter is presented to perform voltage level conversion in the proposed NVLCFF. Elimination of the contention condition, using one reconfigurable MTJ, and no static voltage division in the proposed design lead to considerably higher speed and lower power. The 7-nm FinFET, as one of the leading industrial technologies, is utilized to design the peripheral circuity. The HSPICE simulation results show on average, 64%, 62%, and 35% improvements regarding the power dissipation, backup energy, and restore energy as compared to the other NVLCFFs. Furthermore, comprehensive Monte Carlo simulations demonstrate the robustness of the proposed design in the presence of process variations.