Lead-free Chip Scale Packages Research Articles

Thermomechanical Fatigue Performance of Lead-Free Chip Scale Package Assemblies with Fast Cure and Reworkable Capillary Flow Underfills

In this paper, we present the results of temperature cycling test for full and partial capillary flow underfilled lead-free chip scale packages (CSPs), the tests were carried out on the basis of JEDEC standard. Two kinds of representative fast cure and reworkable underfill materials are used in this study, and CSPs without underfills were also tested for comparison. The test results show that the two underfill materials reduce the thermomechanical fatigue performance of CSP assemblies. The underfill with high Tg and storage modulus yielded better performance; indeed, the coefficient of thermal expansion (CTE) is also very critical to the thermomechanical fatigue performance, but its effects is not so obvious in this study owing to the similar CTEs of the underfills used. In addition, the negative effect of a partial underfill pattern is smaller than that of a full underfill pattern. Failure analysis shows that the dominant failure mode observed is solder cracking near the package and/or printed circuit board pads.

Board-Level Solder Joint Reliability of Edge- and Corner-Bonded Lead-Free Chip Scale Package Assemblies Subjected to Thermal Cycling

In this paper, we present the results of thermal cycling test for edge- and corner-bonded lead-free chip scale packages (CSPs), which was carried out on the basis of the IPC-9701 test standard. Six materials were used in this study: four edge-bond adhesives and two corner-bond adhesives. These adhesives were compared with CSPs with full capillary flow underfill (FCFU) and without adhesives. The thermal cycling test results show that corner-bond adhesive has comparable solder joint reliability performance with CSP without adhesive, and is better than edge-bond adhesive, followed by CSPs with FCFU. In addition, the adhesives with a low coefficient of thermal expansion, a high glass transition temperature and a intermediate storage modulus yielded good performance. Results of detailed failure analysis indicate that the dominant failure mode is solder bulk fatigue cracking near package and/or printed circuit board (PCB) pads, and that the location of critical solder joints change from die edges to package corners with the introduction of adhesives.

Board-Level Solder Joint Reliability of Edge- and Corner-Bonded Lead-Free Chip Scale Package Assemblies Subjected to Thermal Cycling

In this paper, we present the results of thermal cycling test for edge- and corner-bonded lead-free chip scale packages (CSPs), which was carried out on the basis of the IPC-9701 test standard. Six materials were used in this study: four edge-bond adhesives and two corner-bond adhesives. These adhesives were compared with CSPs with full capillary flow underfill (FCFU) and without adhesives. The thermal cycling test results show that corner-bond adhesive has comparable solder joint reliability performance with CSP without adhesive, and is better than edge-bond adhesive, followed by CSPs with FCFU. In addition, the adhesives with a low coefficient of thermal expansion, a high glass transition temperature and a intermediate storage modulus yielded good performance. Results of detailed failure analysis indicate that the dominant failure mode is solder bulk fatigue cracking near package and/or printed circuit board (PCB) pads, and that the location of critical solder joints change from die edges to package corners with the introduction of adhesives.

Drop impact reliability of edge-bonded lead-free chip scale packages

This paper presents the drop test reliability results for edge-bonded 0.5 mm pitch lead-free chip scale packages (CSPs) on a standard JEDEC drop reliability test board. The test boards were subjected to drop tests at several impact pulses, including a peak acceleration of 900 Gs with a pulse duration of 0.7 ms, a peak acceleration of 1500 Gs with a pulse duration of 0.5 ms, and a peak acceleration of 2900 Gs with a pulse duration of 0.3 ms. A high-speed dynamic resistance measurement system was used to monitor the failure of the solder joints. Two edge-bond materials used in this study were a UV-cured acrylic and a thermal-cured epoxy material. Tests were conducted on CSPs with edge-bond materials and CSPs without edge bonding. Statistics of the number of drops-to-failure for the 15 component locations on each test board are reported. The test results show that the drop test performance of edge-bonded CSPs is five to eight times better than the CSPs without edge bonding. Failure analysis was performed using dye-penetrant and scanning electron microscopy (SEM) methods. The most common failure mode observed is pad lift causing trace breakage. Solder crack and pad lift failure locations are characterized with the dye-penetrant method and optical microscopy.

Lead-Free Chip Scale Packages: Assembly and Drop Test Reliability

Three underfill options compatible with lead-free assembly have been evaluated: capillary underfill, fluxing underfill, and corner bond underfill. Chip scale packages (CSPs) with eutectic Sn/Pb solder were used for control samples. Without underfill, lead-free and Sn/Pb eutectic drop test results were comparable. Capillary flow underfills, dispensed and cured after reflow, are commonly used in CSP assembly with eutectic Sn/Pb solder. With capillary flow underfill, the drop test results were significantly better with lead-free solder assembly than with Sn/Pb eutectic. Fluxing underfill is dispensed at the CSP site prior to CSP placement. No solder paste is printed at the site. The CSP is placed and reflowed in a standard reflow cycle. A new fluxing underfill developed for compatibility with the higher lead-free solder reflow profiles was investigated. The fluxing underfill with lead-free solder yielded the best drop test results. Corner bond underfill is dispensed as four dots corresponding to the four corners of the CSP after solder paste print, but before CSP placement. The corner bond material cures during the reflow cycle. It is a simpler process compared to capillary or fluxing underfill. The drop test results with corner bond were intermediate between no underfill and capillary underfill and similar for both lead-free and Sn/Pb eutectic solder assembly. The effect of aging on the drop test results with lead-free solder and either no underfill or corner bond underfill was studied. Tin/lead solder with no underfill was used for control. This test was to simulate drop performance after the product has been placed in service for some period of time. There was degradation in the drop test results in all cases after 100 and 250 h of storage at 125/spl deg/C prior to the drop test. The worst degradation occurred with the lead-free solder with no underfill.

Failure mechanisms of lead-free chip scale package interconnections under fast mechanical loading

The reliability of chip scale package (CSP) components against mechanical shocks has been studied by employing statistical, fractographic, and microstructural research methods. The components having high tin (Sn0.2Ag0.4Cu) solder bumps were reflow soldered with the Sn3.8Ag0.7Cu (wt.%) solder paste on Ni(P)|Au- and organic solderability preservative (OSP)-coated multilayer printed wiring boards (PWBs), and the assemblies were subjected to the standard drop test procedure. The statistically significant difference in the reliability performance was observed: the components soldered on Cu|OSP were more reliable than those soldered on Ni(P)|Au. Solder interconnections on the Cu|OSP boards failed at the component side, where cracks propagated through the (Cu,Ni)6Sn5 reaction layer, whereas interconnections on the Ni(P)|Au boards failed at the PWB side exhibiting the brittle fracture known also as “black pad.” In the first failure mode, which is not normally observed in thermally cycled assemblies, cracks propagate along the intermetallic layers due to the strong strain-rate hardening of the solder interconnections in drop tests. Owing to strain-rate hardening, the stresses in the solder interconnections increase very rapidly in the corner regions of the interconnections above the fracture strength of the ternary (Cu,Ni)6Sn5 phase leading to intermetallic fracture. In addition, because of strain-rate hardening, the recrystallization of the as-soldered microstructure is hindered, and therefore the network of grain boundaries is not available in the bulk solder for cracks to propagate, as occurs during thermal cycling. In the black pad failure mode, cracks nucleate and propagate in the porous NiSnP layer between the columnar two-phase (Ni3P+Sn) layer and the (Cu,Ni)6Sn5 intermetallic layer. The fact that the Ni(P)|Au interconnections fail at the PWB side, even though higher stresses are generated on the component side, underlines the brittle nature of the reaction layer.