Lateral Grain Boundaries Research Articles

The Role of Grain Boundary Diffusion in the Solute Drag Effect.

Molecular dynamics (MD) simulations are applied to study solute drag by curvature-driven grain boundaries (GBs) in Cu–Ag solid solution. Although lattice diffusion is frozen on the MD timescale, the GB significantly accelerates the solute diffusion and alters the state of short-range order in lattice regions swept by its motion. The accelerated diffusion produces a nonuniform redistribution of the solute atoms in the form of GB clusters enhancing the solute drag by the Zener pinning mechanism. This finding points to an important role of lateral GB diffusion in the solute drag effect. A 1.5 at.%Ag alloying reduces the GB free energy by 10–20% while reducing the GB mobility coefficients by more than an order of magnitude. Given the greater impact of alloying on the GB mobility than on the capillary driving force, kinetic stabilization of nanomaterials against grain growth is likely to be more effective than thermodynamic stabilization aiming to reduce the GB free energy.

Analysis of a Lateral Grain Boundary for Reducing Performance Variations in Poly-Si 1T-DRAM.

A capacitorless one-transistor dynamic random-access memory device that uses a poly-silicon body (poly-Si 1T-DRAM) has been suggested to overcome the scaling limit of conventional one-transistor one-capacitor dynamic random-access memory (1T-1C DRAM). A poly-Si 1T-DRAM cell operates as a memory by utilizing the charge trapped at the grain boundaries (GBs) of its poly-Si body; vertical GBs are formed randomly during fabrication. This paper describes technology computer aided design (TCAD) device simulations performed to investigate the sensing margin and retention time of poly-Si 1T-DRAM as a function of its lateral GB location. The results show that the memory’s operating mechanism changes with the GB’s lateral location because of a corresponding change in the number of trapped electrons or holes. We determined the optimum lateral GB location for the best memory performance by considering both the sensing margin and retention time. We also performed simulations to analyze the effect of a lateral GB on the operation of a poly-Si 1T-DRAM that has a vertical GB. The memory performance of devices without a lateral GB significantly deteriorates when a vertical GB is located near the source or drain junction, while devices with a lateral GB have little change in memory characteristics with different vertical GB locations. This means that poly-Si 1T-DRAM devices with a lateral GB can operate reliably without any memory performance degradation from randomly determined vertical GB locations.