Large Scale Integration Systems Research Articles

Impacts of large-scale deployment of vertical bifacial photovoltaics on European electricity market dynamics

Self-sufficiency, climate change and increasing geopolitical risks have driven energy policies to make renewable energy sources dominant in the power production portfolios. The initial boom in the mid-2000s of global photovoltaic installations demonstrated the feasibility of the ambitious renewable energy targets. However, this rapid scale-up has introduced challenges, including price volatility and system integration issues. This communication calls the attention to these emerging challenges and offers quantitative insights on how rapid adoption of a more diversified photovoltaics deployment strategies can mitigate price volatilities, reduce fossil fuel dependence and steer Europe towards a forward-thinking sustainable energy pathway. The analysis reveals that as innovative bifacial photovoltaic systems are incorporated on a large-scale disruptive scenario, four main patterns emerge: economic value of solar production increases, base-load electricity price decreases, sun-rich countries expand their solar contributions, whereas nations with ample grid interconnections enhance their energy imports from neighbouring countries. It also underscores the importance of maintaining photovoltaics an attractive option for energy investors and traders in the future. Establishing this groundwork is critical since a successful integration of large-scale solar systems contributing to decrease price volatilities in Europe and US will carry significant repercussions for global energy policy formulation.

Integrated Two-Level New Energy Monitoring and Big Data Centers: A Comprehensive Approach for Urban Sustainability

This study examines the transition to green energy in Wenzhou City and suggests a novel plan for integrating an energy monitoring and data center. The aim is to improve the city's sustainability through the building of a large-scale wind-solar integrated energy monitoring system by a group in Wenzhou City. The solution uses the Internet of Things and intelligent data analysis technology to realize real-time data collection, processing and operation and maintenance decision support for distributed power stations. The system adopts storage-computer separation and data encryption technology to ensure data security and system stability and improves data processing efficiency through containerization and microservice architecture. In addition, the study also explores the application potential of this technical scheme in regional energy planning, which provides a new idea for Wenzhou to achieve green energy transformation and low-carbon development.

Evaluating the Potential for Solar District Heating with Pit Thermal Energy Storage in Sweden

Sweden was among the first countries to install solar thermal plants for district heating (DH) as early as in 1970s. However, in recent years, the focus on solar DH installations has shifted primarily to Denmark and Germany, with only one recent installation reported in Sweden. Nonetheless, due to changes in the overall heating market, the use of large-scale storage (both with and without solar heat) is becoming increasingly important. Despite significant advancements in adopting DH systems, the combination of solar DH with PTES is not well studied from Swedish context. The economic and geological prerequisites for the deployment of PTES remain largely unexplored. This paper explores the integration of large-scale solar thermal systems into DH networks in Sweden, particularly highlighting the feasibility and potential of pit thermal energy storage (PTES) systems. Through findings from a national project, this paper assesses the techno-economic-geological viability of PTES alongside solar thermal collectors, providing insights into the project’s methodological approach and initial findings.

Comprehensive Study of SDC Memristors for Resistive RAM Applications

Memristors have garnered considerable attention within the scientific community as devices for emerging construction of Very Large Scale Integration (VLSI) systems. Owing to their inherent properties, they appear to be promising candidates for pivotal components in computational architectures, offering alternatives to the conventional von Neumann architectures. This work has focused on exploring potential applications of Self-Directed Channel (SDC) memristors as novel RRAM memory cells. The introductory section of the study is dedicated to evaluating the repeatability of the tested memristors. Subsequently, a detailed account of the binary programming testing process for memristors is provided, along with illustrative characteristics depicting the impact of programming pulses on a memory cell constructed from a memristor. A comprehensive data analysis was then conducted, comparing memristors with varying types of doping. The results revealed that SDC memristors exhibit a high level of switching, certainty between the Low Resistance State (LRS) and High Resistance State (HRS), suggesting their capability to facilitate the storage of multiple bits within a single memory cell.

An Ultra-Energy-Efficient Reversible Quantum-Dot Cellular Automata 8:1 Multiplexer Circuit

Energy efficiency considerations in terms of reduced power dissipation are a significant issue in the design of digital circuits for very large-scale integration (VLSI) systems. Quantum-dot cellular automata (QCA) is an emerging ultralow power dissipation approach, distinct from traditional, complementary metal-oxide semiconductor (CMOS) technology, for building digital computing circuits. Developing fully reversible QCA circuits has the potential to significantly reduce energy dissipation. Multiplexers are fundamental elements in the construction of useful digital circuits. In this paper, a novel, multilayer, fully reversible QCA 8:1 multiplexer circuit with ultralow energy dissipation is introduced. The power dissipation of the proposed multiplexer is simulated using the QCADesigner-E version 2.2 tool, describing the microscopic physical mechanisms underlying the QCA operation. The results show that the proposed reversible QCA 8:1 multiplexer consumes 89% less energy than the most energy-efficient 8:1 multiplexer circuit previously presented in the literature.

Design analysis of moth-flame optimized fault tolerant technique for minimally buffered network-on-chip router

<span>A network on a chip is a solitary silicon chip utilized to perform the communication characteristics of large-scale (LSI) to very large-scale integration (VLSI) systems. Network-on-chip (NoC) architecture includes links, network interfaces (NI), and routers to unite with external memories or processors. NoC is designed to flow messages from the source module to the destination module through several links involving routing decisions. <br /> The design of NoC is complex and the buffer section’s expensiveness creates problems while providing secured data service. Moreover, routers and links in NoC setups are liable to faults. This work introduces a minimal buffered router, and the faults in the network are optimized using moth flame optimized (MFO) fault-tolerant technique. The software named Xilinx ISE design suite 14.5 is employed for the minimum buffered router model. <br /> The suggested scheme is operated with less area, low power (0.241 mW), and high speed (965.261 Megahertz (MHz)) when matched with previous works.</span>

Implementation of Ripple Carry Adder Design for Optimal VLSI Performance

In the province of wireless receivers, biomedical equipment, and portable/mobile devices, the demand for Very Large Scale Integration (VLSI) systems that optimize space, minimize power consumption, and deliver high performance is dominant. At the core of these systems, adders play a pivotal role as the primary component of arithmetic units. This paper proposes a ripple carry propagate adder with a high-speed area-efficient. The two’s complement representation is employed for adding two numbers, a common practice in various systems dealing with n-bit input sequences. Microprocessors and digital signal processing use these carry adders. The carry output of every finished adder stage is useful as a carry input to the one behind it. This procedure is continued until the last complete adder stage is reached. Each carry output bit in an entire adder is therefore rippled to the next stage. An exact (forward) carry adder be linked with the proposed structure to generate hybrid adders with tunable accuracy levels. The practical implementation of proposed model is carried out using Xilinx ISE Design Suite 13.4, showcasing its feasibility for real-world applications.

Design of Cascaded Multilevel Inverter and Enhanced MPPT Method for Large-Scale Photovoltaic System Integration

The key goal of this effort is to develop an efficient control system for a three-phase cascaded H-bridge multilevel inverter powered by the photovoltaic (PV) system. The power for the system is generated through the use of PV modules, which serve as DC inputs for the cascaded H-bridge multilevel inverter. The authors aim to achieve a nearly sinusoidal signal at the voltage level and are specifically focused on minimizing the total harmonic distortion (THD) to the smallest possible value. Hence, an advanced N-level space vector modulation (SVM) is developed to ensure an appropriate control for the cascaded inverter. The aim is to design an effective control strategy to increase inverter efficacy and, thus, supply the best output quality. In addition, a robust approach to the maximum power point (MPP) tracking (MPPT) technique is developed based on an adaptive perturb and observe (P&O) algorithm to ensure superior tracking of the MPP. The developed algorithm eliminates 90% of the power curve area in the search space process and only maintains 10% of the area that includes the MPP. Each PV system employs its own improved MPPT control. The numerical results confirm that the enhanced P&O algorithm attains a precise response with superior efficiency and a fast response under the fast alteration of environmental conditions. Hence, the energy loss is reduced. The simulation results validate the effectiveness of this study, highlighting the high efficiency of the control strategy and the enhanced performance of the proposed scheme with lesser THD values.

A Laser-Processed Carbon-Titanium Carbide Heterostructure Electrode for High-Frequency Micro-Supercapacitors.

Micro-supercapacitors (MSCs) are an important energy storage component for future miniaturized electronic systems, yet their key performance indexes such as high-frequency response, energy density, and cycle life still have a large room to be improved. Herein, a laser-processed carbon-titanium carbide heterostructure (LCTH) electrode is demonstrated, which can excellently address the above key challenges by employing a unique one-step laser-processing fabrication method. Different from the other reported electrode structures, this LCTH electrode shows a heterogeneous structure, featuring the carbon nanofoam layer which provides extremely short ion transport channels and abundant electrochemical active sites, and the underlying titanium carbide layer which can provide excellent electron conductivity and contribute to the pseudo-capacitance. The assembled symmetric supercapacitor can stably work at the voltage window of 3.5V at an ultra-high frequency of approximately 1121.3Hz, exhibiting an ultra-high areal specific energy density of 721 µFV2 cm-2 at 120Hz and a cycle life of 140 000 cycles with capacitance retention of 100.95%, which is superior to most reported MSCs. The as-fabricated MSC is compatible with the contemporary embedded electronic component fabrication processes, which shows significant advantages in large-scale fabrication and system integration, demonstrating a broad prospect for future system-in-package applications.

Integration of neuromorphic AI in event-driven distributed digitized systems: Concepts and research directions.

Increasing complexity and data-generation rates in cyber-physical systems and the industrial Internet of things are calling for a corresponding increase in AI capabilities at the resource-constrained edges of the Internet. Meanwhile, the resource requirements of digital computing and deep learning are growing exponentially, in an unsustainable manner. One possible way to bridge this gap is the adoption of resource-efficient brain-inspired "neuromorphic" processing and sensing devices, which use event-driven, asynchronous, dynamic neurosynaptic elements with colocated memory for distributed processing and machine learning. However, since neuromorphic systems are fundamentally different from conventional von Neumann computers and clock-driven sensor systems, several challenges are posed to large-scale adoption and integration of neuromorphic devices into the existing distributed digital-computational infrastructure. Here, we describe the current landscape of neuromorphic computing, focusing on characteristics that pose integration challenges. Based on this analysis, we propose a microservice-based conceptual framework for neuromorphic systems integration, consisting of a neuromorphic-system proxy, which would provide virtualization and communication capabilities required in distributed systems of systems, in combination with a declarative programming approach offering engineering-process abstraction. We also present concepts that could serve as a basis for the realization of this framework, and identify directions for further research required to enable large-scale system integration of neuromorphic devices.

Multilayer Perceptron-Based Stress Evolution Analysis Under DC Current Stressing for Multisegment Wires

Electromigration (EM) is one of the major concerns in the reliability analysis of very large-scale integration (VLSI) systems due to the continuous technology scaling. Accurately predicting the time-to-failure of integrated circuits (ICs) becomes increasingly important for modern IC design. However, traditional methods are often not sufficiently accurate, leading to undesirable over-design especially in advanced technology nodes. In this article, we propose an approach using multilayer perceptrons (MLPs) to compute stress evolution in the interconnect trees during the void nucleation phase. The availability of a customized trial function for neural network training holds the promise of finding dynamic mesh-free stress evolution on complex interconnect trees under time-varying temperatures. Specifically, we formulate a new objective function considering the EM-induced coupled partial differential equations (PDEs), boundary conditions (BCs), and initial conditions to enforce the physics-based constraints in the spatial–temporal domain. The proposed model avoids meshing and reduces temporal iterations compared with conventional numerical approaches like finite element method. Numerical results confirm its advantages on accuracy and computational performance.

Opening of the 2023 Editorial Year—This Coda as Prelude of Next TVLSI Cycle With Sustained Growth

The journey as Editor-in-Chief (EiC) of the IEEE Transactions on Very Large Scale Integration (VLSI) Systems (TVLSI) from 2019 to 2022 has been exhilarating. Continuing the analogy with classical music concertos in recent editorials in this journal <xref ref-type="bibr" rid="ref1" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">[1]</xref> , <xref ref-type="bibr" rid="ref2" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">[2]</xref> , <xref ref-type="bibr" rid="ref3" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">[3]</xref> , some movements have been somewhat tempestuous in a rapidly changing world under a pandemic. Simultaneously, fundamental transformations have taken place in the semiconductor supply chain, as well as in our life and work style through increasingly distributed cooperation models (across continents, and from the office to the home office). Other movements have been highly rewarding thanks to the concerted effort (analogy intended) of a talented and rock-solid Editorial Board, whose precious contribution has led to relentless journal improvements in many respects. And, indeed, it has been a real pleasure to work with each and every one of the members of the TVLSI Editorial Board, whose commitment to excellence has brought the journal to new heights.

Call for Applications and Nominations Search for the Editor-in-Chief of IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS

Call for Applications and Nominations Search for the Editor-in-Chief of IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS

Methodologies and Applications of Artificial Intelligence in Systems Engineering

This paper presents an overview of the methodologies and applications of artificially intelligent systems (AIS) in different engineering disciplines with the objective of unifying the basic information and outlining the main features. These are knowledge-based systems (KBS), artificial neural networks (ANN), and fuzzy logic and systems (FLS). To illustrate the concepts, merits, and demerits, a typical application is given from each methodology. The relationship between ANN and FLS is emphasized. Two recent developments are finally presented: one is intelligent and autonomous systems (IAS) with particular emphasis on intelligent vehicle and highway systems, and the other is the very large scale integration (VLSI) systems design, verification, and testing.

Design methodology and multi-objective optimization of small-scale power-water production based on integration of Stirling engine and multi-effect evaporation desalination system

To meet the raising demands for energy and potable water, integration of power plants and desalination systems for large-scale coproduction have been widely used in the world. However, in remote and rural locations with no infrastructures such as power grids, integration of large-scale systems is not financially viable. This paper presents a conceptual design and a methodology based on the GPU-3 Stirling engine in upstream as prime mover, coupled with three configurations of multi-effect evaporation desalination (MED) unit in downstream to address the power-water demands for areas with lower population. A multi-objective optimization technique is employed to find the optimal design parameters of the proposed hybrid system. Three objective functions namely maximizing power and water production and minimizing the cost of products are considered. Decision-making tools are implemented on the optimal points of each configuration to select the optimized configurations for each cogeneration system. The most effective system is then introduced by implementing Analytical Hierarchy Process (AHP) technique. It is found that the final selected system is capable of delivering 2.58 kW of electricity and 19.92 m3 fresh water per day with 2.07 $ ∙ hr−1 cost of products which can be divided into 0.29 $ ∙ kWhr−1 and 1.6 $ ∙ m3 for power and water, respectively.

Large-Scale Optimization of Decoupling Capacitors Using Adaptive Region Based Encoding Scheme in Particle Swarm Optimization

Power delivery networks are responsible for supplying clean power to the integrated circuits. Power supply noise plays a critical role in determining the performance of high-speed very large scale integration circuits and systems. In order to maintain power integrity in high-speed systems, decoupling capacitors are used to maintain low impedance of the PDN to eventually minimize power supply noise. However, the discrete optimization problem of selecting decoupling capacitors becomes computationally challenging in the systems having stringent PI requirements. In this work, a novel approach using the Social-Learning Particle Swarm Optimization (SLPSO) technique along with Adaptive Region Search (ARS) is used to tackle the Large-Scale Optimization Problem (LSOP) of decoupling capacitor placement. Region Search (RS) is used to guide particles, followed by ARS to dynamical search for the local best positions and for particles to move faster across the search space while maintaining the diversity of the population. To demonstrate the proposed approach, three practical case studies are presented. The obtained results are compared with current state-of-the-art approaches. The proposed approach drastically reduces computation time and is consistent with better results than other approaches. This consistency of improvement in CPU time in the results of all the examples validates the proposed approach.

A Radial Basis Function Network-Based Surrogate-Assisted Swarm Intelligence Approach for Fast Optimization of Power Delivery Networks

The design and optimization of Power Delivery Networks (PDNs) in Very Large Scale Integration (VLSI) systems is becoming very challenging with the increasing complexity of such systems. Decoupling capacitors are the key elements used in a PDN to minimize power supply noise and to maintain low impedance of the PDN to avoid system failure. In this paper, a novel approach using surrogate assisted swarm intelligence is presented for efficient and fast optimization of power delivery networks. For generating the surrogate models, a standard Radial Basis Function Network (RBFN) is used. Using the proposed approach, the decoupling capacitors are selected and placed optimally, eventually reducing the cumulative impedance of the PDN below the target impedance. The performance comparison between the conventional and the surrogate-assisted approach is presented. Three case studies are presented on a practical system to demonstrate the competence of the proposed approach. The results obtained by the proposed approach are also compared with the same obtained by the state-of-the-art approaches. For the proposed approach the run time is drastically reduced compared to the state-of-the-art approaches for the optimization problem without having any effect on the performance. The consistency of results in all of the case studies confirms the validity of the proposed approach.

Millikelvin temperature cryo-CMOS multiplexer for scalable quantum device characterisation

Quantum computers based on solid state qubits have been a subject of rapid development in recent years. In current noisy intermediate-scale quantum technology, each quantum device is controlled and characterised through a dedicated signal line between room temperature and base temperature of a dilution refrigerator. This approach is not scalable and is currently limiting the development of large-scale quantum system integration and quantum device characterisation. Here we demonstrate a custom designed cryo-CMOS multiplexer operating at 32 mK. The multiplexer exhibits excellent microwave properties up to 10 GHz at room and millikelvin temperatures. We have increased the characterisation throughput with the multiplexer by measuring four high-quality factor superconducting resonators using a single input and output line in a dilution refrigerator. Our work lays the foundation for large-scale microwave quantum device characterisation and has the perspective to address the wiring problem of future large-scale quantum computers.

Research on Multi-Objective Optimization of Household Photovoltaic Energy Storage and Grid System

With the integration of large-scale photovoltaic systems, many uncertainties have been brought to the grid. In order to reduce the impact of the photovoltaic system on the grid, a multi-objective optimal configuration strategy for the energy storage system to discharge electricity into the grid is proposed. On the basis of the time-of-use electricity price, the total load variance and the user’s profits are taken as two objective functions. Constraints such as the maximum discharge power limit of the energy storage system are taken into account and a multi-objective optimal scheduling model for the centralized discharge of the energy storage system is established. A multi-objective genetic algorithm is used to solve the optimization model. The calculation results of MATLAB verify the feasibility and effectiveness of the strategy and the influence of different energy storage system capacities on the optimization results are also analyzed.

Design and Simulation of a Small Power Two-Bit MC Circuit via Full Adder Logic

In Very Large-Scale Integration (VLSI) systems, a magnitude comparator (MC) is a component of Arithmetic Logic Unit (ALU) used to make binary decisions. Recent technologies demand the use of power-efficient methodologies as well as techniques that require a lesser number of transistors. In this paper, a magnitude comparator is developed using full adder design logic. Full adders are basic components of the ALU which is the logical and arithmetical unit of the microprocessors and Digital Signal Processing (DSP). This design consumes less power and area when compared to other logic styles in the literature. The proposed comparator has been designed using DSCH 3.5 and simulations are done on Microwind 3.5 via 0.12 μ technologies. This comparator shows a power consumption of 31.746μW using 36 transistors. The proposed design exhibits a full adder logic-based comparator with less power consumption and transistor count as compared to those in recent literature.