Large Electromagnetic Interference Research Articles

A Trigger Signals Modification Scheme for Common-Mode Conducted EMI Reduction of Modular Multilevel Converter

Modular multilevel converter (MMC), due to its features of modularization, high efficiency, and so on, has gradually become the mainstream multilevel converter. However, it can induce large electromagnetic interference (EMI) because of the high-level <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$dv/dt$ </tex-math></inline-formula> and <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$di/dt$ </tex-math></inline-formula> during its commutation transient. Therefore, it is significant to analyze the characteristics of common-mode (CM) conducted EMI of MMC and propose a suppression scheme accordingly. In this article, considering the voltage to ground of submodule (SM) as a direct noise source, the relationship between CM current and equivalent noise source of one phase, as well as that between the equivalent noise source of one phase and switching action of each SM are deduced. Furthermore, a trigger signals modification (TSM) scheme is proposed, which can effectively suppress the CM conducted EMI on the dc side without obviously affecting the operating performance of MMC. In particular, this scheme manipulates the trigger signals already generated by the modulation and capacitor voltage balancing control, thus enabling good applicability. Finally, experimental results verify the validity of the analysis and the effectiveness of the proposed TSM scheme.

Mirror-Bridge Phase-Shift Modulation With Low Common-Mode Noise for Single-Phase CHB PFC

For ac/dc power conversion applications like server power supply, telecom power supply, and on-board charger of an electric vehicle, the rising electricity demand has presented challenges toward high efficiency and high power density. The cascaded H-bridge (CHB) based multilevel power factor correction (PFC) converter has much higher power density than that of traditional boost PFC converter. However, the CHB-PFC converter has multiple floating dc outputs, which leads to a common mode (CM) electromagnetic interference (EMI) issue due to the parasitic capacitance of cascaded dc/dc stages and layouts and distributed noise sources existing in the ac/dc system. Thus, a large EMI filter is necessary for the PFC system that sharply degrades the system's power density. In order to quantify the CM noise caused by the floating outputs and cascaded parasitic capacitance, a unified equivalent CM circuit model is derived in this article, which decouples the effects among the multiple CM noise sources in the CHB converter. Based on the derived circuit model, a mirror-bridge phase-shift modulation is proposed to cancel the CM noise within the CHB converter itself. A single-phase 2-kW CHB PFC prototype has been built up to verify the analysis, and 40-dB CM noise reduction compared with conventional unipolar modulation is achieved by the proposed modulation scheme.

Analysis and Suppression of Common-Mode EMI Noise in 1 MHz 380 V-12 V DCX Converter With Low NFoM Devices

For the thriving information technology industrial applications, the series resonant converter (SRC) dc transformer (DCX) using integrated printed circuit board (PCB) windings is a preferred candidate because of its high efficiency and high power density characteristics by pushing the frequency to megahertz. However, the planar PCB transformer possesses large interwinding capacitance, which leads to severe common-mode (CM) noise and a large electromagnetic interference filter. Hence, the total volume of the conversion system is still high. In this article, a series inputs and parallel outputs (ISOP) structure for DCX is analyzed and discussed to demonstrate the CM noise reduction with the static point construction method, in which several dv/dt static points are constructed. Unlike most of the present suppressing methods, it can maintain high efficiency as well. Additionally, the ISOP structure provides more opportunities for optimizing control strategies to achieve the cancelation effect and further reducing the CM noise by the interleaving within a cell and the interleaving among cells. The excellence of the aforementioned methods is verified by experiments on 1-MHz 380 V–12 V 1.8-kW SRC DCX prototypes with a peak efficiency of 98.3%. The proposed methods ultimately reduce the CM noise by 50 dB.

A 1.45 GHz All-Digital Spread Spectrum Clock Generator in 65nm CMOS for Synchronization-Free SoC Applications

The increase of clock frequency in digital circuits exacerbates the electromagnetic interference (EMI) between devices. Spread-spectrum techniques reduce the electromagnetic noise lowering harmonic peaks of the clock signal by means of frequency modulation. In System-on-Chips (SoCs) another requirement in many applications is the coexistence of both modulated and un-modulated clock domains. In these cases, suitable synchronization systems are used to allow data to cross the boundary between spread and un-spread clock domains. In this paper we present a spread-spectrum clock generator (SSCG) able to provide both spreaded and un-spreaded clocks. The spreaded clock has a specially designed modulation profile, allowing at the same time a seamless synchronization-free interface between spreaded and un-spreaded clock domains and a large EMI reduction. The paper presents the derivation of the new highly discontinuous modulation profile (that allows to achieve an EMI reduction up to 15.8dB) and implementation details of an all-digital SSCG able to provide the developed modulation waveform. A test chip has been fabricated in UMC 65nm CMOS technology, using a novel dual-output digitally controlled delay line. The circuit can generate both spread and un-spread clocks (double output mode) or the spread clock alone (single output mode). Area occupation is 0.102mm2, whereas power consumption is 48.5mW in double output mode and 34mW in single output mode.

Large electromagnetic interference shielding effectiveness in Ti3(Al, Si)C2 system

The coexistence of Al and Si has a significant impact on the electromagnetic shielding effectiveness (SE) of Ti3(Al, Si)C2 ceramics and the total SE (SET) peaked when mol(Al): mol(Si) = 1:1. Ti3(Al1/2Si1/2)C2 ceramic exhibit high SET around 47 dB and excellent frequency-stability within X-band frequency. The high SET originates from both high reflection and absorption. High reflection is related to the larger amounts of defects, while high absorption was ascribed to the higher Ohimic loss and coarse microstructure which is beneficial for multiple reflections. Results indicate that Ti3(Al1/2Si1/2)C2 ceramic could be considered as promising structural electromagnetic shielding materials.

Electrically Conductive and Mechanically Strong Graphene/Mullite Ceramic Composites for High-Performance Electromagnetic Interference Shielding.

Ceramic composites with good electrical conductivity and high strength that can provide electromagnetic interference (EMI) shielding are highly desirable for the applications in harsh environment. In this study, lightweight, highly conductive, and strong mullite composites incorporated with reduced graphene oxide (rGO) are successfully fabricated by spark plasma sintering at merely 1200 °C using the core-shell structured γ-Al2O3@SiO2 powder as a precursor. The transient viscous sintering induced by the γ-Al2O3@SiO2 precursor not only prohibits the reaction between mullite and rGO by greatly reducing the sintering temperature, but also induces a highly anisotropic structure in the rGO/mullite composite, leading to an extremely high in-plane electrical conductivity (696 S m-1 for only 0.89 vol % of rGO) and magnitude lower cross-plane electrical conductivity in the composites. As a result, very large loss tangent and EMI shielding effectiveness (>32 dB) can be achieved in the whole K band with extremely low rGO loading (less than 1 vol %), which is beneficial to maintain a good mechanical performance in ceramic matrix composites. Accordingly, the rGO/mullite composites show greatly improved strength and toughness when the rGO content is not high, which enables them to be applied as highly efficient EMI shielding materials while providing excellent mechanical performance.

Modeling and simulation of parallel DC/DC converters for online AC impedance estimation of PEM fuel cell stack

The electrochemical impedance spectroscopy (EIS) technique is now widely used in the study of the hydrogen polymer electrolyte membrane fuel cell (PEMFC), especially the diagnosis of flooding and drying. Though the working conditions of fuel cell vehicles is fairly rough with large electromagnetic interference and ever-changing environment, lots of efforts have been made to prompt the online EIS analysis of PEMFC stack in vehicles, such as using a DC/DC converter based on the ripple currents or active voltage control and so on. Considering the practical topologies of fuel cell powertrain systems, their researches inspire us to put forward a simpler approach in terms of applicability and controllability. For this reason, a topology of two parallel boost DC/DC converters for online AC impedance estimation of PEMFC stack is proposed. This topology is modeled using Matlab/Simulink. To better understand the electrical characteristic of PEMFC, equivalent circuits are utilized to model the PEMFC based on the electrochemical reactions and mass transport properties in the fuel cell. Fluctuation signals produced by a DC/DC converter are injected into the stack. The other DC/DC converter is used to adjust the output characteristic of the stack to the output voltage and current requirements of the external power devices and load. In this way, the fluctuation signal generation and power conversion are decoupled, which is more suitable for different applications of PEMFC stack. To effectively control these converters, closed-loop PI controllers are adopted and coefficients are regulated according to the frequency of disturbance signals. Based on this model, simulation results show that fluctuation signals are well generated and injected into the stack with low total harmonic distortion (THD). After analysis of the output voltage and current of the stack using FFT technique, AC impedance calculated is in consistent with the impedance characteristic of the equivalent circuits with high accuracy.

Design of Low-Voltage Power Supply Drive Circuit Based on the Piezoelectric Ceramic Transformer

The piezoelectric ceramic transformer has the advantages of high conversion efficiency, high pressure, electromagnetic compatibility,etc.It overcomes the shortcomings of large electromagnetic interference, low conversion efficiency , a large volume, etc. Using IR2184,the paper designs piezoelectric ceramic transformer full-bridge driver circuit. It greatly improves the conversion efficiency of the power system and power.

Spread-Spectrum Clock Generator for Serial ATA with Multi-Bit Modulator-Controlled Fractional PLL

We have developed a spread-spectrum Phase-Locked Loop (PLL) for serial Advanced Technology Attachment (ATA) applications. We investigated the relation between the output jitter of PLLs in serial ATA applications and ΣΔ modulators in PLLs. On the basis of this study, we developed a spread-spectrum PLL for serial ATA applications and achieved a combination of small jitter and large electromagnetic interference (EMI) peak power reduction. This was achieved using two key components: multi-bit SA-controlled PLL and voltage-controlled oscillation with cross-coupled load delay cells. Using a 0.15-μm complementary metal-oxide semiconductor process, we fabricated a complete serial ATA transceiver featuring a spread-spectrum clock generator (SSCG). We achieved a spread-spectrum PLL with 10-dB EMI reduction and 8.1 ps random jitter for use in serial ATA applications. All other measured results for SSCG performance were very good and showed that the spread-spectrum generator more than satisfies serial ATA specifications.

EMI resisting CMOS differential pair structure

An improved differential pair structure, which is highly immune to conducted electromagnetic interference (EMI), is described. This new structure has a very low input offset voltage, even when a large EMI is superimposed on the nominal input signal.

Application of a three-level NPC inverter as a three-phase four-wire power quality compensator by generalized 3DSVM

A two-level four-leg inverter has been developed for the three-phase four-wire power quality compensators. When it is applied to medium and large capacity compensators, the voltage stress across each switch is so high that the corresponding dv/dt causes large electromagnetic interference. The multilevel voltage source inverter topologies are good substitutes, since they can reduce voltage stress and improves output harmonic contents. The existing three-level neutral point clamped (NPC) inverter in three-phase three-wire systems can be used in three-phase four-wire systems also, because the split dc capacitors provide a neutral connection. This paper presents a comparison study between the three-level four-leg NPC inverter and the three-level NPC inverter. A fast and generalized applicable three-dimensional space vector modulation (3DSVM) is proposed for controlling a three-level NPC inverter in a three-phase four-wire system. The zero-sequence component of each vector is considered in order to implement the neutral current compensation. Both simulation and experimental results are given to show the effectiveness of the proposed 3DSVM control strategy. Comparisons between the 3DSVM and the 3-D hysteresis control strategy are also achieved.

An Active EMI Filtering Technique for Improving Passive Filter Low-Frequency Performance

In recent years, there has been considerable interest in the development and applications of active electromagnetic interference (EMI) filters. An active EMI filter (AEF) for integrated power electronics module (IPEM) is proposed in this paper, where large passive EMI filter is replaced by small passive components and active op-amp circuit. The technique is appropriated when improved attenuation is required at relatively low frequencies and the high-frequency filtering requirements are easily met. The effectiveness of the proposed circuit has been verified by experimental results. It is demonstrated that the proposed approach is most effective in a case where it is desirable to minimize the amount of passive components in the filter.

A new microstructured silicon substrate for ultrathin gas-sensitive films

Microstructured substrates featuring interdigitated electrodes with a high length-to-width ratio allow the evaluation of thin films with very high sheet resistivity even in environments with large electromagnetic interference. However, thin phthalocyanine (Pc) films vacuum evaporated on substrates with conventional interdigitated (ID) electrodes deposited on top of a planar surface, develop cracks at the edges of the contact stripes. For samples with a film thickness of 200 monolayers (ML) corresponding to 80 nm this causes a resistance two orders of magnitude higher than expected for the chosen length-to-width ratio. A new microstructured Si substrate with in-plane interdigitated (IPID) electrodes is designed to achieve minimum height differences on the surface. This substrate features interdigitated electrodes with a length-to-width ratio of 52 000:1 and, additionally, an integrated heating element and a temperature-sensitive resistor. Thin Pc films with various thicknesses between 50 ML ( = 20 nm) and 500 ML ( = 200 nm) exhibit sheet resistivities as were expected for the chosen length-to-width ratio. These sensing elements were successfully employed in the detection of diesel exhaust gases in ambient air and they have proven their stability and sensitivity in polluted air during several months.

In-plane interdigitated (IPID) electrodes for thin film applications

Microstructured substrates featuring interdigitated electrodes with a large length to width ratio allow the evaluation of thin films with very high sheet resistivity even in environments with large electromagnetic interference. However thin phthalocyanine (Pc) films, vacuum evaporated on substrates with conventional interdigitated (ID) electrodes deposited on top of a planar surface, develop cracks at the edges of the contact stripes. For samples with a film thickness of 200 monolayers (ML) corresponding to 80 nm this causes a resistance two orders of magnitude higher than that expected for the chosen length to width ratio. A new microstructured Si-substrate with in-plane interdigitated (IPID) electrodes has been designed to achieve minimum height differences on the surface. This substrate features interdigitated electrodes with a length to width ratio of 52,000:1 and additionally an integrated heating element and a temperature sensitive resistor. Thin Pc-films with various thicknesses between 50 ML (=20 nm) and 500 ML (=200 nm) exhibit sheet resistivities as were expected for the chosen length to width ratio. These sensing elements were successfully employed in the detection of NOx emissions in cars and their stability and sensitivity have been proved over several months in polluted air.