We propose an equivalent circuit model for the post-breakdown (BD) current-voltage ( I-V) characteristics in HfO2/TaN/TiN gate stacks in n-MOSFETs. The model consists of two opposite-biased diodes with series resistances and a shunt leakage path. The circuit admits analytical solution using the Lambert W-function and is tested for both negative and positive gate biases in the voltage range of -1.5 to +1.5 V. We also show the versatility of the proposed approach to deal with the post-BD I- V when source and drain contacts are grounded or floating and analyze the obtained results in terms of the charge available for conduction.