Abstract

We propose an equivalent circuit model for the post-breakdown (BD) current-voltage ( I-V) characteristics in HfO2/TaN/TiN gate stacks in n-MOSFETs. The model consists of two opposite-biased diodes with series resistances and a shunt leakage path. The circuit admits analytical solution using the Lambert W-function and is tested for both negative and positive gate biases in the voltage range of -1.5 to +1.5 V. We also show the versatility of the proposed approach to deal with the post-BD I- V when source and drain contacts are grounded or floating and analyze the obtained results in terms of the charge available for conduction.

Full Text
Paper version not known

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call

Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.