Synchronous reference frame proportional-integral (PI) current controller (CC) is considered the most well-established solution for the current regulation in electrical drives. However, the gain selection of the PI CC is still regarded to be poorly reported, particularly in relation to the effect of the inevitable execution time taken by the controller and inverter. Mostly, tuning process of PI CC is done by trial and error or using simple rules based on pole zero cancelation and pole placement methods which ignore time delays through the controller and inverter. Hence, PI CC delivers significantly different performance compared to the expected one during the digital implementation, especially if high bandwidth or low ratio between the switching and operational frequency are required. Therefore, this paper firstly addresses and analyses the common tuning rules of PI CC which ignore the existence of time delays followed by a rigorous analysis for PI CCs' robustness to the influence of computational and modulation delays. Based on this analysis, generic recommendations have been proposed to select the PI CCs' gains as a function of the electrical drive switching frequency considering the delay effect. A set of simple, generic, and fast tuning rules were derived that guarantee fast dynamic performance with reasonable stability margins. Moreover, the effects of model uncertainties on these developed rules have been analyzed and reported. Comprehensive experimental results are provided to prove the key analytical results of this study and to validate the proposed design recommendations.