Junction Temperature Research Articles

A Thermal Impedance Model for IGBT Modules Considering the Nonlinear Thermal Characteristics of Chips and Ceramic Materials

The traditional method of calculating junction temperature does not consider the dependence of a material’s thermal conductivity on temperature, in which the thermal conductivity changes with temperature. However, with an increase in junction temperature, the temperature sensitivity (TS) will have a more significant impact on the actual temperature of chips. This study established an improved IGBT equivalent thermal impedance model that considers the nonlinear characteristics of the TS of chips and ceramic materials. The Fourier series analysis method was used to obtain the heat flux density curve, and then the heat diffusion angles of each layer were solved. Moreover, iterations were performed until the thermal conductivity and temperature of the chip and ceramic layers matched the nonlinear characteristics of the TS. When the power loss was less than 200 W, the maximum error of the junction temperature calculated by the proposed method considering TS was 3%, while the maximum error of the method without considering TS was 9.5%. Compared with the finite element simulation, the proposed method has a faster solving speed and high accuracy. The proposed method only requires the input material parameters, size parameters, and boundary conditions to solve the junction temperature, which has strong practicality and high accuracy.

The effect of different mission profiles and ambient temperature on the lifetime of boost converter IGBT with a robust controller in a hybrid electric vehicle

AbstractThe reliability of power electronic converters is one of the essential issues in designing of electric vehicles. This paper estimates the lifetime of the boost converter switch by Semikron and Coffin‐Manson models for two common failure mechanisms of Bond wire and Base plate solder, respectively. Four mission profiles based on the Artemis standard are applied to hybrid electrical vehicle model to determine unidirectional output power. Kharitonov's theory is used to design a robust controller to handle the uncertainty raised by different power cycles of the electric vehicle and the parameters of the converter during simulation. Stability of converter is achieved during simulation by identifying simple proportional integral controller coefficients with Kharitonov's theorem. A prototype 230 W boost converter is designed and utilized to validate average model and switch loss calculation relationships. The lifetime results indicate that the number of cycles, and the average and the maximum junction temperature have a more impact than the duration of the drive cycle on the lifetime of the converter. A mixed mission profile is considered to investigate the effect of sudden change in driving modes and speed on total consumed life and lifetime to enhance the study's applicability. Lifetime of switch is decreased significantly in mixed mode in comparison with other mission profiles in the same driving time. Furthermore, the motorway mission profile has 53%, 39.6%, and 160% less total consumed life in comparison with the urban, rural and mixed mission profiles, respectively. In addition, the effect of ambient temperature changes on IGBT lifetime has been investigated for four mission profiles. While motorway had the least total consumed life in 25°C, the urban had better performance in comparison with other mission profiles from 25 to 55°C.

Thermal Characterization Methodologies for Experimental Minichannel Heat Sink Designs in Printed Circuit Board Assemblies

There has been a growing demand for novel, highly efficient, power-saving cooling solutions in recent years. In many cases, standard cooling techniques offer only limited opportunities to prevent the overheating of circuits. Such issues concern high-speed Printed Circuit Board Assemblies (PCBA) in data centers and telecommunication racks, where the flow of the cooling medium is obstructed due to the lack of space. Size limitations can also be a serious problem when cooling high-power devices because the devices consume a large space. Since the heat sink-based cooling solutions and the sophisticated IC packages only deal with one possible heat flow path, we were given the idea of enhancing the secondary heat flow path towards the Printed Circuit Board (PCB). Led by this intention, the idea of creating an embedded minichannel system inside the circuit board and circulating the cooling agent was realized. Through this method, we could decrease the board-to-ambient thermal resistance significantly. This paper presents the demonstration and feasibility study of this method. One of the main aims of this study is to demonstrate the applicability of the proposed concept in PCBAs, where the primary concerns are the low-cost manufacturability and available space. The other goal is to create an adaptation of the standard thermal characterization methodologies to deal with the specific dissipating components in the PCBA demonstrators. In the first part, the manufacturing technology is elaborated on, and its efficiency is characterized by thermal transient testing and Computational Fluid Dynamics (CFD) simulations. For these use cases, it was noted that the cumulative thermal resistance decreased by approximately 60% when a volumetric flow rate of 100 ccm was applied in the minichannels. In the second part, a more sophisticated technology demonstration is realized and characterized by adding the proposed embedded minichannel heat sink to an existing high-speed PCBA. A specific thermal transient testing was implemented specifically for this use case, and it was carried out on programmable logic devices by utilizing general-purpose programmable logic to construct the necessary measurement methods. In the future, this feature can be used in different logic circuit designs where it is not possible to determine the junction temperature directly.

Study on the influence mechanism of gate oxide degradation on DM EMI signals in SiC MOSFET

This paper investigates gate oxide degradation and its influence on Differential Mode(DM) EMI signals. The study reveals that changes in the parasitic capacitance within the chip, resulting from gate oxide degradation, can modify the amplitude-frequency characteristics of DM EMI signals, leading to unexpected transmission outcomes. This paper subjects SiC MOSFET modules to periodic high-temperature gate bias stress, extracts the spectrum characteristics of DM EMI, and assesses the impact of junction temperature. The analysis explores the impact of gate oxide degradation on low and high frequency DM EMI signals. Experimental results reveal distinct sensitivities of amplitude-frequency characteristics in the DM EMI signals to temperature variations and responses to gate oxide degradation at various frequency bands. The extrapolation of the correlation between the frequency-domain characteristics of the DM EMI signals and the degree of gate oxide degradation introduces a novel approach to evaluate the lifespan of power electronic devices.

Real‐time reliability evaluation method for IGBT module in MMC based on junction temperature and bond wire failure online monitoring

AbstractThe lack of an MMC reliability evaluation approach that incorporates data on essential components' health monitoring in the already related research prevents reliability from being further improved. Therefore, this article proposes a real‐time reliability evaluation method of the multi‐state IGBT module in MMC through iterative calculation of the Markov chain model. The degradation process of the IGBT module is divided into multiple states based on the monitored bond wire failure, and the failure rate of the IGBT module is updated in real time using the accumulated monitoring data of junction temperature. The proposed method can more accurately reflect the real state of MMC compared with the binary state evaluation method. Besides, a multi‐channel high‐speed data acquisition board is designed to measuring the gate voltage and collector voltage of the IGBT for the health evaluation of IGBT modules in MMC; the typically measured results validate the effectiveness of the data acquisition board.

The degradation mechanism of high power S-band AlGaN/GaN HEMTs under high temperature

Abstract The radio frequency (RF) degradation mechanism under high temperature is proposed in this paper. The saturated output power (P sat), power added efficiency (PAE) and gain of the HEMTs deteriorate significantly under high power dissipation operation conditions, which contribute to an elevation of the junction temperature (T j). The high T j causes a negative shift of the threshold voltage and a reduction of electron mobility, as well as enhancing the trapping effects of the devices. As a result, the P sat and PAE of the high-power HEMTs (P sat = 152 W) decreased by 0.76 dB and 8.3%, respectively, which is more severe compared to low-power HEMTs (P sat = 20 W), where P sat and PAE reduced by 0.16 dB and 3.1% when the operation temperature was increased from 25 °C to 150 °C. By increasing the gate-to-drain distance from 1.625 to 2.175 μm, drain current stability and high temperature reverse bias reliability are improved. The results demonstrate that the trapping effect can be suppressed by decreasing the electric field under the gate; therefore, the RF output characteristics are boosted by 1.2 W, 1 dB and 2.6% for a device with gate width of 11.52 mm.

Junction Temperature Prediction and Lifetime Assessment in a PV Inverter Using a 10-year Mission profile

The expansion of great-scale photovoltaic (PV) power plants indicates the need for an accurate lifetime assessment of inverters to maintain energy supply availability. In this context, the study contributes in two ways. First, we use machine-learning (ML) models for junction temperature prediction. Second, we perform reliability assessments using a 10-year mission profile in three Brazilian cities. The thermal loadings are obtained through a look-up table approach. Although the ML models exhibit different performances in regression, other factors must be considered, such as easy-to-apply, interpretability, and generalization capability. The reliability assessment is typically based on an annual mission profile, assuming damage repeats until failure. However, only the historical series can confirm whether this choice was acceptable, pessimistic, or optimistic. For instance, in Campos do Jordão-SP, if the chosen mission profile is 2014, the expected failure of 10\% of inverter samples occurs three years earlier than suggested by the historical series. Regardless of the methodology used to estimate thermal loading or accumulated damage, the mission profile significantly influences photovoltaic inverter reliability, indicating that if more data is available, the chosen mission profile should align with the historical series.

Zero Sequence Injection in Delta-CHB STATCOM: Towards Optimum Silicon Area Through Typical Power IGBT/diode Model

This work quantifies the impact of third harmonic circulating current injection (THCCI) in a Cascaded H-bridge converter in delta configuration (Delta-CHB) for Static Synchronous Compensator (STATCOM) application. The analyses consist of evaluating the impact of THCCI on the silicon area of semiconductor devices. To achieve this objective, this work develops a typical IGBT/Diode model to determine the nominal current of the devices for a given maximum junction temperature. Commercial devices in the voltage classes of 1700 V, 3300 V, 4500 V, and 6500 V were considered, with nominal currents ranging from 150 A to 3600 A. A hybrid approach based on physical-oriented scaling laws and black-box modeling allows to reach a coefficient of determination higher than 79\% for all modeled variables. The results showed an increase of 43.8\% in the active area of the IGBT and 30.87\% in the active area of the diode when the peak cluster current increased by 62\% due to THCCI.

Indirect Thermographic Measurement of the Temperature of a Transistor Die during Pulse Operation

This paper presents aspects related to the indirect thermographic measurement of a C2M0280120D transistor in pulse mode. The tested transistor was made on the basis of silicon carbide and is commonly used in many applications. During the research, the pulse frequency was varied from 1 kHz to 800 kHz. The transistor case temperature was measured using a Flir E50 thermographic camera and a Pt1000 sensor. The transistor die temperature was determined based on the voltage drop on the body diode and the known characteristics between the voltage drop on the diode and the temperature of the die. The research was carried out in accordance with the presented measuring standards and maintaining the described conditions. The differences between the transistor case temperature and the transistor die temperature were also determined based on simulation work performed in Solidworks 2020 SP05. For this purpose, a three-dimensional model of the C2M0280120D transistor was created and the materials used in this model were selected; the methodology for selecting the model parameters is discussed. The largest recorded difference between the case temperature and the junction temperature was 27.3 °C. The use of a thermographic camera allows the transistor’s temperature to be determined without the risk of electric shock. As a result, it will be possible to control the C2M0280120D transistor in such a way so as not to damage it and to optimally select its operating point.

Reliability Simulation of IGBT Module with Different Solders Based on the Finite Element Method

The interconnecting solder is a key control factor for the reliability of electronic power packaging because it highly affects the junction temperature of insulated-gate bipolar transistor (IGBT) modules and is prone to plasticity, creep, and other failure behaviors under temperature-change environments. In this paper, the interconnecting performance and fatigue life of five different kinds of solders such as SAC305, sintered silver, Au80Sn20, sintered copper, and pure In under direct current (DC), power cycle, and electro-thermal coupling complex environments were studied based on electro-thermal multi-physical field coupling finite element simulation method, respectively. Results show that the sintered silver owns the most outstanding thermal reliability and the DC operating junction temperature of the IGBT module after utilizing sintered silver solder is only 90.2 °C, which is nearly 15 °C lower than that of the IGBT module utilizing SAC305 solder. Furthermore, in the power cycle reliability test, the fatigue life of Au80Sn20 solder reaches a maximum of 3.26 × 107 cycles while the life of indium presents only 5.85 × 103 cycles, a difference of nearly four orders of magnitude. Finally, under the complex environment of electro-thermal coupling, the fatigue life of Au80Sn20 solder is also the largest at 1.9 × 106 cycles, while the smallest life of solder becomes SAC305 solder at 4.44 × 102 cycles. The results of this paper can provide a theoretical basis for solder selection and life prediction of the IGBT module, which is of great significance in improving the reliability of power electronic packaging.

Dynamic numerical calculation of multi-physics fields in IGBT chip layer based on ETM-PINN

The electric-thermal-mechanical (ETM) multi-physics coupling fields commonly exists in power electronic devices such as insulate-gate bipolar transistor (IGBT), which dominates the evolution of key state variables inside the components. Among them, the junction e and electric potential of the chip layer, as the dependent variables of various lifetime physical models, directly affect its remaining service life and health status. Aiming at the problem that the key physical variables inside the IGBT are difficult to monitor and predict, this paper first integrates and establishes the ETM coupling partial differential equations (PDEs) inside the IGBT, then accordingly proposes an accurate numerical calculation method for coupled physical fields based on ETM-physics-informed neural networks (ETM-PINN).Through relevant simulation verification, it can not only realize the numerical calculation of the chip layer junction temperature and electric potential field without data, but also perform multi-physics predictive calculation with reduced accuracy in the absence of the key coefficients in PDEs. In the presence of additional physical field data, it can also perform data-model fusion calculations to further improve the solution accuracy.

Hardware Testing Methodologies for Wide Bandgap High-Power Converters

Wide bandgap (WBG) power semiconductor devices are increasingly replacing silicon IGBTs in high-power and high-voltage power electronics applications. However, there is a significant gap in the literature regarding efficient testing methodologies for high-power and high-voltage converters under constrained laboratory resources. This paper addresses this gap by presenting comprehensive, hardware-focused testing methodologies for high-power and high-voltage WBG power semiconductor-based converter bring-up before the control validation phase steps in. The proposed methods enable thorough evaluation and validation of converter hardware, including device switching characteristics, driving circuit functionality, thermal management performance, insulation integrity, and sustained operation at full power. We utilized the double pulse test (DPT) to characterize switching performance in a two-level phase leg configuration, extract circuit parasitics, and validate magnetic components. The DPT was further applied to optimize gate driving circuits, validate overcurrent protection mechanisms, and measure device on-resistance. Additionally, a multicycle test was introduced to rapidly assess steady-state converter performance and estimate efficiency. Recognizing the critical role of thermal management in high-power converters, our methodologies extend to the experimental extraction of key thermal parameters—such as junction-to-ambient thermal resistance and thermal capacitance—via a heat loss injection method. A correlation method between temperature sensor measurements and junction temperature is presented to enhance the accuracy of device temperature monitoring during tests. To ensure reliability and safety, dielectric withstand tests and partial discharge measurements were conducted at both component and converter levels under conventional 60 Hz sinusoidal and high-frequency PWM waveforms. Finally, we highlight the importance of testing converters under full voltage, current, and thermal conditions through power circulating tests with minimal power consumption, applicable to both non-isolated and isolated high-power converters. Practical examples are provided to demonstrate the effectiveness and applicability of these hardware testing methodologies.

On-State Voltage Measurement Circuit for Condition Monitoring of MOSFETs in Resonant Converters

This work aims to estimate the Metal-Oxide-Semiconductor Field-Effect Transistor’s (MOSFET) junction temperature, guessing in real time the dynamic drain-source resistance during MOSFET operation in LLC (Inductor-Inductor-Capacitor) converters usually adopted in Switched-Mode Power Supplies. The task is accomplished using an on-state voltage measurement circuit that allows clamping of the high-voltage drain-source voltage during the off-state. The results of this method have been compared with the temperature accurately measured using a co-packed die as a thermal sensor.

Finite Element Analysis of LED Heat Dissipation Performance Based on Graphene Composites

Abstract With the gradual development of integrated circuits to thin, high-performance and versatile of electronic products is becoming more and more powerful, and its integration and assembly density continue to improve, which will lead to the increase of its working power consumption and heat. If not timely treatment of heat dissipation problems, which will lead to heat concentration in the diode PN junction, it will reduce the service life of LED lights, and in severe cases, it will even burn the LED device. Therefore, it is crucial to improve heat dissipation efficiency of LED and reduce the junction temperature of chip. An LED structure with aluminum material and an LED structure with graphene material are analyzed by finite element method to study the heat dissipation efficiency of the graphene material. The results reveal that the heat dissipation effect of high conductivity graphene composites provides a convenient evaluation method for the subsequent use of the new materials. The research in this paper shows that the software simulation method can effectively analyze the thermal conductivity of practical engineering applications.

Junction Temperature Correction Method for SiC MOSFET Based on Turn-Off Oscillation Frequency of Drain-Source Voltage

Junction Temperature Correction Method for SiC MOSFET Based on Turn-Off Oscillation Frequency of Drain-Source Voltage

An Online Junction Temperature Estimating Method for SiC MOSFETs Based on Steady-State Features and GPR

An Online Junction Temperature Estimating Method for SiC MOSFETs Based on Steady-State Features and GPR

A Gate Degradation Independent Online Junction Temperature Estimation Method for SiC MOSFETs Based on Residual Resistance

A Gate Degradation Independent Online Junction Temperature Estimation Method for SiC MOSFETs Based on Residual Resistance

Thermal and hydraulic performance of 3D printed jet impingement configuration for SiC power modules in aerospace propulsion inverters

Efficiently controlling the temperature of power electronic inverters is crucial for aerospace applications with high power density. Effective thermal management strategies could enhance the power output of power inverters to their maximum rated capacity. Jet impingement is a promising technology with outstanding heat transfer characteristics, making it a sophisticated aid for cooling innovation in power inverters. A numerical comparative study was conducted between jet impingement and traditional pin finned heat sink. In our case study, the pin fin could not effectively regulate the junction temperature to a level below 150 °C. By using a 3D printed jet impingement housing composed of polymer, the weight of the power module thermal management system could be decreased by 71 % compared to a metallic pin finned heat sink. Moreover, this approach aids in lowering the junction temperature to 129 °C, under the same boundary conditions. Additionally, a numerical study was conducted on power modules with thermal imbalance used in aerospace inverters. The study proposed various configurations of jet impingement to reduce temperature differences between power module switches, as well as minimize the pressure drop across the jet impingement housing. The primary objective is to minimize the temperature disparity between the unbalanced switches in order to improve the overall reliability and lifespan of the power module, while decreasing the pressure drop. Among all the options, the optimum design achieves a minimal temperature difference of 24 °C between the power module switches, while the pressure drop reaches 12 kPa.

The Thermal Performance of The Plate-fin Heat Sink under Natural Convection at Different Power Levels and Ambient Temperatures

The thermal performance of a flat heat sink and a plate-fin heat sink was experimentally compared under natural convection conditions at thermal powers of 16.5 W and 33 W and ambient temperatures of 30°C and 40°C. For the same heating powers, surface and junction temperatures increased as the ambient temperature rose from 30°C to 40°C, but the increase was not as much as the ambient temperature change. For the flat heat sink, the increase in junction temperature was 5°C at 16.5 W and 6.68°C at 33 W. For the plate-fin heat sink, the increase in junction temperature was 3.55°C at 16.5 W and 4.47°C at 33 W. The increase in surface temperature for the flat heat sink was 5.35°C at 16.5 W and 5.91°C at 33 W, while for the plate-fin heat sink, the surface temperature increase was 4.76°C at 16.5 W and 2.22°C at 33 W. The thermal resistance of the flat heat sink was around 4 K/W, while for the plate-fin heat sink, it ranged between 2-2.5 K/W, providing approximately twice the advantage in thermal resistance for the plate-fin model compared to the flat model. Under all conditions, the Rayleigh number (Ra) significantly decreased with the increase in ambient temperature but increased with the applied thermal power. Thus, the increase in Rayleigh number with power was more pronounced in the plate-fin model, indicating a more significant effect. In the plate-fin model, the fin efficiency slightly decreased with the increase in ambient temperature, from 0.63 to 0.62 at 16.5 W and from 0.65 to 0.64 at 33 W.

Size and temperature effects on optoelectronic properties of Micro-LED arrays for display applications

In recent years, Micro-light-emitting diode (Micro-LED) has attracted much attention in the display field, because it provides the possibility of high pixel density, etc. The implementation of high pixel density is accompanied by the reduction of size, during which the performance degradation caused by sidewall defects gradually increases. At the same time, the increase in power density and difficulty in heat dissipation caused by high pixel density can also lead to poor thermal management, resulting in an increase in junction temperature, thus affecting the display effect. In this paper, we prepared seven different sizes of Micro-LED and studied the influence of size and temperature effects on the optoelectronic properties. Smaller-sized Micro-LED could withstand higher current densities because it was not affected by the current crowding effect. However, it tends to have a larger series resistance (RS) and a lower external quantum efficiency (EQE) due to sidewall defects created during etching. The luminance of the 100 μm and 7 μm Micro-LED was 340000 cd/m2 (at 83 A/cm2) and 32000 cd/m2 (at 773 A/cm2), respectively. The peak EQE of 100 μm Micro-LED was 16.87 %. On this basis, the temperature-dependence of the optoelectronic properties of 10 μm and 50 μm Micro-LED were studied. The larger the size of Micro-LED, the better the operational stability it exhibited. From the room temperature (RT) rose to 100 ℃, the EQE of the 10 μm and 50 μm Micro-LED decreased by 16 % and 13.1 %, respectively. These experimental results provide important data for the design and preparation of Micro-LED of different sizes and for exploring the operational stability at high temperatures.