This report identifies the timing pulses and sequential digital logic needed for practical control of iterative- differential-analyzer programs and proposes a syste matic notation. Against this background, the design of a very flexible and convenient digital control unit developed for the University of Arizona's new ASTRAC II, an all-solid-state machine employing both "fast" ±10-volt amplifiers capable of iteration rates up to 1 Kc and "slow" ±100-volt amplifiers. A variety of "packaged" iteration routines is pro duced with a minimum of digital-logic patching. Digital-clock circuits can, in particular, control sta tistical evaluation of thousands of Monte-Carlo-type random-process simulations with automatic param eter changes, and will also control displays or analog- digital linkages.