Isolated DC Sources Research Articles

Dual tri-isolated DC H-6 inverter with minimal power components design

Multilevel inverters have been forecasted in recent years for industrial and renewable energy applications due to its inherent characteristics of shaping the output voltage nearer to sinusoidal shape through concatenating several two/three level inverters using isolated DC sources or DC-link capacitors. However, the classical topologies used for synthesizing stepped voltage have several outwards like more number of DC sources or DC-link capacitors and switching devices used. In this paper, an effort has been sighted to bring a new topology for generating stepped voltage to overcome the above mentioned demerits. In addition to this, a new digital pulse width modulation (PWM) strategy is developed in-line with a new topology to eliminate the use of carrier and reference signals. The performance of the proposed topology and developed control strategy are evaluated in MATLAB/ Simulink platform and an laboratory prototype is constructed for experimental investigations to accord the simulation results.

H – Bridge IGBT Inverter by using Arduino

In this work, five-level inverter topology that can tolerate faults on switches is proposed. The fault on switches is classified based on the two main legs of the proposed inverter. The proposed topology is also beneficial as it reduces the number of switches and isolated DC sources as compared with CHB. The proposed topology also has an additional advantage of self-voltage balancing of its capacitor voltage even under post fault conditions.

Selective Harmonic Elimination Technique Improvement for Cascaded H-Bridge Multilevel Converters Under DC Sources Uncertainty

The performance of multilevel converters (MLCs) is at the risk of uncertainty of DC sources. This issue has a more negative effect on three-phase cascaded H-bridge MLCs (CHB-MLCs) due to more isolated DC sources. DC voltage variation can take place in all phases, but in this paper, the effect of DC voltage variation of one phase on line voltages is considered. This problem can lead to unbalanced line voltages and a lack of third harmonic elimination in a spontaneous way. Therefore, these problems cause to modify the formulation of quarter-wave symmetrical selective harmonic elimination (SHE) for three-phase CHB-MLCs so that the line voltages become resistant to DC voltage variations as well as mitigating third harmonic. To keep line voltages amplitude fixed under variation of DC voltages, it is necessary to take advantage of non-identical modulation indices to exploit the maximum capacity of DC voltages. Furthermore, regarding unequal DC voltages that can appear in numerous states in a phase, a new method based on the average of DC voltages (ADCV) per phase is employed in the formulation of SHE to reduce these states. Finally, both simulation and experimental results are presented to validate the performance of the proposed method.

A quad DC source switched three-phase multilevel DC-link inverter topology

The concept of an isolated DC source cascaded multilevel inverter finds good solutions for generating quality output voltage for low-medium power applications. It shapes the output voltage from three levels into a number of steps closer to a sinusoidal shape using small DC sources or batteries. Several advantages have been sighted like lower voltage stress and bearing noise, and lesser THD. However, a common issue in the MLIs is the total components required which increase with the rise in voltage levels. This paper proposes a three-phase MLI design having several isolated quad voltage source modules including an H-Bridge inverter. The design suggested claims reduced switching components for current conduction paths showing improved output quality. The operational features of the suggested MLI have been analyzed using Matlab/Simulink software, furthermore, an experimental module is constructed for demonstrating the effectiveness of the simulated results.

A single-stage dual-source inverter using low-power components and microcomputers

This paper is an attempt to provide a dual-source inverter, an intelligent inverter topology that links two isolated DC sources to a single three-phase output through single-stage conversion. The converter is designed to be utilized in hybrid photovoltaic fuel cell systems, among other renewable energy applications. The proposed dual-source inverter employs a single DC-AC converter, as opposed to conventional dual-source hybrid inverters which make use of several input DC-DC modules to obtain the voltage formed across the inverter’s input DC-link. In the proposed topology, the semiconductor count is low, which leads to improved efficiency, cost, complexity, and reliability. The proposed topology makes use of two impedance networks connected by transformers, diodes, and capacitors. The regulation of the electrical power generated by primary sources and the independence of the converter on key factors like voltage and frequency are essential parameters in multi-input converters. This feature becomes highly prominent when the control algorithm is implemented by conventional processors. Viewed from this perspective, the control method described in this paper is worthy of consideration. The research work describes a 220-W/50 Hz prototype that employs Simple Boost-SPWM. Experimental results verify the analyses and corroborate the satisfactory performance of the suggested converter.

Multi-Mode Carrier-Based PWM Strategy of Open-End Winding PMSM With Isolated DC Sources

Multi-Mode Carrier-Based PWM Strategy of Open-End Winding PMSM With Isolated DC Sources

Harmonic elimination of a fifteen‐level inverter with reduced number of switches using genetic algorithm

AbstractMultilevel inverters play a crucial role in high‐power renewable energy applications and medium voltage drives. However, existing solutions such as capacitor‐clamped and diode‐clamped multilevel inverters are not suitable for these applications due to their dependence on isolated DC sources, complex control techniques, and potential reliability issues. Here, a novel fifteen‐level inverter topology is proposed which addresses these limitations. The proposed multilevel inverters utilize a topology with reduced number of switches, which can effectively accommodate isolated DC sources. It consists of eight switches for level generation and four switches for polarity generation (H‐bridge). One of the key advantages of this topology is that it significantly reduces the Total Harmonic Distortion (THD) in accordance with the IEEE 519 standards. Genetic algorithm‐based selective harmonic elimination technique was employed for THD minimization. A detailed switching loss calculation and harmonic analysis were performed to support the effectiveness of the proposed topology and the control used. The implementation of the proposed topology is simple and straightforward. Furthermore, to validate the results, insulated gate bipolar transistor based hardware model was developed. The optimized firing pulses were generated using the dSPACE 1104 controller. The results were compared with the existing recent literature and was found to address the limitations of existing topology.

A high boost switched capacitor multilevel inverter with reduced components

ABSTRACT Switched capacitor multilevel inverters (SCMLIs) became a popular DC-to-AC converter due to their unique features like self-capacitor voltage balancing and self-output voltage boosting abilities over conventional multilevel inverters in recent years. However, recently developed SCMLIs suffer from higher component counts, lower voltage boosting factors, higher total standing voltage, and the requirement of isolated DC sources for generating high-quality output voltage level waveform. These drawbacks make the inverter costly, complex, and bulky. To address these drawbacks of SCMLIs, a novel SCMLI is proposed in this paper. The proposed SCMLI can realise 17 output voltage levels with a higher boosting factor. In addition, the proposed SCMLI uses lower switches, driver circuits, capacitors, and diodes than similar SCMLIs. The proposed SCMLI also offers a cheaper cost function per output voltage level per boosting factor compared to others. A thorough description of the proposed inverter’s operating principle, voltage stress analysis, and capacitor selection procedure have been discussed. The proposed inverter’s cascaded form has been constructed and analysed for various DC source configurations. An extensive simulation study of 17-level SCMLI in MATLAB/Simulink platform and an experimental investigation on a 17-level laboratory prototype validate the proposed SCMLI’s merits and effectiveness.

A New Multilevel Inverter Based Grid Connected Reliable Solar Power Transfer Unit With Power Quality Enhancement

This article proposes a multilevel inverter (MLI) based grid-connected solar power transfer unit (PTU). This work is a technological enhancement for the interconnection of photovoltaic (PV) array and distribution grid for mitigating the present energy crisis and power quality issues. The proposed MLI generates nine-level output voltage with a minimum device count and reduced losses. Hence, it provides a low harmonic AC waveform with higher efficiency when compared to the reported topologies. The MLI configuration consists of two isolated DC sources, realized by PV array management in a ratio of 3:1. Eight switches are used in the circuit, out of them, two are bidirectional to achieve the four-quadrant operation and thereby realize the control of reactive power flow. The least number of ON-OFF transitions in high power switches are ensured to minimize the switching losses. The single-stage PTU is controlled to extract the maximum power from PV arrays at varying irradiance levels. The shunt-connected PTU is controlled with an adaptive least mean square algorithm to enhance the grid power quality by meeting the nonlinear local load demands. Three modes of PTU operation are presented in this work according to the available PV power and load power information, and the grid power quality compliance with the IEEE-519 standard is verified in each mode. Battery-supported DC bus voltage regulation is adopted to overcome the reliability issue of the solar PV array power. The proposed system is designed and simulated in MATLAB/Simulink and tested at various operating conditions. Further, the real-time system behavior is tested and validated on a hardware model.

A Novel Three-Phase Switched-Capacitor Five-Level Multilevel Inverter with Reduced Components and Self-Balancing Ability

This paper proposes a step-up 3-Ф switched-capacitor multilevel inverter topology with minimal switch count and voltage stresses. The proposed topology is designed to provide five distinct output voltage levels from a single isolated dc source, making it suitable for medium and low-voltage applications. Each leg of the proposed topology contains four switches, one power diode, and a capacitor. The switching signals are also generated using a staircase universal modulation method. As a result, the proposed topology will operate at both low and high switching frequencies. To highlight the proposed topology’s advantages, a comparison of three-phase topologies wasperformed in terms of the switching components, voltage stress, component count per level factor, and cost function withthe recent literature. The topology achieved an efficiency of about 96.7% with dynamic loading, and 75% of the switches experienced half of the peak output voltage (VDC), whereas the remaining switches experienced peak output voltage (2VDC) as voltage stress. The MATLAB/Simulink environment was used to simulate the proposed topology, and a laboratory prototype was also built to verify the inverter’s theoretical justifications and real-time performance.

An Asymmetrical 19-Level Inverter with a Reduced Number of Switches and Capacitors

Multilevel inverters are able to provide loads with voltages of high power quality using several DC sources, capacitors, switches, and diodes in their structures. However, the usage of the higher number of semiconductor devices (switches and diodes) and capacitors causes an increase in losses and costs and decreases their efficiency. Thus, lowering the number of switches and capacitors is a challenging issue in designing a multilevel inverter. In this paper, an asymmetrical multilevel inverter is proposed that produces 19-level output voltages. The circuit is composed of nine switches, six diodes, two capacitors, and two isolated DC sources. In comparison with other topologies, the most important advantage of the introduced 19-level topology is the usage of a lower number of switches and capacitors, which leads to a decrease in the number of gate drivers and the total volume of the system. During the charging process, capacitors never connect to each other in series, i.e., they are self-balancing and do not require the extra circuits. The proposed topology offers a total harmonic distortion (THD) of 7.4% in the output voltage, which is less than 8%, complying with the IEEE standards. The performance of the topology is validated under various load conditioning through an experimental setup in the laboratory.

SHM‐PWM technique in a cascaded H‐bridge multilevel inverter with adjustable DC‐link for wide voltage range applications

SummaryIn this paper, a new method for achieving high‐quality voltage in multilevel inverters is presented. The method is based on the selective harmonic mitigation pulse width modulation (SHM‐PWM) technique applied on a cascaded H‐bridge multilevel inverter (CHBMLI), which employs a variable DC‐link voltage to reduce the amount of the total harmonic distortion (THD) in the output waveform. The variable DC sources in a CHBMLI can increase the modulation index to an acceptable range in the low output voltage values and also increase the number of harmonics to be eliminated in the SHM technique due to increasing the number of voltage levels. In the proposed method, the optimal switching angles are calculated by the particle swarm optimization (PSO) algorithm and the switching angles are stored in lookup tables (LUTs). Implementing the proposed method allows the CHB inverter to improve the performance in producing a high‐quality voltage compared with conventional methods. As an applicable example, a single‐phase CHBMLI, fed by two isolated DC sources, is examined in this paper. The analysis presented in this paper shows a significant improvement in the quality of the output voltage, especially for low output voltage conditions. The simulation and experimental results are presented to confirm the proposed approach.

Editorial: Emerging boost converter topologies for renewable energy applications

The role of the power electronic converter is very crucial for the effective utilization of renewable energy resources. Power electronic converters are used as an interface between the renewable energy source to the utilization which can be industrial loads, utility grids and domestic loads. The main converters used with the renewable energy resources are the DC/DC converter and DC/AC converter. As the voltage magnitude of most of the renewable energy resources is low, a boost stage is required between the source and the load. Therefore, a new category of high gain DC/DC converters and DC/AC converters are required with higher reliability and efficiency.The multilevel inverter (MLI) topology is a matured power converter and it is more suitable for medium and high voltage applications with renewable energy. Most of the multilevel inverters are employing isolated DC sources, which limits their applications. By replacing the DC source with capacitors, a significant reduction in the cost and size of the converters can be achieved. This The papers published in this special issue show the progress in the field of the power converter, and their control for various applications. Most of the concepts proposed in the articles have been validated experimentally. Still, there is a lot of scope for further improvement in the field of power converter and their control.

An MPPT-based 31-Level ADC Controlled Micro-Inverter

This paper presents a 31-level micro-inverter with an innovative control scheme. The presented micro-inverter makes use of a single PV panel connected to an MPPT converter. Four half-bridge legs are connected in series to produce 31 levels at the inverter's output. At the output side of the micro-inverter, a single full-bridge power circuit is used to generate positive and negative half-cycles. A high-frequency transformer and a push-pull converter are used to generate the required isolated DC sources. The output of an Analog to Digital Converter (ADC) is used as a gate pulse for the half-bridge circuit power switching devices. PSIM software was used to simulate the proposed micro-inverter, and the results are discussed. Hardware prototypes were also created and the results are displayed.

Floating-capacitor based inverter for open-ended winding induction motor drive with fault-tolerance

ABSTRACT Floating-capacitor-based nine-level inverter topology for open-ended winding induction motor (OWIM) drive is presented in this paper. The proposed multilevel inverter topology (PMLIT) essentially consists of four three-phase two-level voltage source inverters (VSI), three isolated DC sources and a floating-capacitor (FC). Out of four inverters, three inverters are fed from DC sources, and the fourth inverter is connected with the FC. The advantage of the PMLIT is that the maximum output voltage will be twice the source voltage with nine levels across each phase winding. The PMLIT employs least number of components which makes the inverter cost-effective and has lowered control complexity. The PMLIT can deliver seven, five or three-level output voltage with a decrease in modulation index. Conventional sinusoidal pulse-width modulation (PWM) techniques can be employed to generate switch-gate pulses. The intermediate-voltage levels are realised by proper charging and discharging of the FC. The performance of the PMLIT under possible switch faults is investigated, and modified switching logics are proposed to deliver a balanced supply for the OWIM drive in post-fault operation. Simulations are performed in the MATLAB/Simulink environment, and an experimental setup is designed to validate the simulations, and the results are presented.

A nearest level control technique for an asymmetric source configuration of multi-level inverter topology

In this paper, an asymmetric source configuration of Multilevel Inverter (MLI) topology has been proposed. It consists of eight unidirectional switches, two bidirectional switches and four isolated DC sources. By considering 1:5 and 1:4 source configurations, the inverter produces 25-level and 21-level outputs respectively with the same switching action. For producing negative voltage levels, there is no requirement of separate backend H-bridge and inherently produces both positive and negative voltage levels. The main advantage of this topology is that in every state, only four switches are in ON mode and else are in OFF state. It also gives less per unit Total Standing Voltage (TSV) and thereby cost requirement of semiconductor devices can become decreases. For generating gate pulses, the simple Nearest Level Control (NLC) has been used by considering the round function. This technique is basically a fundamental switching frequency technique thereby switching losses are greatly reduces as compared with high switching frequency Pulse Width Modulation (PWM) techniques and it is particularly suitable for large number of levels. With this control technique, there is no inrush current has been developed at the input of DC sources. Finally, with step change in Modulation Index (MI) values the proposed topology with two different source configurations have been validated through MATLAB/Simulink platform.

A comprehensive review of fault diagnosis and fault-tolerant control techniques for modular multi-level converters.

Many faults occur in the modular multi-level converters (MMCs), including unbalancing capacitor voltage, lower and upper arm unbalancing, the line to line voltage unbalancing, sensors and actuators fault, system fault, and sub-modules fault in high as well as medium voltage applications. Several fault-tolerant approaches are presented to overcome these problems, such as active fault-tolerant control system (AFTCS), passive fault-tolerant control system (PFTCS), hybrid fault-tolerant control system (HFTCS), redundant system technique, special power circuit with the controller, and zero sequence voltage methods, which we will explain extensively in this article. This review emphasizes the types of faults in the MMCs and discusses the protection methods under failure conditions. The MMC is more popular in high voltage applications because it not only improves the quality of the grid but also has good harmonic performance in high power transmission. There is no need for any isolated dc sources to operate it. When faults are removed, the efficiency and reliability of the system will be increased. This extensive explanation of the current literature on MMC fault diagnosis and control techniques will conclude which methods provide a more valuable solution. Finally, this paper discusses the best approach to reduce MMC faults and provides a future research direction to the readers.

A Simple SVM Technique on Three-Phase MPUC7 Inverter for Solar Photovoltaic System

In This paper, a simple single-dimension Space Vector Modulation (SVM) technique is introduced to implement on three-phase thirteen-level Modified Packed U-Cell (MPUC) inverter for photovoltaic system in which many DC sources are available. The three-phase thirteen-level converter consists of three single-phase seven-level MPUCs that each phase has six switches and two isolated DC sources. One major advantage of proposed method is to produce an output voltage with nearly constant amplitude in desired range in case of input DC voltage fluctuations, which is common in renewable sources like Photovoltaic Systems (PV). On the other hand, the conventional Pulse Width Modulation (PWM) strategies do not have such capability. Thus, the converter behavior is investigated for the proposed control method and Level Shift PWM (LS-PWM) and it is shown that the LS-PWM method does not function properly when the DC voltage varies. In order to produce an output voltage with seven equal levels, which results in reduction of the switching losses and Total Harmonic Distortion (THD), it is necessary to trigger switches in proper way. Consequently, two switching patterns are introduced and the significant decrease in power loss due to the second switching pattern is shown. Furthermore, it is investigated that in three-phase mode, the 3rd order line-voltage harmonics are eliminated well and the voltage and current THD are further improved by the proposed method. To validate the proposed SVM technique, MATLAB Simulink simulation results are presented and a comparative analysis is done between the proposed method and LS-PWM.

A novel self-boosting 5-level inverter for grid-connected photovoltaic system

Renewable energy systems are presently recognized as the primary alternative power source due to increased electricity demand and the depletion of fossil resources. The photovoltaic (PV) system is a rapidly growing renewable energy system. Inverters are used to integrate PV systems to the utility grid. Multilevel inverters are the most popular option for PV application due to reduced total harmonic distortion (THD), switching stress, and electromagnetic interference. This work presents a 5-Level grid-connected inverter while minimizing the cost. The proposed inverter uses six unidirectional switches and one diode with a single switched capacitor. Furthermore, it removes the requirement of multiple isolated DC sources. A simple modulation technique generates a suitable switching pulse for the inverter. Additionally, the comparison of the proposed inverter with the other topologies existing in the literature shows that it has reduced power devices, total standing voltage (TSV), and cost function. The PV connected grid system is investigated with specified controlling and implemented in MATLAB/Simulink and validated through hardware-in-the-loop (HIL) real-time simulation in OPAL-RT. In addition, the laboratory setup of the proposed structure is built and tested to verify its effectiveness.

Predictive Control With Battery Power Sharing Scheme for Dual Open-End-Winding Induction Motor Based Four-Wheel Drive Electric Vehicle

For high-power electric vehicles (EVs), the drive propulsion based on induction motors is emerging as economical alternative. Compared to conventional induction motors, the open-end winding induction motor (OEWIM) requires only half the dc-bus voltage for the given torque. The EV power train based on the dual two-level voltage-source inverter (VSI)-fed OEWIM with isolated dc sources is used in this research. For uniform state-of-charge (SoC) distribution, the power flow from each isolated source needs to be controlled. A two-stage model-predictive direct torque control (MPDTC) scheme is proposed to balance the SoC of batteries by proper selection of the VSI voltage vectors. The proposed MPDTC scheme is free from weighting factor tuning and uses a ranking method to predict the optimal voltage vectors. The superiority of the proposed controller in terms of battery SoC balancing is demonstrated. The performance of the proposed MPDTC EV drive is verified for the FTP75 and HFET driving cycles under different operating conditions, both by simulation and hardware experimental tests.