Abstract
In this work, five-level inverter topology that can tolerate faults on switches is proposed. The fault on switches is classified based on the two main legs of the proposed inverter. The proposed topology is also beneficial as it reduces the number of switches and isolated DC sources as compared with CHB. The proposed topology also has an additional advantage of self-voltage balancing of its capacitor voltage even under post fault conditions.
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More From: International Journal of Scientific Research in Computer Science, Engineering and Information Technology
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