The effects of diminishing MOS inversion channel length or width on device characteristics are discussed. As opposed to the geometric device size, an “electric device size” is established by normalizing all dimensions on an appropriately chosen depletion layer width. It is shown how this “electric size” governs the intensity of geometry effects. DC device modeling methods are reviewed with respect to their ease of application to electrically small devices. Finally, means for reduction of geometry effects are considered.
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