Inverse Butterfly Research Articles

Assisted Self-Assembly to Target Heterometallic Mn-Nd and Mn-Sm SMMs: Synthesis and Magnetic Characterisation of [Mn7 Ln3 (O)4 (OH)4 (mdea)3 (piv)9 (NO3 )3 ] (Ln=Nd, Sm, Eu, Gd)*.

In an assisted self‐assembly approach starting from the [Mn6O2(piv)10(4‐Me‐py)2(pivH)2] cluster a family of Mn−Ln compounds (Ln=Pr−Yb) was synthesised. The reaction of [Mn6O2(piv)10(4‐Me‐py)2(pivH)2] (1) with N‐methyldiethanolamine (mdeaH2) and Ln(NO3)3 ⋅ 6H2O in MeCN generally yields two main structure types: for Ln=Tb−Yb a previously reported Mn5Ln4 motif is obtained, whereas for Ln=Pr−Eu a series of Mn7Ln3 clusters is obtained. Within this series the GdIII analogue represents a special case because it shows both structural types as well as a third Mn2Ln2 inverse butterfly motif. Variation in reaction conditions allows access to different structure types across the whole series. This prompts further studies into the reaction mechanism of this cluster assisted self‐assembly approach. For the Mn7Ln3 analogues reported here variable‐temperature magnetic susceptibility measurements suggest that antiferromagnetic interactions between the spin carriers are dominant. Compounds incorporating Ln=NdIII(2), SmIII(3) and GdIII (5) display SMM behaviour. The slow relaxation of the magnetisation for these compounds was confirmed by ac measurements above 1.8 K.

Research and Design of a Novel Reconfigurable Cyclic Shift Unit

In this paper, a high speed reconfigurable control bits generation algorithm for cyclic shift operations is proposed. The algorithm utilizes the characteristics of routing information when Inverse Butterfly multi level network supports cyclic shift. Moreover, it also integrates a kind of cyclic shift operations together, including cyclic shift and sub-word cyclic shift based on a bit width of 2i(i = 1, 2, …). Based on this, the shifter is implemented, and the logic synthesis is realized in the SMIC 65nm process. The results show that when the proposed unit only supports cyclic shift operations, enhances the frequency by 3.6% ∼ 8.6% and reduces the area by1.4% ∼ 32%, compared with previously proposed solutions. When achieving a variety of cyclic shift operations, the frequency of our unit enhances the frequency by 5% and reduces the area by 6%.

A highly efficient reconfigurable rotation unit based on an inverse butterfly network

We propose a reconfigurable control-bit generation algorithm for rotation and sub-word rotation operations. The algorithm uses a self-routing characteristic to configure an inverse butterfly network. In addition to being highly parallelized and inexpensive, the algorithm integrates the rotation-shift, bi-directional rotation-shift, and sub-word rotation-shift operations. To our best knowledge, this is the first scheme to accommodate a variety of rotation operations into the same architecture. We have developed the highly efficient reconfigurable rotation unit (HERRU) and synthesized it into the Semiconductor Manufacturing International Corporation (SMIC)’s 65-nm process. The results show that the overall efficiency (relative area×relative latency) of our HERRU is higher by at least 23% than that of other designs with similar functions. When executing the bi-directional rotation operations alone, HERRU occupies a significantly smaller area with a lower latency than previously proposed designs.

Structure and magnetic exchange in heterometallic 3d–3d transition metal triethanolamine clusters

Synthetic methods are described that have resulted in the formation of seven heterometallic complexes, all of which contain partially deprotonated forms of the ligand triethanolamine (teaH(3)). These compounds are [Mn(III)(4)Co(III)(2)Co(II)(2)O(2)(teaH(2))(2)(teaH)(0.82)(dea)(3.18)(O(2)CMe)(2)(OMe)(2)](BF(4))(2)(O(2)CMe)(2)·3.18MeOH·H(2)O (1), [Mn(II)(2)Mn(III)(2)Co(III)(2)(teaH)(4)(OMe)(2)(acac)(4)](NO(3))(2)·2MeOH (2), [Mn(III)(2)Ni(II)(4)(teaH)(4)(O(2)CMe)(6)]·2MeCN (3), [Mn(III)(2)Co(II)(2)(teaH)(2)(sal)(2)(acac)(2)(MeOH)(2)]·2MeOH (4), [Mn(II)(2)Fe(III)(2)(teaH)(2)(paa)(4)](NO(3))(2)·2MeOH·CH(2)Cl(2) (5), [Mn(II)Mn(III)(2)Co(III)(2)O(teaH)(2)(dea)(Iso)(OMe)(F)(2)(Phen)(2)](BF(4))(NO(3))·3MeOH (6) and [Mn(II)(2)Mn(III)Co(III)(2)(OH)(teaH)(3)(teaH(2))(acac)(3)](NO(3))(2)·3CH(2)Cl(2) (7). All of the compounds contain manganese, combined with 3d transition metal ions such as Fe, Co and Ni. The crystal structures are described and examples of 'rods', tetranuclear 'butterfly' and 'triangular' Mn(3) cluster motifs, flanked in some cases by diamagnetic cobalt(III) centres, are presented. Detailed DC and AC magnetic susceptibility and magnetization studies, combined with spin Hamiltonian analysis, have yielded J values and identified the spin ground states. In most cases, the energies of the low-lying excited states have also been obtained. The features of note include the 'inverse butterfly' spin arrangement in 2, 4 and 5. A S = 5/2 ground state occurs, for the first time, in the Mn(III)(2)Mn(II) triangular moiety within 6, the many other reported [Mn(3)O](6+) examples having S = ½ or 3/2 ground states. Compound 7 provides the first example of a Mn(II)(2)Mn(III) triangle, here within a pentanuclear Mn(3)Co(2) cluster.

Reconfigurable Design and Implementation of Data Extraction and Permutation Facing Stream Cipher Algorithm

For design of a class of stream cipher algorithm reconfigurable coprocessor, it is necessary to realize efficient and flexible distribution between the initial chaos source generator and nonlinear transformation unit. From the analysis, it can be seen that the data distribution should have any data extraction and repeatable permutation characteristics. In this paper, design of data distribution network’s main circuit based on Inverse Butterfly network and Crossbar network is presented. And an algorithm of control information generation is given. By analysis and comparison with other realization ways, this design can save 16% hardware resources.

A New Basis for Shifters in General-Purpose Processors for Existing and Advanced Bit Manipulations

This paper describes a new basis for the implementation of the shifter functional unit in microprocessors that can implement new advanced bit manipulations as well as standard shifter operations. Our design is based on the inverse butterfly and butterfly data path circuits, rather than the barrel shifter or log-shifter designs currently used. We show how this new shifter can implement the standard shift and rotate operations, as well as more advanced extract, deposit, and mix operations found in some processors. Furthermore, it can perform important new classes of even more advanced bit manipulation instructions like arbitrary bit permutations, bit gather (or parallel extract), and bit scatter (or parallel deposit) instructions. Thus, our new functional unit performs the functionality of three functional units-the basic shifter, the multimedia-mix unit, and the advanced bit manipulation functional unit, while having a latency only slightly longer than that of the log-shifter. For performing only the existing functions of a shifter, it has significantly smaller area.

Fast Bit Gather, Bit Scatter and Bit Permutation Instructions for Commodity Microprocessors

Advanced bit manipulation operations are not efficiently supported by commodity word-oriented microprocessors. Programming tricks are typically devised to shorten the long sequence of instructions needed to emulate these complicated bit operations. As these bit manipulation operations are relevant to applications that are becoming increasingly important, we propose direct support for them in microprocessors. In particular, we propose fast bit gather (or parallel extract), bit scatter (or parallel deposit) and bit permutation instructions (including group, butterfly and inverse butterfly). We show that all these instructions can be implemented efficiently using both the fast butterfly and inverse butterfly network datapaths. Specifically, we show that parallel deposit can be mapped onto a butterfly circuit and parallel extract can be mapped onto an inverse butterfly circuit. We define static, dynamic and loop invariant versions of the instructions, with static versions utilizing a much simpler functional unit. We show how a hardware decoder can be implemented for the dynamic and loop-invariant versions to generate, dynamically, the control signals for the butterfly and inverse butterfly datapaths. The simplest functional unit we propose is smaller and faster than an ALU. We also show that these instructions yield significant speedups over a basic RISC architecture for a variety of different application kernels taken from applications domains including bioinformatics, steganography, coding, compression and random number generation.

Properties and experimental results of fastest linearly independent ternary arithmetic transforms

Two categories of fastest linearly independent ternary arithmetic transforms, which possesses forward and inverse butterfly diagrams with the lowest computational complexity have been identified and their various properties have been presented in this paper. This family is recursively defined and has consistent formulas relating forward and inverse transform matrices. Computational costs of the calculation for new transforms are also discussed. Some experimental results for standard ternary benchmark functions and comparison with multi-polarity ternary arithmetic transform are also presented.

Fastest linearly independent transforms over GF(2) and their properties

New classes of linearly independent (LI) transforms that possess fast forward and inverse butterfly diagrams and their corresponding polynomial expansions over Galois Field (2) [GF(2)] are introduced in this paper. The transforms have the smallest computational complexity among all known LI transforms and therefore can be calculated in shorter time when the computation is done by software. Alternatively, the transforms can also be calculated easily and efficiently using hardware. Here, the recursive definitions and fast transform calculations of four basic fastest LI transforms are first given. The definitions are then extended to generate a larger family of LI transforms with the same computational cost through reordering and permutation. Various properties of the transforms and relations between them are presented followed by their hardware implementations as well as experimental results for some binary benchmark functions.

Family of Fast Linearly Independent Ternary Arithmetic Transforms

In this paper, the family of fast linearly independent ternary arithmetic (LITA) transforms, which possesses fast forward and inverse butterfly diagrams, has been identified. This family is recursively defined and has consistent formulas relating forward and inverse transform matrices. The LITA transforms, which require horizontal or vertical permutations to have fast transforms are also discussed. Computational costs of the calculation for presented transforms are also discussed and compared with multipolarity ternary arithmetic transform for ternary benchmark functions.

Classification and properties of fast linearly independent logic transformations

The existence of numerous number of linearly independent (L1) transformations in GF(2) algebra finds application in the design of exclusive-or based polynomial expansions. For a chosen L1 matrix transformation, such expansion gives a canonical representation of an arbitrary completely specified logical function. In this paper, family of L1 transformations is introduced which possesses fast forward and inverse butterfly diagrams. These transforms are recursively defined and grouped into classes where consistent formulas relating forward and inverse transform matrices are obtained. The classification is further extended into various L1 transforms with horizontal and vertical permutations. The possibility of easy implementation of polynomial expansions based on classified L1 logic transformations in the form of readily available fine grain FPGAs and EPLDs is also illustrated.