Internal Voltage Research Articles

Voltage Reference Realignment Cell Balance to Solve Overvoltage Caused by Gradual Damage of Series-Connected Batteries

This paper analyzes the cause of electric vehicle battery fires. The fundamental cause is attributed to a low cell balance current, and it is proven that the variation in the battery’s internal voltage due to temperature change is the decisive reason for battery fires. In this paper, the authors studied a method of solving the problem by changing only the software of the existing Battery Management System (BMS) without changing the hardware. Batteries cannot be made with 100% capacity, resulting in voltage division. Cell balancing is performed to prevent such phenomena, but a low cell balance current prevents the proper operation of cell balancing. As a result, relatively small batteries, due to progressive degradation, have continuous voltage rise toward overvoltage. Subsequently, an additional voltage rise occurs as the chemical activity of the battery increases due to temperature rise. In this paper, a new cell balancing method is proposed to limit the aging process of cells with a relatively small capacity and peak voltage. In addition, it was validated through simulation using MATLAB R2019a.

An lpGBT subsystem for environmental monitoring of experiments

In this paper, the Low Power Giga Bit Transceiver (lpGBT) built-in system for environmental monitoring of the LHC experiments is presented. Eight external analogue inputs and eight internal voltages are multiplexed into an instrumentation amplifier with selectable gain, whose output is digitised by a 10-bit SAR ADC. A programmable current source can be enabled for each external input to implement resistance measurements. Internal channels are used to monitor power supplies and the output of the temperature sensor. The environmental monitoring system includes a precise 1 V reference voltage source and a 10-bit voltage DAC. All blocks were designed and fabricated in 65 nm CMOS technology, fully characterised, and the pre- and post-irradiation measurement results are presented in this work.

Non-Linear Analytical Model for the Study of Double-Layer Supercapacitors in Different Industrial Uses

It is generally considered that the representation of a double layer supercapacitor (DLSC) cannot be performed with the usual capacitance and resistance series connected, as it induces a relatively high level of inaccuracy in the results. In multiple previous studies, more advanced models have been developed with very different approaches: models with distributed parameter circuits, based on artificial neural networks (ANNs), fractional order, etc. A non-linear model, less complex than the previous ones and whose behavior adequately represents the DLSCs, is the one formed by a variable capacitance, dependent on its internal voltage. This paper presents a mathematical study to obtain analytical expressions of all the electrical variables of DLSCs, voltage, current, dissipated power and so on, by means of a previous model. This study is carried out considering that the DLSC is charged and discharged through a voltage source and also discharged through a resistor. In later sections, the operational conditions of the DLSC in numerous industrial applications are presented. Finally, a comparative analysis is made between the results produced by the conventional model, with constant capacitance, and the developed model. This analysis is finally followed by the conclusions.

A digital twin based reliability assessment of Superbuck converters

Addressing the challenge of assessing the reliability of ‘long-life, high-reliability’ DC/DC analog converters in submarine observation networks and space power systems, which have limited internal observation points and insufficient valid information, and initial assessment rendered unreliable with the long-term operation of the converter. This paper proposes a novel method based on digital twin (DT) technology. The method eliminates the need for measuring internal variables, and only requires the measurement of the converter’s ripple peak-to-peak. A digital twin (DT) is constructed based on the underlying mechanism, and the parameters of the operating converter are identified through the collection of ripple peak-to-peak, which are then injected into the DT for dynamic tracking of the physical entity. By obtaining internal current and voltage of the DT and utilizing the Markov model, the reliability of the converter can be assessed. This method offers real-time reliability assessment without the need for additional measurement points. To validate the effectiveness of the proposed approach, a Superbuck converter is used as an example to demonstrate the high-fidelity of the DT through isomorphic single-sample repeatability and isomorphic multiple-sample consistency experiments.

SRAM-Based PUF Readouts

Large-scale parameter characterization of Physical Unclonable Functions (PUFs) is of paramount importance in order to assess the quality and thus the suitability of such PUFs which would then be developed as an industrial-grade solution for hardware root of trust. Carrying out a proper characterization requires a large number of devices that need to be repeatedly sampled at various conditions. These prerequisites make PUF characterization process a very time-consuming and expensive task. Our work presents a dataset for the study of SRAM-based PUFs on microcontrollers; it includes full SRAM readouts along with internal voltage and temperature sensors of 84 microcontrollers of STM32 type. Data has been gathered with a custom-made and open platform designed for the automatic acquisition of SRAM readouts of such devices. This platform also provides possibilities of experimenting aging and reliability properties.

A novel control approach to improve the stability of hybrid AC/DC microgrids

Overall, voltage and frequency(V/F) stability are essential in microgrids (MGs) to ensure reliable and high-quality power supply for critical loads and to support the integration of renewable energy sources (RESs) while maintaining the stability of the power system. Therefore, V/F stability is particularly important for causes such as load balancing, quality of power supply, renewable energy integration, and grid stability. This study aims to introduce an interactive control system for hybrid MGs (HMGs) based on distributed energy resources (DERs). Here, the defined control strategy objective is to ensure the four system parameters’ stability, including voltage/frequency (V/F) and active/reactive (P/Q) power for the units. In this study, the research innovation consists of two layers. The first layer aims to adjust the unit V/F, using an internal voltage and current controller loop combined in the power droop controller (PDC). The second layer is concerned with the steady-state error minimization, created in the first layer due to the droop controller performance. Therefore, the secondary distributed V/F control strategies are designed based on finite-time consensus theory (FTCT) owing to its resistance and stability against various load perturbations and system disturbances, which makes flexible convergence time possible according to different user preferences and operating conditions. The simulation results prove the efficiency of the proposed method strategy. Furthermore, the values of improving the amplitude of oscillations and fluctuations for V/F components vary from 0.02pu-0.2pu and 0.178pu-0.216pu, respectively.

Design of a bipolar Dickson voltage multiplier suitable for low output voltage conditions to provide efficient food processing

There has been a growing demand for soft and nutritious foods in recent years. However, general food processing applies heat to food, which destroys nutrients in it. For this reason, many researchers have devised several non-thermal food processing methods so far. However, these methods have potential for improvement in terms of manufacturing cost and processing time. Thereby, we proposed the Dickson voltage multiplier which has bipolar topology suitable for low output voltage conditions in order to provide efficient food processing with low cost. The system is equipped with a high-speed driver using IGBTs, which allows the high-voltage multiplier to operate at high speed. In addition, by using Dickson multiplier with a bipolar topology, the voltage stress on each circuit component is reduced. Furthermore, we performed theoretical analysis to calculate the internal resistance and voltage gain of proposed multiplier. Moreover, we confirmed experimentally the possibility of the proposed multiplier by using the prototype.

Cascade Control of Non-Ideal Boost Power Converter

This article presents the analysis and design of a cascade controller for regulation of output voltage in a non-ideal boost power converter. Non-ideal boost power converter is a well-known nonlinear non-minimum phase system. Hence it is chosen to show the ability of the proposed control technique. The proposed technique involves sliding mode current loop and internal model-based voltage loop. Cascade controller based non-ideal boost power converter exhibits fast dynamic response, excellent tracking, and rejection of disturbances even though input voltage, load and parameters of the converter are uncertain. Validation on an experimental prototype followed by detailed analysis of results is presented.

Enhanced electroseismic coupling at charged interfaces

Published field-scale studies of electroseismic (ES) surveying have detected harmonics of the source frequency in the recorded seismic signal. At the time the data were collected, the cause of these high frequencies was unknown. We have found that electric fields applied to lithologic interfaces create harmonics of the source frequency. At these interfaces, there are gradients in ionic concentrations in pore fluids and in situ electric fields associated with gradients in the electrochemical (EC) potential. When an electric field is applied to the junction in the direction of the internal field, the internal voltage gradient decreases and the resistivity decreases. When the applied field opposes the internal field, the internal field increases and the resistivity is high. Harmonics of the applied AC field occur when the amplitude of the applied electric field is comparable to the internal field. We use the sandstone/limestone interface as an illustrative example. An analytical model of rock interfaces predicts the wavelet response to an applied field. The theoretically predicted signal characteristics agree with the laboratory data. The model predicts that the distortion of the electric field induces strains on the rock matrix that are qualitatively similar to field measurements of the ES conversion. The estimated response from an EC junction is substantially larger than the electrokinetic conversion associated with the displacement of the pore-surface dipole layers.

Analysis and Mitigation of Negative Differential Resistance effects in Double-Gate Silicon-on-Insulator Negative Capacitance Field Effect Transistor with improved analog performance

Negative Capacitance Field Effect Transistors (NCFETs) offer the possibility of enhancing channel length scalability, with a key challenge being to ensure hysteresis and Negative Differential Resistance (NDR) free behavior. In this context, through TCAD-based simulations, for a symmetric Double-gate Silicon-on-Insulator (DG-SOI) baseline architecture with a Metal–Ferroelectric–Insulator–Semiconductor (MFIS) configuration, we first examine the root cause of NDR as being the FE layer with a small number of strongly coupled domains, which allows the drain to lower the surface potential (ΨSs) and internal gate voltage (Vint) on the source side. With this understanding of NDR, the inclusion of a paraelectric (PE) layer on the drain side of the gate stack, by splitting the stack into two halves laterally, while keeping the thickness of the stack unchanged, minimizes the drain’s influence on the source-sided electrostatics. This results in the mitigation of NDR effects along with superior analog performance parameters, thus making these FE–PE gate stack-based NCFET devices suitable for analog circuit applications.

16-Cell stackable battery monitoring and management integrated circuit for electric vehicles

High-precision multi-channel battery monitoring integrated circuits (BMICs) assist battery management systems (BMSs) in effectively managing battery data, which is the key to improving the reliability of electric vehicles (EVs). This paper proposes a 16-cell stackable BMIC, in which a complete high-voltage multiplexing scheme and an incremental sigma-delta analog-to-digital converter (ADC) for monitoring. The chip performs two different data conversions in one monitoring instance, and the measurement error of the 16 channels is controlled within ±4 mV during calibration. The power management unit in the chip provides a stable internal module power supply voltage at an input voltage of 80 V, and the quiescent current is lower than 16 μA. As more cells must be stacked in the EV, the chip also supports chip-to-chip connections through current-mode communication to expand the number of stackable batteries. The chip was implemented based on a 0.18 μm BCD process, and the area of the proposed BMIC was 3 × 3 mm2.

Numerical Simulation of Electrode Structure on High Voltage Pulse Discharge Characteristics

For the study of the different electrode structures of the high voltage pulse discharge breakdown process of the insulating medium, the numerical simulation software is compiled to establish two kinds of the electrode structure of high voltage pulse discharge three-dimensional model, finite element difference method to simulate the expansion of plasma channel, the discharge characteristics of electrode structure internal voltage, and current of plasma channel and the impact of energy consumption. The simulation results show that, compared with the needle-needle electrode structure, the needle-plate electrode structure has a shorter time to reach the critical field strength of distilled water smaller breakdown voltage, shorter time to establish the discharge channel, smaller equivalent resistance, faster extension speed of the discharge channel, and less energy consumption for breakdown. And other conditions are the same. The results of this study can provide a theoretical reference for the structural design of high-voltage pulse-crushing electrodes.

Electrolyte potentials and impedance measurement of polymer electrolyte membrane CO2 reduction electrolyzer

In electrochemical CO2 reduction reactors, polymer electrolyte membrane (PEM) reactors, also known as zero-gap cells, have great potential for achieving significant CO2 reduction. Because these cells have a thin reactor core with a thickness of several hundred micrometers, it is difficult to determine their internal voltage distribution. To determine the anode voltage, ohmic loss in the membrane, and cathode voltage in the PEM reactors, we set three reference electrodes in the reactor and investigated the voltage values obtained from each reference electrode. We demonstrated that the reference electrode in contact with the anion exchange membrane extending to the outside of the cell provides the most reliable voltage. The voltage measured by this reference, combined with the resistance of the exchange membrane obtained through electrochemical impedance spectroscopy, provides a breakdown of the voltage inside the cell.

An Improved Setting-Free Scheme for Fast and Reliable Detection of Complete and Partial Loss-of-Excitation

In this article, an improved setting-free loss-of-excitation (LOE) protection is developed for fast and reliable classification of various events. In the proposed scheme, the internal voltage and reactive power of the synchronous generator (SG) have been exploited to fulfill the condition of not needing the threshold amount because they are directly dependent on the rotor field and continuously reduced during the LOE, leading to having a negative polarity of variation. However, due to slow dynamic variation during the LOE condition, they are multiplied to accelerate and highlight the reduction changes, giving rise to increasing the detection speed. Meanwhile, owing to the considerable difference between the value of internal voltage and reactive power and to highlight the effect of multiplication function, an adaptive gain on the basis of steady-state parameters of SG is suggested. Furthermore, given that the negative polarity of the multiplied parameters can be affected during the hybrid events, the limited integral function is implemented to eliminate the happened swings, resulting in keeping the negative polarity and thus clustering the hybrid events reliably. The performed simulations on the IEEE 9-bus and 39-bus test systems prove that the provided setting-free protection can detect all types of the events reliably and quickly than other schemes.

Impact of temperature on a ferroelectric interfaced negative capacitance double gate junctionless accumulation mode field effect transistor-compact model

Ferroelectric interfaced negative capacitance field effect transistors are gaining popularity for low power applications; however, as temperature is a constant influencing factor, further study is required to comprehend how these devices are influenced. Through a proposed compact model, this paper analytically investigates the influence of temperature on a ferroelectric interfaced negative capacitance double gate junctionless accumulation mode field effect transistor. This device integrates the benefits of negative capacitance with the junctionless accumulation mode structure. An extensive comparison of the proposed device is made with the existing structure to evaluate the benefits offered by the ferroelectric layer at different temperatures. The Landau–Khalatnikov equation and Pao–Sah integral are employed to obtain the surface potential and drain current model with temperature variation. Various key parameters of the device have been analysed extensively by varying the temperature from 200 to 500 K. It has been found that internal voltage amplification declines as temperature rises, but the sub-threshold swing increases from 46 to 72 mV decade −1 with an increase in temperature. Additionally, with a progressive rise in temperature, the loss of gain and degradation of gate capacitance are observed.

Learning how charybdotoxin dissociates from a voltage gated K-channel.

Physical interactions between proteins are at the center of most living events. An extremely simplistic view of protein-protein interactions, the lock-and-key mechanism, consists of the association of the two complementary surfaces and their dissociation, determined by the superficial affinity. While experimental and computational chemists have given us some understanding of the protein-protein association, we lack molecular details of the events leading to the dissociation of the complex. As an excellent example of the lock-key binding mechanism, CTX is a scorpion toxin that binds to the external pore entrance of voltage-gated Shaker K-channels (KvC) with extreme simplicity. CTX binding prevents ion flow without significant conformational impact on either protein. Interestingly, the toxin's dissociation rate is sensitive to the ionic composition of the external solution, revealing the existence of dislocated binding states (wobbling). In tandem with MD simulations, we have investigated the effects of K+ ions, the electric field, and temperature on the CTX binding equilibrium with the aim of understanding the events leading to the CTX dissociation from Shaker-K427E. The K-channels were expressed heterologously in Xenopus oocytes and recorded with the two-electrode-voltage-clamp technique under continuous perfusion. The dissociation rate showed more temperature, voltage, and potassium sensitivity, suggesting that K+ ion access to the pore in the toxin-blocked channel is very sensitive to random thermal motions. Positive internal voltages promote CTX-wobbling and partial toxin dislodging and, possibly, equilibrating the K+ ions of the selectivity filter with the external solution. This observation is compatible with the external K+ sensitivity observed in oocytes. Thus, as proposed 35 years ago, the electric field can force potassium ions within the pore in the direction of the external entry, electrostatically destabilizing CTX. Funded by Fondecyt 1211366

Modeling and Stability Analysis Based on Internal Voltage Dynamics in Synchronverter

With the large-scale centralized penetration of renewable energy represented by wind turbine and photovoltaic power generation, the equivalent inertia and synchronous torque of traditional power grids have decreased, which is worsening the frequency dynamics and threatening the stability and reliability of power grids. Virtual synchronous generators (VSGs) are a type of grid-friendly inverter in microgrids (MGs) that mimic rotational synchronous generators (SGs) to maintain system stability with the increasing penetration of power electronic converters. In this paper, the stability analysis method of one type of VSG, synchronverter, is investigated based on internal voltage dynamics. The torque components affecting the stability mechanism of synchronizing, inertia, and damping torque is introduced, which offers a physical insight into transient stability and dynamic performance. Insufficiency in either damping or synchronizing torque would increase the unstable possibility. The characterization method of stability mechanisms can be illustrated by the phasor diagram of synchronverter internal voltage. Some cases under different disturbances which change the pattern of synchronizing and damping torque and in turn influence the internal voltage dynamics of synchronverters, are also discussed. In addition, an auxiliary correction control loop is proposed and added in the synchronverter control loop to enhance the robustness of the synchronverter against disturbances. The tunable coefficient of the correction loop is analyzed based on the internal voltage method. Simulation results verify the validity of the internal voltage stability method in synchronverters.

Static voltage stability analysis and evaluation of vector controlled offshore wind farm considering cable capacitance parameters

Voltage stability region assessment is the key to ensuring the reliable operation of offshore wind farms However, the traditional analysis method, which treats the WFs as a PQ node and directly connected to the infinite power grid, fails to take the cable capacitance and the dynamics of the converter into account, resulting an inaccurate evaluation of voltage stability. The contribution of this paper is to propose a more accurate method for assessing the voltage stability of OWFs. Firstly, based on the equivalent circuit method, the point of common coupling (PCC) and internal voltage characterization models of OWF considering the cable capacitance parameters are derived. Then, the coupling interface between the dynamic of the converter and the voltage characteristics of the system is designed, and the transfer function of the power injection from the DC side of the converter to the voltage of the collector system is established, which fully reflects the OWF Pin→Udc→Id→Upcc→Pout transitive relationship. Finally, a voltage stability criterion based on dPw, out/dId&dUdc/dt direction discrimination is proposed, and the influence of cable parameters, output power, and grid impedance on the voltage stability margin is analyzed. The accuracy of the proposed method is verified based on the RT-LAB platform.

Voltage Support and Selective Harmonic Current Compensation in Advanced AC Microgrids

The high penetration of distributed energy resources (DERs) and non-linear loads in low-voltage (LV) grids may cause overvoltage and voltage harmonic distortion. This paper proposes an automatic control strategy to flexibly steer dispatchable DERs in AC microgrids (MGs) while simultaneously mitigating harmonic voltage distortion and over- and undervoltage at the MG nodes. Voltage support is performed through integrated local and coordinated volt-var and volt-watt functionalities, with a well-defined coordinated sequence of actions to avoid active power curtailment. A voltage detection-based decentralized selective harmonic current compensation (HCC) is enabled when the voltage total harmonic distortion exceeds the established threshold at the MG point of common coupling (PCC). The proposed scheme consists of a model-free control that provides power flow controllability at the MG PCC. It does not require computationally intensive algorithms, does not require extra grid-side and/or load-side current measurements, and effectively regulates the internal MG node voltages regardless of the line impedance X/R feature. The strategy is evaluated based on multiple simulations and experimental results, considering a LV MG model with several DERs as well as unbalanced, non-linear loads and non-dispatchable photovoltaic inverters. The simulations and experimental results showed an improved overall voltage profile throughout the MG nodes in terms of magnitude and distortion, which certifies the feasibility of the proposed scheme in real-field applications.

Internal Model Control Scheme-Based Voltage and Current Mode Control of DC–DC Boost Converter

Internal Model Control Scheme-Based Voltage and Current Mode Control of DC–DC Boost Converter