A multi-layer metallization method and structure that permits the use of sodium-ion contaminated titanium-tungsten (Ti:W) as a barrier metal with gold conductor metal on a silicon substrate, without significant degradation of device characteristics. After depositing the barrier and conductor metal layers, a layer of phosphorous-silicate glass (PSG) is anisotropically-etched to expose the field oxide and top surface of the conductor metal but leave PSG layer on each sidewall of the metallization structure. The circuit is then annealed at 400° C. for 30 minutes. Then, an adhesion layer (Si 3 N 4 ) and an insulative layer (SiO 2 ) are deposited over the metallization structure and field oxide, with the adhesion layer in contact with the top surface of the conductor metal and the gettering composition. The resultant circuit has a field threshold voltage shift comparable to devices made without a metal-ion-contaminated barrier layer and the resultant structure reliably retains the PSG layers in contact with the metallization sidewalls.
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