The Center Solenoid Model Coil (CSMC) is a pre-research project of CFETR, and its task is to design and manufacture the CS superconducting model coil to gain wider experience in solving the related technical problems existing in design and construction of CFETR CS coils. The expected achievement is to charge the CSMC up to the operation current of 47.65 kA and the maximum magnetic field to 12 T with a swift rump rate of 1.5 T/s without quench. Although adequate operational margins have been taken into in the design to avoid the quenches, such events cannot be completely excluded in the life of the CSMC. In order to prevent quench from damaging the CSMC, the quench detection by voltage measurements plays an important role in the protection of the CSMC during commissioning and operation scenarios. To improve the accuracy and reliability of CSMC quench detection, an all-digital quench detection system based on FPGA has been designed for the processing of quench detection signals. This paper describes the design of the quench detection signal processing system, including the composition of quench detection units, the auxiliary compensation for further denoising, the discriminant of quench, and the safety interlock system.