AbstractNanocrystals (NC's) in metal‐oxide‐semiconductor structures are considered as storage nodes for non‐volatile memory devices. The application of germanium NC's is essentially driven by the prospect of improved charge retention, however, the trade‐off between short write/erase operation and long data retention is still an unsolved issue as long as the electronic states contributing to the memory effect and the charge transfer paths for capture and emission are not clearly identified. Recently we have shown, that a thermally stimulated process is involved in the hole emission from embedded nanocrystals and that interface states might play a key role as transfer nodes. In order to inspect this supposition we examine in this study the charge response from interface states and near‐interfacial border traps by means of temperature dependent capacitance‐voltage measurements and deep level transient spectroscopy. NC's were introduced into 20 nm SiO2 layers on p‐type silicon by Ge implantation and subsequent annealing.The temperature dependence of the programming window was established for different samples, and the interface state density distribution was reconstructed from the DLTS spectrum. A particular feature was found in the spectrum which is not associated with the emission of the dispersed interface states, but likely related to the charge emission of the NC's based on a second order process. A scheme of the write/erase mechanisms is discussed, pointing out the crucial role of the interface states with respect to the device operation. (© 2013 WILEY‐VCH Verlag GmbH & Co. KGaA, Weinheim)
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