Interfacial Passivation Layer Research Articles

Investigation of the thermal stability of MoOx as hole-selective contacts for Si solar cells

The stoichiometry and work function of molybdenum oxide (MoOx) are of crucial importance for its performance as hole selective contact for crystalline silicon solar cells. Hydrogenated amorphous silicon (a-Si:H) is typically used as an interface passivation layer in combination with MoOx to reduce surface recombination. As the fabrication process of a solar cell typically contains subsequent high-temperature processes, the consideration of thermal stability of MoOx with and without a-Si:H becomes critical. In this work, in situ x-ray spectroscopy (XPS)/ultraviolet photoelectron spectroscopy and Fourier transform infrared spectroscopy in the temperature range from 300 K to 900 K are used to investigate the thermal stability of MoOx with and without a-Si:H. In addition, both the passivation and contact performance are studied by evaluating the surface saturation current density J0s, carrier lifetime τeff, and contact resistivity ρc. The XPS results reveal that the as-evaporated MoOx on top of both c-Si and a-Si:H is sub-stoichiometric, and the work function of both films is higher than 6 eV. While after in situ annealing, the evolution of MoOx phase on top of a-Si:H shows a different behavior compared to it on c-Si which is attributed to H diffusion from a-Si:H after 600 K, whereas the work function shows a similar trend as a function of the annealing temperature. The J0s of a p-type Si symmetrically passivated by MoOx is found to be 187 fA/cm2 and the ρc is ∼82.5 mΩ·cm2 in the as-evaporated state. With a-Si interface passivation layer, J0s is significantly lower at 5.39 fA/cm2. The J0s and the ρc increase after post-deposition annealing. The evolution of these functional properties can be attributed to the material properties.

Thickness-dependent structural and electromechanical properties of (Na0.85K0.15)0.5Bi0.5TiO3 multilayer thin film-based heterostructures

(Na0.85K0.15)0.5Bi0.5TiO3 (NKBT) multilayer thin films with different thicknesses of 100–700nm, corresponding to 2–14 layers with each layer of ~50nm thickness, are synthesized on Pt(111)/Ti/SiO2/Si substrates to form Pt/NKBT/Pt/Ti/SiO2/Si heterostructures using different spin-coating and annealing conditions in a modified aqueous sol-gel process. The multilayer thin films spin-coated by two steps (step 1/2) at 600/4000rpm for 6/30s and annealed at 700°C for 5min with a heating rate of 30°C/s show a dense, uniform, and continuous morphology as well as a pure perovskite structure with a rhombohedral–tetragonal phase transition at ~140°C and no preferential orientation in the heterostructures. Their structural and electromechanical properties exhibit consistent improvement trends with increasing thickness from 100 to 550nm (i.e., 2–11 layers). The 550nm-thick, 11-layer films demonstrate the best ferroelectric, dielectric, piezoelectric, and electric performance in terms of the highest remnant polarization, saturation polarization, dielectric constant, and effective piezoelectric constant of 18.3μC/cm2, 53.6μC/cm2, 463, and 64pm/V, as well as the lowest coercive field, dielectric loss tangent, and leakage current density of 116kV/cm, 0.057, and 27μA/cm2, respectively. The observed thickness-dependent improvement is explained by an interfacial passive layer effect where the motion of both 180° and non-180° domain walls is enhanced in the thicker multilayer thin films by weakening the influence of domain pinning in the interfacial passive layers between the multilayer thin films and the substrates.

In situ x-ray photoelectron emission analysis of the thermal stability of atomic layer deposited WOx as hole-selective contacts for Si solar cells

WOx is one of the most promising high work function materials to be used as hole-selective materials for c-Si solar cells. Apart from the optical and electrical properties of such materials, their thermal stability is of crucial importance for the potential application of these contacts. The thermal stability of plasma-enhanced atomic layer deposited WOx is investigated with and without an a-Si:H interface passivation layer. Time-of-flight secondary ion mass spectroscopy reveals that the as-deposited WOx films contain H resulting from the W precursor. In situ x-ray photoelectron spectroscopy under high vacuum in the 300 to 900 K temperature range shows that tungsten starts degrading from W+6 to W+5 for temperatures >600 K. The work function is found to be stable up to temperatures of 600 K. Subsequently, hydrogen diffusion from a-Si:H decreases the work function of WOx and enhances the degradation of tungsten's oxidation state. Fourier transform infrared spectroscopy confirms the reduction in the hydrogen content in the thin film stack after annealing at 600 K. Besides, the passivation level of the film stack a-Si:H/WOx showed a maximum lifetime of 3.5 ms (at 1 × 15 cm−3) after annealing at 500 K. The results are of key importance for the integration of these novel contacts in high-efficiency silicon solar cells.

Interfacial reactions of chalcopyrite in ammonia–ammonium chloride solution

Abstract The interfacial reactions of chalcopyrite in ammonia–ammonium chloride solution were investigated. The chalcopyrite surface was examined by scanning electron microscopy and X-ray photoelectron spectroscopy (XPS) techniques. It was found that interfacial passivation layers of chalcopyrite were formed from an iron oxide layer on top of a copper sulfide layer overlaying the bulk chalcopyrite, whereas CuFe1–xS2 or copper sulfides were formed via the preferential dissolution of Fe. The copper sulfide layer formed a new passivation layer, whereas the iron oxide layer peeled off spontaneously and partially from the chalcopyrite surface. The state of the copper sulfide layer was discussed after being deduced from the appearance of S2–, S2−2, S2−n, S0 and SO2−4. A mechanism for the oxidation and passivation of chalcopyrite under different pH values and redox potentials was proposed. Accordingly, a model of the interfacial reaction on the chalcopyrite surface was constructed using a three-step reaction pathway, which demonstrated the formation and transformation of passivation layers under the present experimental conditions.

Interface Modulation and Optimization of Electrical Properties of HfGdO/GaAs Gate Stacks by ALD‐Derived Al2O3 Passivation Layer and Forming Gas Annealing

AbstractMetal‐oxide‐semiconductor (MOS) capacitors with sputtering‐deposited Gd‐doped HfO2(HGO) high k gate dielectric thin films and ALD‐derived Al2O3 interfacial passivation layer were fabricated on GaAs substrates. The effects of the passivation layer and the forming gas annealing (FGA) temperature were explored by studying the interfacial chemical bonding states and electrical properties of HGO/GaAs and HGO/Al2O3/GaAs gate stacks via x‐ray photoelectron spectroscopy (XPS), capacitance‐voltage (C–V), and leakage current density‐voltage ( J–V) measurements. Results indicated that the MOS capacitors performances were enhanced by performing FGA. The electrical analysis revealed that the 300 °C‐annealed Al/HGO/GaAs/Al MOS capacitor with 20 cycles Al2O3 passivation layer experienced improved electrical properties, with a dielectric constant of 44, a flat band voltage of 0.64 V, a hysteresis of 0.02 V corresponding to the oxide charge density of −6.2 × 1012 cm2, border trapped oxide charge density of −3.02 × 1011 cm2, a leakage current density 5.87 × 10‐6 A/cm2 at a bias voltage of 2 V. The low temperature (77–300 K) dependent detailed current conduction mechanisms (CCMs) of the 300 °C‐annealed MOS capacitor at low temperatures were also systematically investigated. The optimized interface chemistry and the excellent electrical properties suggested that HGO/Al2O3/GaAs potential gate stacks could be applied in future III‐V‐based MOSFET devices.

GaAs Metal–Oxide–Semiconductor Capacitor With Nd-Based High-k Oxynitrides as Gate Dielectric and Passivation Layer

GaAs metal–oxide–semiconductor capacitors with NdTaON as gate dielectric and NdAlON, NdON or AlON as interfacial passivation layer (IPL) are fabricated, and their interfacial and electrical properties are compared with their counterpart without IPL. Experimental results show that owing to the suppressed hygroscopicity of NdON by Al incorporation, best improvements in electrical properties and reliability are achieved for the sample with NdAlON IPL (low interface-state density ( $8 \times 10^{11}$ cm−2/eV), small flatband voltage (0.72 V), negligible hysteresis (43 mV), small frequency dispersion, and low gate leakage current density ( $2.56 \times 10^{-6}$ A/cm2 at Vfb + 1 V). These should be attributed to suppressed growth of unstable Ga and As oxides on the GaAs surface and reduced in-diffusion of elements from the gate dielectric to the GaAs surface by the NdAlON IPL during gate-dielectric annealing.

Improved Process Stability on an Extremely Thin Amorphous/Crystalline Silicon Interface Passivation Layer by Using Predeposition on the Chamber Wall

In this study, in situ plasma diagnostic systems of optical emission spectrometry (OES) and quadrupole mass spectrometry (QMS) were used to monitor an extremely thin (5–10 nm) intrinsic amorphous/crystalline Si interface passivation film as deposited using plasma-enhanced chemical vapor deposition (PECVD). We observed a dramatic improvement in the quality of the passivation layer with a chamber background environment, even with a background pressure of 1E-6 Torr. When the chamber walls were coated (at a predeposition time of approximately 150 min) to a specified thickness of a few hundred micrometers, the minority carrier lifetime increased by more than 26 times, as compared with an insufficiently coated counterpart with a predeposition of approximately 30 min (from approximately 30 μs to 800 μs). In this predeposition process, the tendency of species to concentrate could be systematically obtained using the in situ OES system, with the chamber environment monitored using residual gas analysis and threshold ionization mass spectrometry of QMS. We found that the optimal predeposition time was 150 min, which enabled the OES intensity of Si*/SiH*, Hβ/Hα, and Hα/SiH* to become stable. OES and QMS were incorporated in this study and were validated using the Fourier-transform infrared spectroscopy absorbance spectra on the films. The plasma condition was stabilized and the minority carrier lifetime was improved to 800 μs. The proposed predeposition process stabilized the chamber environment and gas discharge. Therefore, the optimized value of the minority carrier lifetime could be consistently obtained. A transmission electron microscopy photograph showed a compact a-Si:H layer (of approximately 10 nm) on the c-Si substrate interface passivation layer with a void-free and crystallites-free interface after a predeposition time of 150 min.

Influence of LaSiOx passivation interlayer on band alignment between PEALD-Al2O3 and 4H-SiC determined by X-ray photoelectron spectroscopy

Abstract The influence of lanthanum silicate (LaSiO x ) passivation interlayer on the band alignment between plasma enhanced atomic layer deposition (PEALD)-Al 2 O 3 films and 4H-SiC was investigated by high resolution X-ray photoelectron spectroscopy (XPS). An ultrathin in situ LaSiO x interfacial passivation layer (IPL) was introduced between the Al 2 O 3 gate dielectric and the 4H-SiC substrate to enhance the interfacial characteristics. The valence band offset (VBO) and corresponding conduction band offset (CBO) for the Al 2 O 3 /4H-SiC interface without any passivation were extracted to be 2.16 eV and 1.49 eV, respectively. With a LaSiO x IPL, a VBO of 1.79 eV and a CBO of 1.86 eV could be obtained across the Al 2 O 3 /4H-SiC interface. The difference in the band alignments was dominated by the band bending or band shift in the 4H-SiC substrate as a result of different interfacial layers (ILs) formed at the interface. This understanding of the physical details of the band alignment could be a good foundation for Al 2 O 3 /LaSiO x /4H-SiC heterojunctions applied in the 4H-SiC metal-oxide-semiconductor field effect transistors (MOSFETs).

Improved interfacial properties of GaAs MOS capacitor with NH3-plasma-treated ZnON as interfacial passivation layer**Project supported by the National Natural Science Foundation of China (Nos. 61176100, 61274112, 61404055).

The GaAs MOS capacitor was fabricated with HfTiON as high-k gate dielectric and NH3-plasma-treated ZnON as interfacial passivation layer (IPL), and its interfacial and electrical properties are investigated compared to its counterparts with ZnON IPL but no NH3-plasma treatment and without ZnON IPL and no plasma treatment. Experimental results show that low interface-state density near midgap (1.17 × 1012 cm−2 eV−1) and small gate leakage current density have been achieved for the GaAs MOS device with the stacked gate dielectric of HfTiON/ZnON plus NH3-plasma treatment. These improvements could be ascribed to the fact that the ZnON IPL can effectively block in-diffusion of oxygen atoms and out-diffusion of Ga and As atoms, and the NH3-plasma treatment can provide not only N atoms but also H atoms and NH radicals, which is greatly beneficial to removal of defective Ga/As oxides and As-As band, giving a high-quality ZnON/GaAs interface.

Improvements of Interfacial and Electrical Properties for Ge MOS Capacitor by Using TaYON Interfacial Passivation Layer and Fluorine Incorporation

Ge metal–oxide–semiconductor capacitor with HfTiON/TaYON stacked gate dielectric treated by fluorine plasma is fabricated, and its interfacial and electrical properties are compared with its counterparts without the TaYON interfacial passivation layer or the fluorine-plasma treatment. Experimental results show that the sample exhibits excellent performances: low interface-state density ( $2.5\times 10^{11}$ cm $^{-2}$ eV $^{-1})$ , small flatband voltage (0.34 V), good capacitance–voltage behavior, small frequency dispersion, and low gate leakage current ( $2.47 \times 10^{-5}$ A/cm2 at $\text{V}_{\text {g}} = \,\, \text{V}_{\text {fb}} + 1$ V). These should be attributed to the suppressed growth of unstable Ge oxides on the Ge surface during gate dielectric annealing by the TaYON interlayer and fluorine incorporation, thus greatly reducing the defective states at/near the TaYON/Ge interface and improving the electrical properties of the device.

Evaluation of AlGaN/GaN metal–oxide–semicondutor high-electron mobility transistors with plasma-enhanced atomic layer deposition HfO2/AlN date dielectric for RF power applications

A plasma enhanced atomic layer deposition (PEALD) HfO2/AlN dielectric stack was used as the gate dielectric for AlGaN/GaN metal–oxide–semiconductor high-electron-mobility transistors (MOS-HEMTs) for high-frequency power device applications. The capacitance–voltage (C–V) curves of the HfO2/AlN/GaN MOS capacitor (MOSCAP) showed a small frequency dispersion along with a very small hysteresis (∼50 mV). Moreover, the interface trap density (Dit) was calculated to be 2.7 × 1011 cm−2 V−1 s−1 at 150 °C. Using PEALD-AlN as the interfacial passivation layer (IPL), the drain current of the HfO2/AlN MOS-HEMTs increased by about 46% and the gate leakage current decreased by six orders of magnitude as compared with those of the conventional Schottky gate AlGaN/GaN HEMTs processed using the same epitaxial wafer. The 0.3-µm-gate-length HfO2/AlN/AlGaN/GaN MOS-HEMTs demonstrated a 2.88 W/mm output power, a 23 dB power gain, a 30.2% power-added efficiency at 2.4 GHz, and an improved device linearity as compared with the conventional AlGaN/GaN HEMTs. The third-order intercept point at the output (OIP3) of the MOS-HEMTs was 28.4 as compared with that of 26.5 for the conventional GaN HEMTs. Overall, the MOS-HEMTs with a HfO2/AlN gate stack showed good potential for high-linearity RF power device applications.

Improved Electrical Properties and Reliability of GaAs Metal-Oxide-Semiconductor Capacitor by Using LaAlON Passivation Layer

GaAs metal–oxide–semiconductor (MOS) capacitors with NbAlON gate dielectric are fabricated with LaAlON or LaON as interface passivation layer and compared with their counterpart without interface passivation layer. Experimental results show that improvements in electrical properties and reliability are achieved, especially for the sample with LaAlON passivation layer (the hygroscopicity of LaON is largely reduced by Al incorporation): relatively high k value (25.5), low interface-state density (6.8 × 1011 cm−2 eV−1), small flatband voltage (0.67 V), small hysteresis (45 mV), small frequency dispersion and low gate leakage (6.18 × 10−6 A cm−2 at Vfb + 1 V). These should be attributed to the suppressed growth of unstable Ga and As oxides on the GaAs surface and reduced in-diffusion of elements from the gate dielectric to the GaAs surface by the LaAlON passivation layer during gate-dielectric annealing.

Large Area Self-Powered Al-ZnO/(n)Si Hetero-Junction Photodetectors With High Responsivity

Al-ZnO/Si heterojunction-based large area, self-powered, low reverse leakage current, and broadband photodetectors with high responsivity are fabricated using the simple and low temperature process. Different from widely applied (p)Si-based heterojunctions, these devices are (n)Si-based and offer superior performance. With optimized Al–ZnO thickness, excellent light confinement is achieved. An interfacial passivation layer that improves the hetero-interface helps achieved a reverse current density as low as $4.5 \times 10^{-7}$ A/cm $^{-2}$ at −0.5 V for a 4.84 cm2 device, with rectification ratio of $2.7 \times 10^{3}$ at ±0.5 V. In self-powered mode, the photodetector achieved responsivities of 0.292, 0.426, and 0.486 A/W (external quantum efficiency, EQE of 78.7%, 96.1%, and 98.8%) for primary blue (460 nm), green (550 nm), and red (610 nm) light, respectively. The operation of self-powered Al–ZnO/(n)Si photodetectors is demonstrated for the first time with modulated optical signal at circuit level.

Improved Interfacial and Electrical Properties of GaAs Metal–Oxide–Semiconductor Capacitor by Using Fluorine-Plasma-Treated Interfacial Passivation Layer

ZrON gate-dielectric GaAs metal–oxide–semiconductor capacitors with a LaSiON interfacial passivation layer (IPL) and different fluorine-plasma-treatment methods are fabricated and investigated. Compared to using plasma-treating a GaAs surface or no plasma treatment, the sample with plasma-treated IPL exhibits the lowest interface-state density ( ${1.08 \times 10^{12}}$ cm−2eV−1), highest ${k}$ value (18.3) and smallest gate-leakage current ( ${1.62 \times 10^{-5}}$ A/cm2 at ${V_{fb}}$ + 1 V). The fact that plasma-treating IPL can effectively reduce the defect-related Ga/As–O and As–As bonds at GaAs surface and also incorporate more F into the gate stack to passivate the defects in it and at/near IPL/GaAs interface should be responsible for these.

Electrical and Interfacial Properties of GaAs MOS Capacitors With La-Doped ZrON as Interfacial Passivation Layer

GaAs MOS capacitors with ZrTiON high- ${k}$ gate dielectric and ZrLaON or ZrON as interfacial passivation layer (IPL) are fabricated, and their electrical properties are investigated. As compared with a control sample without IPL, improved interfacial quality and electrical properties are obtained for both samples, with the ZrTiON/ZrLaON/GaAs device, exhibiting the lowest interface-state density ( $1.1 \times 10^{12}$ cm $^{-2}$ eV $^{-1})$ , smallest gate leakage current density ( $1.62 \times 10^{-5}$ A cm $^{-2}$ at $V_{g} =V_{{\text {fb}}} + 1$ V), and largest equivalent dielectric constant (25.1). All of these should be attributed to the fact that incorporating La into the ZrON IPL can: first, passivate its defects and, second, enhance the blocking role of the IPL against the Ti/O in-diffusion to the GaAs substrate and the Ga/As out-diffusion to the high- ${k}$ , thus resulting in an obvious reduction of relevant defects in the gate stack and also suppressing the formation of unstable Ga/As oxides and As–As dimer at the GaAs surface to obtain a much improved dielectric/GaAs interface.

Improved Interfacial and Electrical Properties of GaAs MOS Capacitor With LaON/TiON Multilayer Composite Gate Dielectric and LaON as Interfacial Passivation Layer

GaAs metal–oxide–semiconductor capacitors are fabricated by alternately depositing La oxynitride (LaON)/TiON or TiON/LaON or first depositing a LaON interlayer and then alternately depositing LaON/TiON, and their interfacial and electrical properties are investigated and compared. Experimental results show that the sample with LaON interlayer exhibits better interface quality and electrical performance than the other two samples: lower interface-state density ( $1.05 \times 10^{12}$ cm $^{-2}$ eV $^{-1})$ , smaller gate leakage current ( $2.33 \times 10^{-5}$ A/cm2 at $\text{V}_{\mathrm {fb}} + 1$ V), larger equivalent dielectric constant (25.3), and better high-field reliability. The involved mechanism lies in the fact that the LaON interlayer on the GaAs surface can effectively reduce the defective states at/near the interface by blocking the Ti/O in-diffusion and As/Ga out-diffusion, thus improving the interfacial and electrical properties of the device.

Effective passivation of HfO2/Ge interface by using nitrided germanate as passivation interlayer

Ge metal‐oxide‐semiconductor (MOS) capacitor with YON/LaON, as interface passivation layer (IPL), and HfO2, as gate dielectric, is proposed to take advantage of both the good passivation effect by LaON and the suppressed intermixing between HfO2 and Ge by YON. As a result, superior interfacial and electrical properties are obtained, as compared to samples with only YON or LaON as IPL: high k value (19.5), low interface‐state density (6.64 × 1011 cm−2 eV−1) and oxide‐charge density (−4.18 × 1012 cm−2), small gate leakage current (1.15 × 10−4 A cm−2 at Vg = Vfb + 1 V), and good high‐field reliability.Schematic diagram (a) and C–V curves (b) of the gate stack with YON/LaON dual IPL.

InGaAs QW-MOSFET Performance Improvement Using a PEALD-AlN Passivation Layer and an <italic>In-Situ</italic> NH3Post Remote-Plasma Treatment

In this letter, we report on the impact of a PEALD-AlN interfacial passivation layer (IPL) and an in-situ NH3 post remote-plasma (PRP) treatment onto InGaAs quantum-well MOSFETs with Ti/HfO2/InGaAs gate stack. Transistors with gate lengths down to 80 nm have been fabricated and characterized. Due to the excellent interfacial quality of HfO2/AlN/InGaAs, the subthreshold swing and the peak effective channel mobility have been improved to 93 mV/decade and 4253 cm2/Vs, respectively. The drain current has also shown a 4.6-fold enhancement, to 164 mA/mm ( ${I}_{ \mathrm{\scriptscriptstyle OFF}} \,\,{=}\,\,{100}$ nA/ $\mu \text{m}$ and ${V} _{\mathrm {DD}} \,\,{=}\,\,{0.5}$ V), compared with the HfO2 control device. The results also show that the HfO2/AlN device exhibits better immunity to short-channel effects (SCEs) than the HfO2 control device. Furthermore, during positive bias temperature instability stress, a smaller ${V}_{\mathrm {TH}}$ and a lower ${G}_{\mathrm {m}}$ were observed for the sample with an AlN IPL and NH3 PRP treatment, indicating that it is more reliable than the sample without any IPL or plasma treatment.

Interfacial and Electrical Properties of GaAs Metal-Oxide-Semiconductor Capacitor with ZrAlON as the Interfacial Passivation Layer**Supported by the National Natural Science Foundation of China under Grant Nos 61176100, 61274112 and 61404055.

The ZrTiON gate-dielectric GaAs metal-oxide-semiconductor (MOS) capacitors with or without ZrAlON as the interfacial passivation layer (IPL) are fabricated and their properties are investigated. The experimental results show that the GaAs MOS capacitor with the ZrAlON IPL exhibits better interfacial and electrical properties, including lower interface-state density ( cm−2eV−1), smaller gate leakage current ( A/cm2 at +1 V), smaller capacitance equivalent thickness (1.5 nm), and larger k value (26). The involved mechanisms lie in the fact that the ZrAlON IPL can effectively block the diffusion of Ti and O towards the GaAs surface, thus suppressing the formation of interfacial Ga-/As-oxides and As-As dimers, which leads to improved interfacial and electrical properties for the devices.

Spatially Resolved Imaging on Photocarrier Generations and Band Alignments at Perovskite/PbI2 Heterointerfaces of Perovskite Solar Cells by Light-Modulated Scanning Tunneling Microscopy.

The presence of the PbI2 passivation layers at perovskite crystal grains has been found to considerably affect the charge carrier transport behaviors and device performance of perovskite solar cells. This work demonstrates the application of a novel light-modulated scanning tunneling microscopy (LM-STM) technique to reveal the interfacial electronic structures at the heterointerfaces between CH3NH3PbI3 perovskite crystals and PbI2 passivation layers of individual perovskite grains under light illumination. Most importantly, this technique enabled the first observation of spatially resolved mapping images of photoinduced interfacial band bending of valence bands and conduction bands and the photogenerated electron and hole carriers at the heterointerfaces of perovskite crystal grains. By systematically exploring the interfacial electronic structures of individual perovskite grains, enhanced charge separation and reduced back recombination were observed when an optimal design of interfacial PbI2 passivation layers consisting of a thickness less than 20 nm at perovskite crystal grains was applied.