Fixed Interface Charge Density Research Articles

DC and RF performance analysis of enhancement mode fin-shaped tri-gate AlGaN/GaN HEMT and MOSHEMT with ultra-thin barrier layer

The DC and RF assessment of critical barrier-AlGaN/GaN nano channel tri-gate fin-shaped High Electron Mobility Transistor (FinHEMT) is investigated for Enhancement-mode (E-mode) operation. We propose and analyze critical barrier layer (CBL) and critical-strained barrier layer (CSBL) FinHEMT for a fixed fin-shaped channel width (W fin = 160 nm) and height (H fin = 70 nm). The CBL FinHEMT ensures an E-mode operation by depleting two-dimensional electron gas (2DEG) near the channel region between AlGaN and GaN hetero-junction. The extracted threshold voltage (V T ) in CBL FinHEMT is 0.4 V as compared to −0.2 V obtained in CSBL FinHEMT. However, increased gate leakage current density and poor gate voltage swing in CBL FinHEMT is improved through a metal-oxide-semiconductor FinHEMT (FinMOSHEMT) structure by the incorporation of Al2O3 gate oxide layer between the tri-gate and CBL AlGaN layer. It results in a stable positive VT of 0.5 V due to the negatively charged Al2O3/barrier interface fixed charge density ( NAl2O3 ). The proposed CBL FinMOSHEMT has also been studied for different atomic layer deposition Al2O3 process-dependent variations in NAl2O3. The maximum on-state drain current and transconductance of 1.01 A mm−1 and 430 mS/mm have been extracted respectively with NAl2O3 of −9.2 × 1012 cm−2. Further, the RF analysis of the proposed CBL FinMOSHEMT structure with the same dimension exhibits improved f T and f max responses with 27 GHz and 90 GHz respectively over CBL FinHEMT. The results of the frequency responses obtained for the proposed design make it suitable for power electronics applications.

Plasma-assisted deposition and characterization of Al2O3 dielectric layers on (001) β -Ga2O3

In this work, we have investigated plasma-assisted deposition of Al2O3 on HVPE (001) β-Ga2O3 and evaluated the dielectric quality from electrical measurements on fabricated metal-oxide-semiconductor (MOS) capacitors. The interface structure and crystallinity of the films were investigated as a function of the growth temperature. The dielectric/semiconductor interfaces were found to have reverse breakdown electric fields up to 5.3 MV/cm in the β-Ga2O3, with relatively low hysteresis in capacitance–voltage and low leakage current. We determined a negative fixed interface charge density at the interface from analysis of thickness-dependent capacitance voltage data. This study shows the advantage of using plasma-assisted deposition to achieve high breakdown strength Al2O3/β-Ga2O3 MOS structures for device application purposes.

Interface charge engineering in AlTiO/AlGaN/GaN metal–insulator–semiconductor devices

Toward interface charge engineering in AlTiO/AlGaN/GaN metal-insulator-semiconductor (MIS) devices, we systematically investigated insulator-semiconductor interface fixed charges depending on the composition of the AlTiO gate insulator obtained by atomic layer deposition. By evaluating the positive interface fixed charge density from the insulator-thickness dependence of the threshold voltages of the MIS devices, we found a trend that the interface fixed charge density decreases with the decrease in the Al composition ratio, i.e., increase in the Ti composition ratio, which leads to shallow threshold voltages. This trend can be attributed to the large bonding energy of O-Ti in comparison with that of O-Al and to consequent possible suppression of interface oxygen donors. For an AlTiO gate insulator with an intermediate composition, the MIS field-effect transistors exhibit favorable device characteristics with high linearity of transconductance. These results indicate a possibility of interface charge engineering using AlTiO, in addition to energy gap engineering and dielectric constant engineering.

Time-dependent dielectric breakdown of recessed AlGaN/GaN-on-Si MOS-HFETs with PECVD SiO2 gate oxide

This paper reports the first-time evaluation of the time-dependent dielectric breakdown of recessed AlGaN/GaN-on-Si metal-oxide-semiconductor heterostructure field-effect transistors (MOS-HFETs) with plasma enhanced chemical vapor deposition (PECVD) SiO2 gate oxide. The interface fixed charge density and oxide bulk charge density extracted from the flat-band voltage characteristics were 2.7 × 1011 ± 6.54 × 1010 cm−2 and -9.71 × 1017 ± 5.18 × 1016 cm−3, respectively. The time dependent dielectric breakdown (TDDB) characteristics exhibited longer lifetime estimation as the SiO2 thickness increased. The excellent reliability of the PECVD SiO2 film was validated for use as the gate oxide of recessed AlGaN/GaN MOS-HFET.

Insulator-semiconductor interface fixed charges in AlGaN/GaN metal-insulator-semiconductor devices with Al2O3 or AlTiO gate dielectrics

We have investigated insulator-semiconductor interface fixed charges in AlGaN/GaN metal-insulator-semiconductor (MIS) devices with Al2O3 or AlTiO (an alloy of Al2O3 and TiO2) gate dielectrics obtained by atomic layer deposition on AlGaN. Analyzing insulator-thickness dependences of threshold voltages for the MIS devices, we evaluated positive interface fixed charges, whose density at the AlTiO/AlGaN interface is significantly lower than that at the Al2O3/AlGaN interface. This and a higher dielectric constant of AlTiO lead to rather shallower threshold voltages for the AlTiO gate dielectric than for Al2O3. The lower interface fixed charge density also leads to the fact that the two-dimensional electron concentration is a decreasing function of the insulator thickness for AlTiO, whereas being an increasing function for Al2O3. Moreover, we discuss the relationship between the interface fixed charges and interface states. From the conductance method, it is shown that the interface state densities are very similar at the Al2O3/AlGaN and AlTiO/AlGaN interfaces. Therefore, we consider that the lower AlTiO/AlGaN interface fixed charge density is not owing to electrons trapped at deep interface states compensating the positive fixed charges and can be attributed to a lower density of oxygen-related interface donors.

Gate defects analysis in AlGaN/GaN devices by mean of accurate extraction of the Schottky Barrier Height, electrical modelling, T-CAD simulations and TEM imaging

This paper proposes an investigation focused on the Schottky diode related electrical behaviors on GaN high frequency technologies. As the Schottky diode represents the electrical input terminal (the command) of High Electron Mobility Transistors (HEMTs), this study also correlates with some first order degradation in the active channel (current IDS). Non-invasive methods and related models have been used to determine the accurate Schottky Barrier Height (SBH) of the diode in terms of mean value and dispersion; this approach is convenient to evidence different failure mechanisms on virgin and stressed devices that can be correlated with DC or transient electrical parameters. It is shown that according to given temperature windows and IGS ranges, linear relationships can be extracted between the mean SBH and the inhomogeneities of the SBH that appear in forward-biased diode mode. This original approach permits to determine an increase or a decrease of the global SBH after a stress period. Electrical behaviors issued from the proposed non-destructive technique and from electrical modelling of the diode at different temperatures are found to be consistent with Transmission Electron Microscope (TEM) investigations. T-CAD models have also been used and tuned to account for the impact of interface fixed charge density changes on the electrical signatures of the HEMTs.

Comparison and characterization of different tunnel layers, suitable for passivated contact formation

Passivated contacts for solar cells can be realized using a variety of differently formed ultra-thin tunnel oxide layers. Assessing their interface properties is important for optimization purposes. In this work, we demonstrate the ability to measure the interface defect density distribution Dit(E) and the fixed interface charge density Qf for ultra-thin passivation layers operating within the tunnel regime (<2 nm). Various promising tunnel layer candidates [i.e., wet chemically formed SiOx, UV photo-oxidized SiOx, and atomic layer deposited (ALD) AlOx] are investigated for their potential application forming electron or hole selective tunnel layer passivated contacts. In particular, ALD AlOx is identified as a promising tunnel layer candidate for hole-extracting passivated contact formation, stemming from its high (negative) fixed interface charge density in the order of −6 × 1012 cm−2. This is an order of magnitude higher compared to wet chemically or UV photo-oxidized formed silicon oxide tunnel layers, while keeping the density of interface defect states Dit at a similar level (in the order of ∼2 × 1012 cm−2 eV−1). This leads to additional field effect passivation and therefore to significantly higher measured effective carrier lifetimes (∼2 orders of magnitude). A surface recombination velocity of ∼40 cm/s has been achieved for a 1.5 nm thin ALD AlOx tunnel layer prior to capping by an additional hole transport material, like p-doped poly-Si or PEDOT:PSS.

Characterization of Interface Charge in NbAlO/AlGaN/GaN MOSHEMT with Different NbAlO Thicknesses

We investigate the influence of interface charge on electrical performance of NbAlO/AlGaN/GaN metal-oxide-semiconductor high electron mobility transistors (MOSHEMTs). Through C—V measurements and simulations, we find that the donor-type interface fixed charge density Qit of 2.2 × 1013 cm−2 exists at the NbAlO/AlGaN interface, which induces the shift of the threshold voltage much more negative. Furthermore, a trap density of approximately 0.43 × 1013–1.14 × 1013 cm−2eV−1 is obtained at the NaAlO/AlGaN interface, which is consistent with the frequency-dependent capacitance and conductance measurement results.

A New Methodology for Probing the Electrical Properties of Heavily Phosphorous-Doped Polycrystalline Silicon Nanowires

In this study, we proposed a new methodology for probing the electrical properties of heavily doped polycrystalline silicon (poly-Si) nanowires (NWs), including active doping concentration, mobility, and interface fixed charge density. Implementation of this procedure is based on the modulation of the device operation of a gate-all-around (GAA) junctionless (J-less) transistor from the gated resistor mode to the ungated one. The extracted carrier concentration in the NW is found to be much lower than that of Hall measurements, while a negative fixed charge density is identified with the procedure. Dopant segregation at the oxide interface is postulated to be closely related to these observations.

Surface state effects on N+P doped electron detector

Surface states and interface recombination velocity that exist between detector interfaces have always been known to affect the performance of a detector. This article describes how the detector performance varies when the doping profile is altered. When irradiated with electrons, the results show that while changes in the doping profile have an effect of the detector responsivity with respect to the interface recombination velocity vs, there is no visible effect with respect to fixed oxide charge Qf otherwise known as interface fixed charge density.

Effects of Annealing and Atomic Hydrogen Treatment on Aluminum Oxide Passivation Layers for Crystalline Silicon Solar Cells

The effects of annealing and atomic hydrogen treatment (AHT) on the interface between hydrogenated aluminum oxide (a-Al1-xOx:H) and crystalline silicon (c-Si) were investigated. The annealing increased the negative interface fixed charge density (Qf) from -4.0×1011 to -3.0×1012 cm-2, whereas AHT reduced Qf from -3.0×1012 to 8.3×1011 cm-2. Chemical composition analyses revealed the existence of a hydrogenated silicon oxide (a-Si1-xOx:H) interfacial layer. It was also found that annealing and AHT strongly affected the chemical compositions near the interfacial layer. The change in Qf is probably caused by the reaction at the interface between the a-Al1-xOx:H and a-Si1-xOx:H.

Forming Gas Annealing Characteristics of Germanium-on-Insulator Substrates

Large-area layer transfer of germanium-on-insulator (GeOI) substrates has been fabricated by ion-cut processes. Pseudo-MOSFET structure was employed to characterize interface trap density, interface fixed charge density, interface carrier mobility, and bulk carrier mobility of these GeOI substrates with various annealing conditions in forming gas ambient. High-temperature annealing in the vicinity of 500degC-600degC has shown the best carrier mobilities, with the interface trap density and the interface fixed charge density as low as 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">10</sup> q/cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> . The extracted bulk hole mobility of the annealed GeOI is near 500 cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> /( V middots), which is higher than that of silicon [300 cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> /(V middots)] at the same doping concentration level.

Improved interface properties of Al2O3 optical coatings on GaAs deposited by e-beam

We report the results of the improved surface passivation of GaAs using Al2O3 films deposited by the e-beam evaporation technique. A low and stable density of the negative fixed interface charge density of ∼1 × 1010 cm−2 and the fast interface state density of <3 × 1011 cm−2 eV−1 were obtained for the said films. Furthermore, using dc I–V measurements near zero bias, the typical leakage currents varying from 4 to 90 pA range were measured. The lowest near zero bias current was 0.5 pA which indicates a resistivity of 3.6 × 1011 Ω cm for our Al2O3 films, which is comparable to the values reported in the literature. To assess the uniformity of these films, a large number of devices from the 2 inch wafer were measured. It was observed that in general the shape of C–V curves remains the same except that there is only a 15% variation in accumulation capacitance across the whole wafer. This suggests a variation of dielectric constant from 4 to 4.5, which is indicative of acceptable film uniformity. Similarly, resistivity varied by three orders of magnitude from ∼3.0 × 108 to ∼3 × 1011 Ω cm.

Properties of oxide deposited on c-plane AlGaN/GaN heterostructure

GaN-based metal-insulator-field effect transistors are very promising for high-voltage power switching applications because of low gate leakage current, low interface state density, and the ability to achieve enhancement mode devices. In this reported work, properties of the SiO2/AlGaN interface were characterised using capacitors fabricated on polar c-plane (0001) AlGaN/GaN heterostructures for two different oxide deposition conditions. Using capacitance-voltage measurements, it was possible to determine the interface fixed charge density for 500 and 900°C oxide deposition temperatures. The measured interface charge density data will be useful for the design of normally-off AlGaN/GaN transistors with silicon dioxide gate insulator.

Ultrahigh resistivity aluminum nitride grown on mercury cadmium telluride

Aluminum nitride insulating layers have been grown at room temperature with a film resistivity of 3.3×1016 Ω cm on mercury cadmium telluride substrates. Insulator breakdown fields of 640 MV/m were reached. Capacitance–voltage measurements with Al/AlN/Hg0.76Cd0.24Te metalinsulator-semiconductor devices demonstrate band bending at the semiconductor surface indicating that damage to the substrate was minimized during film growth. A fixed interface charge density (given here as total charge per unit area divided by the electron charge=Qss/q) of +2×1011 cm−2 and a slow interface state density of 4×1010 cm−2 were measured. The procedures for achieving these high quality insulating layers are reported. Frequency dependent dielectric constant and dielectric loss tangent measurements, carried out at room temperature and 100 K, are also presented.

Effect of nanometer-scale corrugation on densities of gap states and fixed charges at the thermally grown SiO2/Si interface

Effect of nanometer-scale corrugation on gap state and fixed charge densities at the SiO2/Si interface in Si (001) metal–oxide–semiconductor (MOS) capacitors has been studied by capacitance–voltage (C–V) and conductance–voltage (G/ω–V) measurements. As the interface corrugation, a high density of Si protrusions, composed of a microscopic (001) plane at the top and high-index planes [typically (115) planes] at the sides, were formed by a microscopic selective oxidation technique developed by the authors. By changing the selective oxidation condition, the area ratio of the top and side planes was varied. As a result, it was found that each of C–V and G/ω–V curves showed a mixture of two curves with different flatband voltages. This reflects that the interface fixed charge density at the side high-index planes is larger than that at the top (001) plane, similar to previous reports for classical MOS capacitors with a macroscopic flat interface. Furthermore, it was found that the side high-index interface has a higher gap state density than the top (001), also similar to the previous macroscopic results. Such orientation dependence of gap state and fixed charge densities in the nanometer regime will play a significant role in electrical properties of ultrasmall Si devices, which accompany a relatively large area of curved interfaces.

Hydrogenation of ZnS passivation on narrow-band gap HgCdTe

Due to the narrow band gap of HgCdTe required for infrared photodetectors, the device performance is readily influenced by surface effects. This letter examines the effect that hydrogenation has on the quality of industry-standard ZnS passivating films. The hydrogenation is achieved by exposing the samples to a H2/CH4 plasma that is present during a reactive ion etching process. The results show a marked improvement of the passivant/substrate interface for hydrogenated devices with a reduction of the average fixed interface charge density to 3.5×1010 cm−2, accompanied by a sixfold decrease in the standard deviation. The advantage of this method of hydrogenation is that it is integrated into the reactive ion etch processing for mesa formation or p-type to n-type conversion in photoconductive or photovoltaic device fabrication, respectively. With the improvement of the ZnS passivation with hydrogenation, this method may alleviate the need for complex epitaxial passivation processing.

Electrical characterization of anodically grown native oxide on GaInSb

Surface passivation of single crystal bulk grown Ga 1− x In x Sb with x=0.08–0.18 is investigated using anodically grown native oxide and MOS devices. Electrical characterization of the interface is performed by using capacitance–voltage and conductance–voltage measurements at room temperature. The as-grown film shows relatively large hysteresis and high densities of negative (positive) fixed interface charges at the n- (p-) type interface. A long-time low-temperature annealing significantly improves interface properties, while a high temperature annealing degrades the interface. Very good interface properties are obtained for n-type wafers, with a fixed interface charge density of around mid 10 10 cm −2 (either positive or negative), an interface trap density in the range of low 10 11 to less than 1×10 10 cm −2 eV −1 and a small hysteresis induced by slow trap effect. In contrast, the p-type interface is always characterized by a high density of interface traps which leads to low-frequency-type C– V curves even at 1 MHz.

Investigation of epitaxial P-p CdTe/Hg0.775Cd0.225Te heterojunctions by capacitance-voltage profiling

We investigate the electrical properties of isotype P-p CdTe/Hg0.775Cd0.225Te heterojunctions grown in situ by the metalorganic chemical vapor deposition technique. The capacitance-voltage (C-V) characterization of Schottky barriers (SB) is used to study the apparent majority carrier distribution and the valence band discontinuity. The C-V characteristics of metal insulator semiconductor (MIS) devices were used to determine the interface charge density. A theoretical model suitable for analysis of graded heterojunctions was developed based on the numerical solution of Poisson’s equation. The model includes an approximate description of the conduction band nonparabolicity and carrier degeneracy. We describe the procedures used in crystal growth and device fabrication for both SB and MIS structures. We demonstrated, on the basis of experimental measurements and theoretical analysis, that the valence band discontinuity in the devices studied here was 0.15 ± 0.05 eV and the fixed interface charge density was approximately (3 ± 1) · 1010 cm-2. Also, we observed a dependence of the C-V measurements on temperature which seems to be caused by either interface traps or carrier inversion at the CdTe/HgCdTe interface.

Analysis of surface leakage currents due to Zener tunnelling in HgCdTe photovoltaic diodes

A model is presented to calculate the surface leakage currents due to Zener tunnelling in n+-p mercury cadmium telluride (MCT) photovoltaic (PV) diodes. The expressions describing the effect of fixed interface charge density (Qf) on zero-bias resistance-area product (R0A) are developed for situations where the interface charges due to passivant accumulate the MCT surface. Calculations for detectors with 9.55, 10.60 and 11.55 mu m cut-off wavelengths operating at liquid-nitrogen temperature show that I-V characteristics, and thus R0A products, of these diodes have a strong dependence on Qf. For example, on p-type MCT, with carrier concentration (NA) of up to 5*1016 cm-3, the passivant with Qf of greater than 3.2*1010 cm-2 would degrade the performance of these detectors significantly. The experimental results agree reasonably well up to moderate fields (i.e. up to 400-500 mV of reverse bias) with the predictions of this model.