Multi-chip Module Interconnect Research Articles

Metallization of High Purity Al2O3 Substrate with Autocatalytic NiP Thin Films for Au Interconnections in MCM packaging technology.

A Multichip Module (MCM) is a structure consisting of several ICs (typically bare chips) interconnected on a common supporting substrate and packaged as a single device. In this packaging technology, gold (Au) thin films are used as interconnection tracks terminated by wire bonding process to the chips. Thus, the good quality of theses Au films (for interconnects purpose) is essential. The present work proposes a metallization sequence of high purity (99.9%) and polished Al2O3 substrates, with an autocatalytic (electroless) NiP thin film follow by an electrolytic Au film in order to improve the MCM interconnections quality. The results show NiP and Au films with good adhesion, low roughness, good thickness distribution and optimal electrical properties, which allows us to establish a methodology that guarantees the reproducibility and quality of the Au interconnections in MCM devices.

Analytical modelling of microstrip-like interconnections in presence of ground plane aperture

High-speed multichip module interconnects are characterised by planar transmission lines. An interconnect line with ground plane aperture is essentially a microstrip line with partially removed ground plane below the line. The authors report the closed-form analytical expressions for line capacitance and characteristic impedance of microstrip interconnect line with a ground plane aperture. The expressions have been obtained using variational analysis combined with transverse transmission line technique. The closed-form expressions are general and are obtained for a range of structure parameters and the dielectric constants. Results are compared with finite-difference time-domain simulations and measurements performed on a vector network analyser. The proposed study can find applications in the design of high-speed interconnects for printed circuit boards, radio frequency (RF) and multichip module applications. These are particularly useful where high impedance lines are required.

The effect of corrosion on the performance of high speed multi-chip module interconnects

The effect of corrosion on the performance of high speed multi-chip module interconnects

Micro Heat Exchangers Consisting of Pin Arrays

Abstract The performance of micro heat exchangers fabricated on silicon wafers and consisting ofpin arrays and straight channels is evaluated theoretically using three-dimensional numerical simulations. The coolant is liquid nitrogen and the objective is to maintain the wafer’s temperature below 90K so as to facilitate the use of high temperature superconductor interconnects in multichip modules. Both developing and periodic flows are considered. Comparisons of the performance of various geometric configurations are presented It is demonstrated that by proper selection of the heat of the heat exchanger’s geometry, the thermal resistance can be minimized.

Accelerating capacitance computation for interconnects in high speed MCM by Padé approximation

The boundary element approach based on the dielectric Green function with Pade approximation is presented for the first time to compute the capacitance matrices for multiconductor interconnection lines in high speed multichip modules (MCMs). Numerical experiments show that this method is more efficient than those based on the total charge Green function.

Material design aspects of high reliability, high density interconnections

Material design aspects of high density interconnects in multichip modules (MCMs) generally concentrate on processing and bonding compatibility, maximum yield and cost effectiveness. Reliability and failure analysis investigations focus mainly on bonding and chip level problems. Only a few studies have dealt with reliability problems arising from the interconnection substrates themselves, and even less work has been devoted to obtaining feedback for the material design. However, the new or repeatedly ‘discovered’ material systems in MCMs need more detailed discussion. This paper concentrates on the material selection problem in order to minimize short circuit failure formation possibilities for various MCM interconnection substrates, chip bonding and packaging types, considering also processing compatibility and cost aspects as well.

High temperature superconducting resonators and switches: design, fabrication, and characterization

We report our recent efforts in designs of several RF and microwave devices using high temperature superconducting (HTS) thin film technology. Devices considered include transmission lines, resonators, switches, and phase shifters in microstrip, stripline and coplanar waveguide. The circuit design, modeling, simulation, fabrication, packaging, and testing are discussed. Using a two-dimensional (2-D) EM simulator, we have optimized the geometry of the RF microstrip and stripline resonators for frequencies near 900 MHz. An unloaded Q is obtained as high as 80,000, three orders of magnitude greater than the traditional 2-D gold or copper resonators with identical structures. On-wafer probe and bit-error rate measurements show that the HTS transmission lines have an extremely small insertion loss and dispersion; thus they are ideal candidates for applications in multichip module interconnects and delay lines. A sharp switching characteristic and an unusually strong RF power hysteresis loop have been observed in the HTS lines. This interesting behavior has been utilized for designs of new HTS microwave phase shifters. The use of HTS lines can substantially reduce the losses suffered by conventional PIN diode switches.

Design considerations and algorithms for partitioning optoelectronic multichip modules

There is considerable interest in the development of optical interconnects for multichip modules (MCM's) to improve their performance. For effective utilization of the optical and electronic technologies, a methodology for partitioning the system is required. The key question to be answered is which technology should be used for each interconnect in a given netlist: optical or electronic. We introduce the computer-aided design approach for partitioning optoelectronic systems into optoelectronic MCM's. We first discuss the design trade-off issues in an optoelectronic system design, including speed, power dissipation, area, and diffraction limits for free-space optics. We then define a formulation for optoelectronic MCM partitioning and describe new algorithms for optimizing this partitioning based on the minimization of the power dissipation. The models for the algorithms are discussed in detail, and an example of a multistage interconnect network is given. Different results, with the number and size of chips being variable, are presented in which improvement for the system packaging has been observed when the partitioning algorithms are applied.

Broadband modeling and transient analysis of MCM interconnections

In this paper, conductive losses of multi-chip module interconnections are analysed. A distributed network model for the conductor surface impedance is extended to include the transition from DC resistivity to high frequency losses and to cover the effect of barrier and adhesion layers. Using this model, a broadband loss expression is derived. This loss expression can be implemented in network simulators for transient analysis of lossy interconnections. The validity and applicability of the model is experimentally verified by comparison with measured S-parameters. Measurements extend from 45 MHz to 18 GHz. They are performed on test structures realised with two different MCM-D technologies. Excellent correspondence between measurements and simulations is achieved, even when magnetic effects of a thick nickel barrier layer are involved. The models are incorporated in the transient analysis network simulation program Transplus. Several simulation examples using Transplus are shown.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

High-performance MCM routing

The authors describe the multilayer MCM (multichip module) routing problem, and propose an approach for routing high-performance MCMs with the objective of minimizing interconnect delays and crosstalk. They first introduce an approach for rapidly estimating the time-domain response of lossy transmission line trees, and propose a realistic second-order delay model for MCM interconnects. The delay model is used to guide a performance-driven global routing algorithm. Given the 2-D global paths, the next stage is layer assignment. An effective algorithm for constrained layer assignment is developed. Based on the best-known maxcut approximation algorithm (which performs well in practice), a maximal k-color ordering is formulated for minimizing both interlayer and intralayer crosstalk as well as crossings in 3-D MCM substrates. The authors also propose a strategy that exhibits a good tradeoff between circuit performance and design cost, instead of concentrating exclusively on a single objective such as area minimization. >

Comparison of methods for determining the capacitance of planar transmission lines with application to multichip module characterization

The techiques for determining the capacitance of embedded interconnects in an MCM-D MCM (multichip module) are compared. The error is estimating this capacitance in generally the greatest contributor to the overall error in determining the impedance of interconnects and discontinuities. Using in situ calibration microwave characterization of various MCM interconnects fabricated using an alumina on polyimide MCM-D process is reported. >

Electrical characteristics of multichip module interconnects with perforated reference planes

A quasi-TEM (transverse electromagnetic) approach is demonstrated for the equivalent transmission line characterization of multichip-module (MCM) interconnects with perforated (mesh) reference planes. The proposed method can be used to obtain effective transmission line parameters for both single and coupled interconnects, which in turn can be used directly in SPICE-like waveform simulator tools for an overall electrical analysis of complex MCM interconnect nets. Comparisons with experimental results obtained from the literature, as well as results obtained from full-wave modeling of the interconnect structures, demonstrate the validity of the proposed approach and help define the frequency range of its accuracy. >

Finite-difference time-domain analysis of pulse propagation in multichip module interconnects

The application of the finite-difference-time-domain (FDTD) method to the electromagnetic characterization of multichip-module (MCM) interconnects with perforated (mesh) reference planes is demonstrated. The limitations of the method in finding transmission line propagation characteristics (i.e., characteristic impedance Z/sub 0/ and phase constant beta ) are investigated. An alternative approach for the characterization of MCM interconnects which exploits the capabilities of the FDTD method is suggested. This alternative approach uses the results from the FDTD method to extract the per unit length delay and approximate impulse response of the system. These results can be used to identify the effects of the perforated reference plane on signal propagation. The validity of the TEM approximation for signal propagation in realistic MCM structures is also examined. >

Laser direct writing of copper on various thin-film substrate materials

Laser direct writing of copper from dried-on copper formate films on Al 2O 3, AlN, polyimide and aluminum is described. Writing speeds of 1 to 50 mm/s, and a laser power of up to 2 W have been used. On polyimide, argon laser writing is the preferred method. It is shown that multichip module interconnections may be written successfully with this method.