Interconnect Routing Research Articles

Tipping points, multistability, and stochasticity in a two-dimensional traffic network dynamics

Mitigating traffic jams is a critical step for the betterment of the urban transportation system, which comprises a large number of interconnected routes to form an intricate network. To understand distinct features of vehicular traffic flow on a network, a macroscopic two-dimensional traffic network model is proposed incorporating intra-nodal and inter-nodal vehicular interaction. Utilizing the popular techniques of nonlinear dynamics, we investigate the impact of different parameters like occupancy, entry rates, and exit rates of vehicles. The existence of saddle-node, Hopf, homoclinic, Bogdanov–Takens, and cusp bifurcations have been shown using single or biparametric bifurcation diagrams. The occurrences of different multistability (bistability/tristability) phenomena, stochastic switching, and critical transitions are explored in detail. Further, we calculate the possibility of achieving each alternative state using the basin stability metric to characterize multistability. In addition, critical transitions from free flow to congestion are identified at different magnitudes of stochastic fluctuations. The applicability of critical slowing down based generic indicators, e.g., variance, lag-1 autocorrelation, skewness, kurtosis, and conditional heteroskedasticity are investigated to forewarn the critical transition from free flow to traffic congestion. It is demonstrated through the use of simulated data that not all of the measures exhibit sensitivity to rapid phase transitions in traffic flow. Our study reveals that traffic congestion emerges because of either bifurcation or stochasticity. The result provided in this study may serve as a paradigm to understand the qualitative behavior of traffic jams and to explore the tipping mechanisms occurring in transport phenomena.

Spatial Optimization for Energy Island Location and Cable Routing Considering Offshore Zoning

The energy hub concept presents a compelling opportunity to channel electricity from offshore wind farms to the grid, facilitating cross-border energy trading and conversion. However, one of the main challenges lies in the strategic identification of a suitable energy island location and the establishment of an interconnected cable routing path. Part of the complexity arises from the need to navigate offshore zoning regulations and accommodate various spatial uses within the offshore area. This paper exhibits a case study to explore the spatial optimization for a potential offshore energy hub in the North Sea. It aims at finding out an optimal spatial configuration of the offshore energy hub, such that the island location and the associated cable routing do not infringe upon keep-out zones while strategically positioning the hub closer to high-capacity wind farms. To achieve this goal, detailed geographical data incorporating offshore zoning information is leveraged for spatial optimization. The Dijkstra’s algorithm is then applied to identify the optimal island location and cable routing path. The effectiveness of this spatial optimization methodology is demonstrated through a case study involving offshore wind farm sites in the North Sea. Given the real geographical data, simulation results underscore the efficacy of the Dijkstra’s algorithm in determining the optimal energy hub layout. In particular, an optimal spatial design is achieved, based on cable lengths, asset capacities, offshore zoning and island/platform location for a potential offshore energy hub in the North Sea while ensuring compliance with keep-out zoning regulations.

Road network model in Thailand for highly efficient transportation

This research presents a comprehensive model for enhancing the road network in Thailand to achieve high efficiency in transportation. The objective is to develop a systematic approach for categorizing roads that aligns with usage demands and responsible agencies. This alignment facilitates the creation of interconnected routes, which ensure clear responsibility demarcation and foster efficient budget allocation for road maintenance. The findings suggest that a well-structured road network, combined with advanced information and communication technology, can significantly enhance the economic competitiveness of Thailand. This model not only proposes a framework for effective road classification but also outlines strategic initiatives for leveraging technology to achieve transportation efficiency and safety.

Investigation of Aluminum and Gold Flip-Chip Bonding for Quantum Device Integration

The majority of qubit chip integration is realized in a two-dimensional (2D) architecture. Whereas 3D architecture enables more advantages like efficient interconnect routing, allowing for more compact qubit coupling geometries, reducing form factor, and increased connectivity beyond nearest-neighbor interactions. Flipchip (FC) assembly has been demonstrated to enable 3D architecture connecting qubit chip, interposer, and readout in a sandwich-like structure. Moreover, 3D integration allows the fabrication of hosting chip circuitry without degrading the qubit performance [1–4]. Different material considerations have to be taken into account since qubit operational frequency is in the gigahertz range and operating temperature is in the mK range to avoid thermal excitation. Materials that possess superconducting characteristics like Indium (In), Titanium Nitride (TiN), Tantalum Nitride (TaN), and Niobium (Nb) have been discussed as potential interconnect between building blocks [3, 5]. The In bumping on Aluminum (Al) redistribution layers require under-bump metallization (UBM) layers thus introducing multiple fabrication steps before the bonding process. An alternative approach would be to use the existing Al surface to electrochemically grow Al bumps and bond the chip using thermosonic bonding (TSB) at below 150°C to form a homogeneous metal-metal interface [6, 7].

Biomass as an alternative feedstock to oleochemicals.

The huge demands for petrochemicals have led to a rapid increase in the production of these fossil-based derivatives. Biomass represents a promising feedstock for addressing the challenges related to petrochemicals in terms of the necessity to apply renewable sources and the need to decrease carbon emissions. Among the natural biomass products, most studies have attempted to upgrade natural oils owing to their promising advantages of worldwide availability, low-cost processing, and built-in functionality. This paper discusses the upgradation of natural oils to the most beneficial oleochemicals, including fatty acids, fatty alcohols, and fatty acid methyl esters. This review also covers the utility, physico-chemical properties, and the production processes for such materials. The interconnected reaction routes to produce oleochemicals and the affecting parameters (catalyst design, temperature, and pressure) are also elucidated. Furthermore, this article discusses the future perspective of oleochemicals based on their development in recent years.

Graph based routing algorithm for torus topology and its evaluation for the Angara interconnect

Several approaches and techniques exist to resolve load balancing problem in general and torus topology networks. Graph methods are natural ways to perform balancing of routing paths. A routing balancing algorithm must operate within the constraints of the underlying network architecture that limits several parameters, such as the number of logical paths in the network. In this paper, we consider a torus topology that is one of the common topologies that are used in high performance computing systems. We introduce a routing graph that corresponds to a interconnect topology, abstracts interconnect routing rules, providing one-to-one correspondence of network routes and graph paths. We propose a deadlock-free routing algorithm based on a fast single-source shortest path algorithm in a routing graph for the deterministic routing of a torus topology interconnect with a single virtual channel. The proposed algorithm is a tradeoff between two existing routing algorithms, also the algorithm is optimized for multidimensional torus topology and can be applied to any torus topology HPC system. We present a complete description of a routing graph that abstracts the Angara interconnect with 4D torus topology. We evaluated the proposed routing algorithm and benchmarked the maximum performance improvement of 71% for the Alltoall pattern for torus topology systems up to 432 nodes on the Angara interconnect simulator. The performance improvement of more than 5% was obtained for the NPB FT and IS application kernels on a 32-node supercomputer.

Bismuth nanoparticles confined in multi-walled carbon nanotubes toward enhanced sodium storage anodes

Bismuth (Bi) as alloying-type anode has aroused extensive attention because of its high theoretical specific capacity and suitable working voltage. However, it is subjected to enormous volume expansion due to the alloying/dealloying reaction, which leads to rapid capacity decay. In this work, the confined Bi nanoparticles (NPs) embedded in multi-walled carbon nanotubes (Bi/MWCNTs) are proposed as sodium storage anodes. The confined structure design effectively enhances the structural stability of Bi anode materials for sodium-ion batteries. MWCNTs can provide an elastic space to alleviate the volumetric change of Bi anode, thus enhancing cyclic stability. Additionally, the MWCNTs shells boost the electronic conductivity and provide interconnection routes to accelerate the charge transport and Na+ ions diffusion, and improve interface reaction kinetics, which further enhances the rate capability of Bi/MWCNTs anode. Therefore, it delivers a high reversible specific capacity of 361.6 mA h g−1 and retains the capacity retention of 89.2 % at 0.1 A g−1 after 500 cycles. Moreover, it shows remarkable long-term cyclic capability (219.2 mA h g−1 at 1 A g−1 over 1000 cycles), and excellent rate capability (220.1 and 173.4 mA h g−1 at 2 and 5 A g−1, respectively). This novel structural design strategy in alloying anodes is significantly benefiting to improve sodium storage properties.

Geospatial Approach to Route Optimisation for Security Architecture Improvement

Understanding the complexity of road networks is tiring, especially in finding the optimum routes for emergency response. Dynamic route optimisation is a decision-making process powered by mathematical models to formulate a strong basis for predicting the best path between any two points in a road network. Exploring the numerous interconnected routes in and out of a road network provides a strong foothold for securing lives and properties. This study presents the findings of route optimisation at the Federal University of Technology Minna, Gidan Kwano Campus. High Target Differential Global Positioning System receiver (DGPS), Handheld GPS (Garmin GPSmap 60Cx), Quick Bird Satellite Imagery, and Google Earth Images were used for data acquisition purposes. An ArcGIS network analyst for optimum route identification based on Dijktra’s algorithm was utilised for analysis. Five different optimisation tests were done and the optimised routes were compared with alternative routes from the network. The total travel distances for alternative and optimum routes are 11852.414 m and 16614.156 m respectively while the total travel times for alternative and optimum routes are 2135.35 s and 2993.25 s respectively. The study revealed all optimum routes are faster cumulatively by (11.7%) and are best for security and emergency responses. Ten unauthorised access roads to the campus were identified. The number of routes paving access to the campus shows that efforts towards ensuring security must be increased.

Highly conformable chip-in-foil implants for neural applications

Demands for neural interfaces around functionality, high spatial resolution, and longevity have recently increased. These requirements can be met with sophisticated silicon-based integrated circuits. Embedding miniaturized dice in flexible polymer substrates significantly improves their adaptation to the mechanical environment in the body, thus improving the systems’ structural biocompatibility and ability to cover larger areas of the brain. This work addresses the main challenges in developing a hybrid chip-in-foil neural implant. Assessments considered (1) the mechanical compliance to the recipient tissue that allows a long-term application and (2) the suitable design that allows the implant’s scaling and modular adaptation of chip arrangement. Finite element model studies were performed to identify design rules regarding die geometry, interconnect routing, and positions for contact pads on dice. Providing edge fillets in the die base shape proved an effective measure to improve die-substrate integrity and increase the area available for contact pads. Furthermore, routing of interconnects in the immediate vicinity of die corners should be avoided, as the substrate in these areas is prone to mechanical stress concentration. Contact pads on dice should be placed with a clearance from the die rim to avoid delamination when the implant conforms to a curvilinear body. A microfabrication process was developed to transfer, align, and electrically interconnect multiple dice into conformable polyimide-based substrates. The process enabled arbitrary die shape and size over independent target positions on the conformable substrate based on the die position on the fabrication wafer.

Low-complex resource mapping heuristics for mobile and iot workloads on NoC-HMPSoC architecture

Network-on-chip-based heterogeneous multiprocessor system-on-a chip (NoC-HMPSoC) a single board computer is extensively utilized in many real-time applications such as mobile edge computing (MEC), cyber-physical systems, smart phones, driverless vehicles, and real-time embedded systems due to its flexible communication architecture, switching network, excellent performance, and energy efficiency. Despite its benefits, task scheduling and appropriate resource allocation is still an non-polynomial hard problem. NoC-HMPSoC includes heterogeneous processors along with interconnected communication routing structure which creates more complexity in task and resource scheduling. In this paper, a new task classification and low-complex resource mapping heuristics are developed to deal with mixed-critical workloads execution targeted on NoC-HMPSoC architecture. MethodologyTo minimize runtime scheduling cost, the deadline-based task classification (DBTC) heuristic divides the workload into three distinct classes depending on their deadline and inter-arrival limitations. The mixed-integer linear programming (MILP) statistical model, which improved task miss ratio with greater time complexity, is used to schedule the categorized task sets. Static resource mapping (SRM) and load-based dynamic resource mapping (LBDRM) heuristics are created to allocate mixed-critical activities into NoC-HMPSoC in order to overcome this. The suggested framework is a list-based scheduler that processes tasks on an unchanging processor using the SRM algorithm and prioritizes them depending on the tasks' earliest finish times. The LBDRM technique is then used to dynamically reallocate mixed-critical task groups among heterogeneous processors based on the load factor and task utilization factor. The time complexity of DBTC algorithm is O(log n) where 'n' is the task nodes, and the time complexity of the proposed scheduling heuristics are O(n2 * m) for larger graphs. The proposed framework performs classification, mapping, and scheduling in an integrated manner that is experimentally evaluated on the Samsung Exynos 5422 NoC-HMPSoC and Intel Xeon cloud server for E3S sysmark mobile benchmark workloads. Averagely 65%, 33%, is improved in execution time reduction and 45%, 36% reduction in energy consumption and 56%, 32% than JRFS-HRFS and ARSH-FATI methods.

A three-dimensional interconnected molybdenum disulfide/multi-walled carbon nanotubes cathode with enlarged interlayer spacing for aqueous zinc-ion storage

Layered molybdenum disulfide (MoS2) shows tremendous prospect as cathode material for aqueous zinc-ion batteries (AZIBs) due to the two-dimensional zinc ions (Zn2+) diffusion channels and tunable interlayer spacing. However, it is subjected to sluggish insertion/extraction kinetics, inferior electronic conductivity and inadequate active capacities. Herein, a three-dimensional (3D) interconnected MoS2/multi-walled carbon nanotubes (MWCNTs) framework is proposed to address these issues. Importantly, the MWCNTs cores offer interconnection routes for fast electrons and zinc ions transport, the expanded spacing of MoS2 interlayer with 1.05 nm can facilitate rapid Zn2+ intercalation/extraction, and the confined MoS2 layers in inner MWCNTs can mitigate the agglomeration and restacking of MoS2 nanosheets. Benefitting from the confined structural configuration, sufficient active surface and 3D structural stability, the MoS2/MWCNTs as AZIBs cathode delivers a large initial reversible capacity of 218.3 mAh/g and high coulombic efficiency of 78.2 % at 0.1 A/g. Additionally, the 3D interconnected cathode maintains nearly intact structure after a fierce galvanostatic charge/discharge process, resulting in large retained capacities of 126.3 mAh/g at 1 A/g after 650 cycles and 101.1 mAh/g at 3 A/g after 1000 cycles. This work offers a novel strategy for the structure design of two-dimensional materials to develop high-performance cathodes for AZIBs.

Using Discrete Event Simulation to Muck Development Planning in Underground Mining

In underground mining operations around the world, planning for muck removal has become a big problem. Therefore, it realizes a discrete event simulation analysis of a system of four interconnected mines that use the same routes between them. The results of the analysis make it possible to evaluate the congestion presented at specific points along an interconnection route between equipment and activities. Therefore, it is concluded that it is important to have specific places for the removal of debris because these can cause the completion date of the project to be delayed.

Design of Interconnected Warehouse and Routing Optimization by BP Genetic Neural Network Algorithm

With the continuous progress of the chemical industry, warehouse design needs to be diversified on account of the increasing complex and multitudinous perilous chemicals. In this situation, this study projects the conception of the interconnected warehouse. By taking the storage points as the quantity and the path as the variable, this study establishes a quadratic allocation model on the operations of this novel kind of warehouse. Then, an improved neural network algorithm is proposed to ascertain the optimal solution. The innovation of this study is that it releases the space resources of the classic dangerous goods warehouse and improves the operational efficiency of the dangerous goods warehouse under the premise of ensuring safety. Finally, the proposed model and algorithm is tested and verified with a data of Shanghai Lingang dangerous Material Warehouse. The empirical research demonstrates that the interconnected warehouse has ideal performance for lifting the handling efficiency on the basis of ensuring safety.

Thermal Performance Analysis of Mempool RISC-V Multicore SoC

The presence of multiple cores in modern multicore architectures makes thermal management and temperature estimation a really challenging task for enhancing reliability and lifespan. Due to the presence of many cores, the core/tile spacing needs to be optimized in order to enhance the thermal coupling between interconnect routing blocks and active tiles. In addition, the tiles activity patterns under partial workload conditions significantly affect the maximum on-chip temperature which results in nonuniform temperature distribution. This is due to poor thermal coupling between neighboring tiles owing to the decrease in spacing between cores. In this article, we investigate the thermal performance analysis of a 256-core (i.e., 64 tiles) Mempool reduced instruction set computer (RISC) V-based architecture considering the impact of inter tiles spacing. Simulation results reveal that lateral heat spreading predominantly affects the thermal performance in multicore architectures under partial workload conditions. We also optimize the thermal performance with different tiles activity pattern. Simulation results reveal that both the maximum on-chip temperature and lateral heat spreading are improved for specific tiles activity patterns. Also the thermal performance analysis considering the “tile-insite effect” reveals that there is little impact on on-chip maximum temperature ( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$T_{\text {max}}$ </tex-math></inline-formula> ), but the on-chip thermal gradient ( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\Delta T$ </tex-math></inline-formula> ) and the thermal profile pattern are predominantly affected. Finally, the effect of the secondary heat path toward printed circuit board (PCB) is studied in this work.

Assessment of Surface Transportation Security Training Needs and Delivery Preferences

America’s surface transportation system features long and inter-connected routes and open access to stations and vehicles, making the system vulnerable to terrorist attack. While a variety of security-related training products exist for the transportation sector, government and other reports have called for improvements in the transportation security training curriculum in terms of quality and consistency. At the same time, tight economic times have left few extra financial resources available for systems to deliver adequate training to employees. This study assessed the needs for additional security training through focus groups and interviews with representatives of major surface transportation stakeholders and agencies. Training content needs and the approaches that will most effectively implement training in the field are identified. The results are intended to inform those responsible for supporting, developing, or implementing security training about where gaps may exist and about which delivery mechanisms are preferred and most workable.

Mesh of Trees FPGA Architecture: Exploration and Optimization

The design of large devices suggests fundamental and efficient innovation in the field programmable gate array (FPGA) interconnect structure to improve power consumption, density, and performance. Mesh-based FPGA architectures are generally designed to maximize logic utilization and to ensure layout scalability whereas tree-based FPGA architectures are designed to increase interconnect utilization. In this article, we propose a new mesh of trees (MoTs) FPGA architecture where we try to benefit from mesh of clusters (MoCs) FPGA layout scalability and tree-based FPGA efficient intracluster interconnect utilization, thanks to the butterfly fat-tree (BFT) topology. In order to attain the efficient use of the proposed routing interconnect resources, we develop computer-aided design (CAD) tools that respond to the target MoTs FPGA features. In addition, we define the power, area, and delay metric models according to the proposed architecture criteria. The experimentation results show that MoTs architecture with a cluster arity 32 offers the best tradeoff between power, area, and delay. Furthermore, we conduct a comparison between MoTs and MoCs FPGAs in general and the best MoTs and MoCs solutions, which ensure the best tradeoff between power, area, and delay in particular. The results show that the best MoTs architecture reduces power, area, delay, and energy by an average of 29%, 6%, 40%, and 47%, respectively, in comparison with the best MoCs architecture.

Low-Loss Silicon Photonic 16 × 16 Cyclic AWGR Based on SOI Platform

We experimentally demonstrate a low-loss and low-crosstalk 16-channel 200 GHz-channel-spacing arrayed waveguide grating router (AWGR) with a size of 0.67 × 0.37 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> , targeting for C-band wavelength division multiplexing (WDM) interconnect routing applications. As a result, the AWGR features a channel spacing of 200±10 GHz, a free spectral range of 25.62 nm and a 3 dB channel bandwidth of 0.9 nm. Based on comprehensive optimal design, the measured characterization revealed 5.55 dB maximum channel loss non-uniformity with 1.13 dB best-case channel insertion loss. Besides, the fabricated device exhibits good cyclic-frequency operation for all 16 × 16 port combinations with channel crosstalk of –15.11 dB.

Temperature and wavelength drift tolerant WDM transmission and routing in on-chip silicon photonic interconnects.

We demonstrate a temperature and wavelength shift resilient silicon transmission and routing interconnect system suitable for multi-socket interconnects, utilizing a dual-strategy CLIPP feedback circuitry that safeguards the operating point of the constituent photonic building blocks along the entire on-chip transmission-multiplexing-routing chain. The control circuit leverages a novel control power-independent and calibration-free locking strategy that exploits the 2nd derivative of ring resonator modulators (RMs) transfer function to lock them close to the point of minimum transmission penalty. The system performance was evaluated on an integrated Silicon Photonics 2-socket demonstrator, enforcing control over a chain of RM-MUX-AWGR resonant structures and stressed against thermal and wavelength shift perturbations. The thermal and wavelength stress tests ranged from 27°C to 36°C and 1309.90 nm to 1310.85 nm and revealed average eye diagrams Q-factor values of 5.8 and 5.9 respectively, validating the system robustness to unstable environments and fabrication variations.

Thermo-reliability of PVD Cr/Au on sapphire substrates for high-temperature sensors

Thermo-reliability of physical vapor deposition (PVD) Cr/Au on sapphire substrates was systematically investigated to improve the routing interconnection for high-temperature sensors. Cr and Au films were sequentially deposited on sapphire through magnetron sputtering. Samples with various Au layer thicknesses were subjected to annealing experiments at different temperatures and times. The temperature and processing time affected the dimension of Au particles and changed the surface roughness. With the increase in the temperature and treatment time, the agglomeration of Au particles increased, and the diameter enlarged substantially. Furthermore, the agglomeration effect is enhanced with the increase in the Au film thickness. However, the annealing time under the same temperature had a limited effect on the resistance. All the samples exhibited a low resistance at 700 °C. Moreover, compared with 100/500 nm Cr/Au films, the resistance of 100/1000 nm Cr/Au films slightly changed before and after annealing at 500 °C. Thus, thermo-reliability of PVD Cr/Au was beneficial for high-temperature sensors. The results of this study provided theoretical support for the practical applications of Cr/Au films.

GIS- and ICPR-Based Approach to Sustainable Urban Drainage Practices: Case Study of a Development Site in Florida

Stormwater control is an urgent concern in cities where the increased impervious surface has disrupted natural hydrology, particularly causing a reduction in groundwater recharge which is the source of potable water supply for many communities. Water managers are increasingly turning towards infiltration-based stormwater management options (ISMOs) to help minimize flooding and mitigate the impact of urbanization on the local hydrologic systems. This paper offers a unique hydrologic and hydraulic (H&amp;H) modeling approach using the Geographic Information System (GIS) and Interconnected Pond and Channel Routing (ICPR) software to help quantify the associated flood stage and groundwater recharge benefits of using ISMOs. The proposed approach incorporated ICPR percolation links and utilization of the curve number and Green-Ampt infiltration methods into the case study design, as well as an analysis of the effectiveness of including low-impact development practices. This analysis shows a 13–36% reduction in stormwater volume leaving the proposed site when percolation links were utilized to account for percolation from the proposed ISMOs. These reduction provides an indirect estimate of groundwater recharge benefits. The conversion from impervious parking to a pervious one and inclusion of rainwater harvesting from the roof area resulted in a further reduction in peak stages ranging from 1.20 to 7.62 cm.