The design of the Clock, Test and Maintenance (CTM) control chip for an IBM ES/9221 microprocessor is presented in this paper. This CTM chip provides all functions to run built-in random pattern selftest and a Boundary Scan Chip Interconnection test besides supporting the normal mode of functional operation. In addition it allows to initialize and monitor all system latches during functional and test mode. All chips of the system are accessed from the CTM chip via a Test Access Bus (TAB).