Intel Xeon Phi Knights Landing Research Articles

New polyhedral discretisation methods applied to the Richards equation: CDO schemes in Code_Saturne

This paper shows an application of a vertex-based Compatible Discrete Operator (CDO) scheme to simulate the Richards equation on meshes using polyhedral cells. Second order spatial accuracy is reached for a verification test case using two meshes made of different types of polyhedral cells. A second validation test case dealing with a variably saturated soil inside a vertical column has been simulated, with three advected passive pollutants being released. Results are in good agreement with the reference for both types of mesh. MPI scalability has also been assessed at scale up to 98,304 cores of a Cray X30 for a 1.7 B cell mesh for the simulation of the aforementioned case, and nearly linear speed-up is observed. Finally the implementation of hybrid MPI-OpenMP has been tested on 2 types of Intel Xeon Phi Knights Landing co-processors, showing that the best configuration for the code is obtained when all the physical cores are filled by MPI tasks and the 4 hyperthreads by OpenMP threads.

Long-time simulations with complex code using multiple nodes of Intel Xeon Phi Knights Landing

Abstract Modern partial differential equation (PDE) models across scientific disciplines require sophisticated numerical methods resulting in complex codes as well as large numbers of simulations for analysis like parameter studies and uncertainty quantification. To evaluate the behavior of the model for sufficiently long times, for instance, to compare to laboratory time scales, often requires long-time simulations with small time steps and high mesh resolutions. This motivates the need for very efficient numerical methods and the use of parallel computing on the most recent modern architectures. We use complex code resulting from a PDE model of calcium dynamics in a heart cell to analyze the performance of the recently released Intel Xeon Phi Knights Landing (KNL). The KNL is a second-generation many-integrated-core (MIC) processor released in 2016 with a theoretical peak performance of over 3 TFLOP/s of double-precision floating-point operations for which complex codes can be easily ported because of the x86 compatibility of each KNL core. We demonstrate the benefit of hybrid MPI+OpenMP code when implemented effectively and run efficiently on the KNL including on multiple KNL nodes. For multi-KNL runs for our sample code, it is shown to be optimal to use all cores of each KNL, one MPI process on every other tile, and only two of the maximum of four threads per core.

Wilson and Domainwall Kernels on Oakforest-PACS

We report the performance of Wilson and Domainwall Kernels on a new Intel Xeon Phi Knights Landing based machine named Oakforest-PACS, which is co-hosted by University of Tokyo and Tsukuba University and is currently fastest in Japan. This machine uses Intel Omni-Path for the internode network. We compare performance with several types of implementation including that makes use of the Grid library. The code is incorporated with the code set Bridge++.

Analysis of the ParConnect algorithm ran on Intel Xeon Phi Knights Landing

Abstract Huge volume of data and high data complexity are the main challenges in metagenomic assembly. Therefore, Patrick Flick et al. present a novel highly-scalable distributed-memory parallel algorithm (ParConnect) to find connected subgraphs. Their approach to this subject leads to the well-studied problem of finding weakly connected components in a de Bruijn graph, which is used to represent overlaps between sequences of symbols. At the Student Cluster Competition 2016 (SCC 2016), we reproduced the results of their paper on an Intel Xeon Phi Knights Landing cluster and analyzed the share of communication time compared to the whole computation.

Performance Comparison of Intel Xeon Phi Knights Landing

Performance Comparison of Intel Xeon Phi Knights Landing

Performance and Scalability Study of FMM Kernels on Novel Multi- and Many-core Architectures

We provide efficient implementations of common Fast Multipole Method (FMM) tasks for modern multi-core (Intel Xeon Haswell), many-core (Intel Xeon Phi Knights Landing) and Nvidia Pascal GPUs, offering optimization guidelines for each kernel and architecture, and exposing task granularity issues with evaluations on performance and scalability. These results motivate the use of hybrid execution models for FMM in heterogeneous architectures, in which per-kernel execution configurations are set by the kernel adaptability to the processor.