Insulator Semiconductor High Electron Mobility Research Articles

Hetero dielectric based dual material gate AlGaN channel MISHEMT for enhanced electrical characteristics

Herein, we report an AlGaN channel metal insulator semiconductor high electron mobility transistor (MISHEMT) in dual material gate (DMG) architecture with two different dielectrics as gate insulator for enhancing the DC performance of the device. The use of a high-k dielectric material as gate insulator below gate metal 1 and a low-k dielectric below gate metal 2 results in significant threshold voltage variation along the channel. This contributes to improved average carrier velocity which in turn results in better current drive. The proposed device exhibits a peak current of 162 mA/mm at zero gate bias, whereas, the DMG and single material gate (SMG) AlGaN channel HEMTs offer currents of 137 mA/mm and 125 mA/mm respectively. The peak transconductances are about 24.66 mS/mm, 23.68 mS/mm and 22.71 mS/mm respectively for the proposed device, DMG and SMG HEMTs. The proposed device reduces the OFF current by an order of 106 compared to that of DMG HEMT.

Reduced trap state density in AlGaN/GaN HEMTs with low-temperature CVD-grown BN gate dielectric

In this Letter, low-temperature (400 °C) chemical vapor deposition-grown boron nitride (BN) was investigated as the gate dielectric for AlGaN/GaN metal–insulator–semiconductor high electron mobility transistors (MISHEMTs) on a Si substrate. Comprehensive characterizations using x-ray photoelectron spectroscopy, reflection electron energy loss spectroscopy, atomic force microscope, high-resolution transmission electron microscopy, and time-of-flight secondary ion mass spectrometry were conducted to analyze the deposited BN dielectric. Compared with conventional Schottky-gate HEMTs, the MISHEMTs exhibited significantly enhanced performance with 3 orders of magnitude lower reverse gate leakage current, a lower off-state current of 1 × 10−7 mA/mm, a higher on/off current ratio of 108, and lower on-resistance of 5.40 Ω mm. The frequency-dependent conductance measurement was performed to analyze the BN/HEMT interface, unveiling a low interface trap state density (Dit) on the order of 5 × 1011–6 × 1011 cm−2 eV−1. This work shows the effectiveness of low-temperature BN dielectrics and their potential for advancing GaN MISHEMTs toward high-performance power and RF electronics applications.

Non-equilibrium thermal transport study in steady state GaN MISHEMT channel layer based on electron Monte Carlo and phonon BTE

An electro-thermal coupling simulator for GaN devices based on electron Monte Carlo (e-MC) simulations is established. Taking GaN Metal Insulator Semiconductor High Electron Mobility Transistor (MISHEMT) as example, the non-equilibrium thermal transport processes of self-heating effect in the channel layer are studied. This simulator is mainly coupled by e-MC and the phonon Boltzmann transport equation (pBTE), physical property parameters and electric field parameters are provided by first-principles and Technology Computer Aided Design (TCAD), respectively. We first verify the e-MC program by calculating the electron transport properties of GaN materials, verify the feasibility of the established GaN MISHEMT model by using TCAD and obtained its operating characteristics. Further, the simulator is used to evaluate the non-equilibrium processes inside the channel layer in detail, the results show that there is significant consistency in the peak positions of electric field strength, heat generation and diffusion temperature, the diffusion temperature peak occurs at the secondary peak of heat generation. The frequency distribution of phonon emission under different drain-source bias voltages is revealed by phonon emission spectrum analysis. The strength of the non-equilibrium effect is measured by effective temperature. Increasing the drain-source bias voltage will significantly increase the peak temperature of hotspot and further enhance the non-equilibrium effect. Our study reports an efficient scheme for electro-thermal simulations of GaN MISHEMT, which provides insights for thermal management of GaN-based transistor devices.

Improved breakdown performance in recessed-gate normally off GaN MIS-HEMTs by regrown fishbone trench

This work develops a regrown fishbone trench (RFT) structure in selective area growth (SAG) technique to fabricate recessed-gate normally off GaN metal–insulator–semiconductor high electron mobility transistors (MIS-HEMTs). The RFT structure effectively modulates the electric field at high drain and gate biases, thus allowing the device to feature improved off-state and gate breakdown performance with a high positive Vth of 2 V. The simulated carrier concentration and electric field distributions reveal the mechanism of electric field weakening by RFT architecture. Meanwhile, the current collapse phenomenon is significantly suppressed, and the gate voltage swing is also enlarged. The maximum gate drive voltage of 9.2 V for 10-year reliability of RFT GaN MIS-HEMT, together with the improved linearity and block voltage, broadens the applications of SAG devices. Furthermore, the RFT structure also provides an etching-free method for fabricating normally off GaN MIS-HEMTs with multi-dimensional gates.

MISHEMT intrinsic voltage gain under multiple channel output characteristics

In this paper the MISHEMT device (metal/Si3N4/AlGaN/AlN/GaN - metal–insulator–semiconductor high electron mobility transistor) is studied focusing mainly on the impact of the multiple conductions on the intrinsic voltage gain (A v). It is shown that the total drain current is composed of three different drain current components, whereof one is related to the MIS channel and the other two are related to high electron mobility transistor (HEMT) channels. The device output characteristics present double drain voltage saturation that gives rise to a double plateau in the saturation region of the output characteristics. This behavior relies also on the gate voltage, so the output characteristics and analog parameters extraction are bias dependent. The intrinsic voltage gain increases thanks to the early voltage increment in the second plateau where HEMT conduction is dominant. Electron concentration profiles were simulated in order to investigate the device saturation regime.

Interface charge engineering on an in situ SiNx/AlGaN/GaN platform for normally off GaN MIS-HEMTs with improved breakdown performance

This work adopts interface charge engineering to fabricate normally off metal–insulator–semiconductor high electron mobility transistors (MIS-HEMTs) on an in situ SiNx/AlGaN/GaN platform using an in situ O3 treatment performed in the atomic layer deposition system. The combination of in situ SiNx passivation and an O3-treated Al2O3/AlGaN gate interface allows the device to provide an excellent breakdown voltage of 1498 V at a low specific on-resistance of 2.02 mΩ cm2. The threshold voltage is increased by 2 V by significantly compensating the net polarization charges by more than five times with O3 treatment as well as reducing the interface traps and improving the high-temperature gate stability. Furthermore, a physical model of fixed charges at the Al2O3/AlGaN interface is established based on dielectric thickness-dependent linear fitting and numerical calculations. The matched device performance and simulated energy band bending elucidate the O3-treated fixed-charge modulation mechanism, providing a practical method for producing normally off GaN MIS-HEMTs.

(Digital Presentation) Analysis of MIS-HEMT Kink Effect in Saturation Region

The High Electron Mobility Transistor (HEMT) has been widely used in the field of power electronics and high frequency operation since 1983 (1), while presenting a simple circuit design for analog applications (2, 3), and for extreme harsh environments as well (3, 4). However, HEMTs presents a problem with gate leakage and current collapse which can be solved by introducing an insulator between the gate and semiconductor while maintaining the high performance, hence the Metal Insulator Semiconductor High Electron Mobility Transistor (MIS-HEMT) appears as a solution. The AlGaN/GaN heterostructures forms, at the interface, a sheet with high electron density (2DEG – 2 Dimension Electron Gas), which also presents a high electron mobility. The MIS structure presents a well know conduction between source and drain. As a result, the MIS-HEMT device presents multiple conductions. The focus of this work is to study how the multiple conductions of the MIS-HEMT impact on the output characteristics.The studied devices are, a MIS-HEMT with the gate insulator composed of a 2 nm Si3N4, and a GaN MOSFET of 25 nm of Al2O3 as the gate insulator, both devices were fabricated at imec Leuven – Belgium, and have the same dimensions: gate width of 5 µm and gate length of 600 nm. Their respective schematics are presented at figure 1.The drain current (IDS) as a function of drain voltage (VDS) for a MIS-HEMT (left) and GaN MOSFET (right) with multiple overdrive voltage (VGT) is presented in figure 2. The VDS ranges for these devices are different because they have different saturation points, although it is possible to notice that the MIS-HEMT shows greater current drive when compared to MOSFET considering the same VDS, which is likely due to the formation of the 2DEG as the main conducting mechanism in the MIS-HEMT.Previous works (5 – 8) showed that the MIS-HEMT have multiple conduction mechanisms dependent on VGT, and figure 3 shows the effect of those multiple conductions on the output current of the device where it is very likely that one of those conductions have different VDS sat. It is possible to notice higher values of IDS with increasing VGT, as expected. However, for high enough VGT, there is an anomalous IDS increase (kink) in the saturation region, that occurs due to the different conduction mechanism (MOS and HEMT conductions). This effect will be called as MIS-HEMT kink effect (MH kink effect). This MH Kink effect occurs when the HEMT conduction mechanism overcomes the MOS conduction.The output conductance (gD) as a function of VDS for the MOSFET is presented in figure 4. Figure 5 shows gD as a function of VDS for multiple VGT for the MIS-HEMT, where it is possible to see a peak in the gD (in saturation region) shifting to the right for increasing VGT, caused by the MH kink effect.In order to better visualize, the VDS value for which the MH kink takes place, it is plotted as a function of VGT in figure 6. It is possible to see that as VGT increases, the MK kink effect shifts for higher VDS values, thanks to the higher electron density in 2DEG making the HEMT conduction less dependent on VDS. Figure 1

A 35 V–5 V monolithic integrated GaN-based DC–DC floating buck converter

The paper presents the development of a GaN DC–DC power converter with a pre-driver module and power device based on a monolithic integrated GaN E/D-mode metal–insulator–semiconductor high electron mobility transistors (MIS-HEMTs) platform. The pre-driver module with direct coupled field effect transistor logic circuit structure has been monolithically integrated with a GaN power transistor on a Si-based AlGaN/GaN commercial epitaxial wafer. The MIS-HEMTs structure adopts an insulated gate dielectric layer to suppress the leakage current and increase gate voltage robustness. The GaN-based floating buck converter employs a 1 mH inductor and a 9 μF capacitor to achieve 35 V–5 V power conversion. As a result, the pre-driver module is capable of delivering a 10 V driving voltage. GaN monolithic integration of the pre-driver module and power device can reduce the system area in the DC–DC application, which allows for an integrated chip size of 1.8 mm2.

DC and RF performance of HR Si(111)-based AlGaN/GaN MIS-HEMT with a symmetrical multi-finger grid array structure for 5G N28 700MHz low-bias-control applications

HR Si(111)-based AlGaN/GaN metal insulator semiconductor high electron mobility transistor (MIS-HEMT) for 5G mobile communication at N28 700 MHz band is proposed in this paper. The device is ingeniously designed with a symmetrical dual-column multi-finger grid array structure. In addition, the device is designed with an MIS gate with a 6 nm SiN dielectric film to suppress the leakage current and a source field plate to suppress the current collapse effect. The fabrication process of the device is studied in detail, including the epitaxial surface treatment, F ion implantation isolation, ohmic contact, electron beam lithography gate process, surface passivation, and source field plate. A device with a gate length of 0.25 μm, gate-source space of 1 μm, a gate width of 1200 μm (the number of gate fingers is 12 with a single-finger gate width of 100 μm), and source field plate length of 0.2 μm is fabricated successfully. Results of electrical tests show that the HEMT device has a threshold voltage of about −7.5 V, a low knee voltage of about 4 V, a high saturation drain current density of 750 mA/mm, and a gate leakage current as low as less than 160 pA at the gate bias of 0 V. At the frequency band of 703–803 MHz, with low bias control of 10 V, the S21 of HEMT is about 5.923–7.261 dB, the gain flatness is 1.338 dB, the current gain is about 27.3 dB, and the stability factor is more than 1. This device would be a good candidate for future 5G low-frequency and low-voltage-control applications.

Deep sub-60 mV/dec subthreshold swing independent of gate bias sweep direction in an in situ SiN/Al0.6Ga0.4N/GaN-on-Si metal-insulator high electron mobility transistor

In this Letter, we demonstrated deep sub-60 mV/dec subthreshold swings (SS) independent of gate bias sweep direction in GaN-based metal–insulator–semiconductor high electron mobility transistors (MISHEMTs) with an Al0.6Ga0.4N/GaN heterostructure and in situ SiN as gate dielectric and surface passivation. Average SS values of 22 and 29 mV/dec over 3–4 orders of drain current (ID) swing were measured during forward and reverse sweeps, respectively, in a 75-nm gate length (LG) device. Sub-60 mV/dec SS was also observed in the GaN MISHEMTs with longer LG up to 350 nm. The intrinsic physical mechanisms of deep sub-60 mV/dec SS were comprehensively studied. The observed negative differential resistance in the gate current, the kinks in the output ID-VD curve, and the capacitance spike in the depletion region of the C–V curves suggest that the capture and emission of electrons in the traps are the dominant physical mechanisms responsible for the small SS.

Gate dielectric layer mitigated device degradation of AlGaN/GaN-based devices under proton irradiation

In this study, the simulations of AlGaN/GaN-based devices, including AlGaN/GaN high electron mobility transistor (HEMT), Al2O3 metal–oxide–semiconductor high electron mobility transistor (MOSHEMT), and SiNx metal–insulator–semiconductor high electron mobility transistor (MISHEMT), were studied to investigate the degradation mechanism after proton irradiation. The vacancies produced by proton irradiation, especially Ga vacancy (VGa), are found to be responsible for the device degradation by carrier removal and mobility degradation, which directly influence the saturation drain current and maximum transconductance of AlGaN/GaN-based devices. Furthermore, AlGaN/GaN HEMTs with gate dielectrics (Al2O3, SiNx) exhibit better irradiation resistance than traditional AlGaN/GaN HEMTs, which produce fewer vacancies at the channel after proton irradiation. Al2O3 MOSHEMTs also show better performance than SiNx MISHEMTs in resisting proton damage. Therefore, a high-quality dielectric layer is a key factor to improve the reliability of AlGaN/GaN-based devices after proton irradiation.

High-performance HZO/InAlN/GaN MISHEMTs for Ka-band application

This paper reports on the demonstration of microwave power performance at 30 GHz on InAlN/GaN metal–insulator–semiconductor high electron mobility transistor (MISHEMT) on silicon substrate by using the Hf0.5Zr0.5O2 (HZO) as a gate dielectric. Compared with Schottky gate HEMT, the MISHEMT with a gate length (L G) of 50 nm presents a significantly enhanced performance with an ON/OFF current ratio (I ON/I OFF) of 9.3 × 107, a subthreshold swing of 130 mV dec−1, a low drain-induced barrier lowing of 45 mV V−1, and a breakdown voltage of 35 V. RF characterizations reveal a current gain cutoff frequency (f T) of 155 GHz and a maximum oscillation frequency (f max) of 250 GHz, resulting in high (f T × f max)1/2 of 197 GHz and the record high Johnson’s figure-of-merit (JFOM = f T × BV) of 5.4 THz V among the reported GaN MISHEMTs on Si. The power performance at 30 GHz exhibits a maximum output power of 1.36 W mm−1, a maximum power gain of 12.3 dB, and a peak power-added efficiency of 21%, demonstrating the great potential of HZO/InAlN/GaN MISHEMTs for the Ka-band application.

Reliability, Applications and Challenges of GaN HEMT Technology for Modern Power Devices: A Review

A new generation of high-efficiency power devices is being developed using wide bandgap (WBG) semiconductors, like GaN and SiC, which are emerging as attractive alternatives to silicon. The recent interest in GaN has been piqued by its excellent material characteristics, including its high critical electric field, high saturation velocity, high electron mobility, and outstanding thermal stability. Therefore, the superior performance is represented by GaN-based high electron mobility transistor (HEMT) devices. They can perform at higher currents, voltages, temperatures, and frequencies, making them suitable devices for the next generation of high-efficiency power converter applications, including electric vehicles, phone chargers, renewable energy, and data centers. Thus, this review article will provide a basic overview of the various technological and scientific elements of the current GaN HEMTs technology. First, the present advancements in the GaN market and its primary application areas are briefly summarized. After that, the GaN is compared with other devices, and the GaN HEMT device’s operational material properties with different heterostructures are discussed. Then, the normally-off GaN HEMT technology with their different types are considered, especially on the recessed gate metal insulator semiconductor high electron mobility transistor (MISHEMT) and p-GaN. Hereafter, this review also discusses the reliability concerns of the GaN HEMT which are caused by trap effects like a drain, gate lag, and current collapse with numerous types of degradation. Eventually, the breakdown voltage of the GaN HEMT with some challenges has been studied.

Bias-Dependent Conduction-Induced Bimodal Weibull Distribution of the Time-Dependent Dielectric Breakdown in GaN MIS-HEMTs

In this article, we investigated the bimodal behavior in the Weibull distribution of time to breakdown during time-dependent dielectric breakdown (TDDB) measurement in GaN metal–insulator–semiconductor high electron mobility transistors (MIS-HEMTs) with Si3N4 gate insulator. We propose that the gate leakage current is a mixture mechanism of Poole–Frenkel (PF) emission and Fower–Nordheim (FN) tunneling current. The dominant mechanism of devices could shift from PF emission to FN tunneling when the stress bias is above a certain value, which is related to the properties of traps in the gate dielectric. The evolution of the leakage mechanism with stress bias leads to the deviation of the Weibull slope from the original one at low stress bias, where PF emission is the dominant one.

(Invited, Digital Presentation) High-κ Gate Oxide Integration and Ohmic Contact Development for AlGaN/GaN MISHEMTs

GaN based devices are one of the main candidates for current power electronics and RF applications [1,2]. For optimizing device performance, a detailed understanding of the defects contained in the material and the passivation capability of dielectric layers, i.e., the interfacial defect states formed, is mandatory. Here, we will focus on the surface defect passivation and gate leakage current reduction by introducing thin dielectric films as gate insulator in a so-called MISHEMT (metal insulator semiconductor high electron mobility transistors) device using different materials. The impact of a fully amorphous dielectric (Al2O3), which was kept amorphous by the integration of a low thermal budget ohmic contact [3], was compared to an epitaxial dielectric film (GdScO3) [4]. Due to the band alignment and the high dielectric constant of GdScO3, the spillover effect as it was seen for Al2O3 [5] has been suppressed and a reduction of threshold voltage shift due to the additional capacitance by the dielectric layer has been achieved. In addition, AlTiOx films were investigated as gate dielectrics [6]. To avoid further deterioration of the dielectric layer by the ohmic contact formation anneal, a gate last integration scheme was carried out using Ti based gold free ohmic source and drain contacts [7]. By varying the Al content, the band alignment between the underlying GaN capping layer to the thin film dielectric was controlled. By this means and additional charge engineering in the dielectric layer, a gate leakage reduction with limited threshold voltage increase has been realized. All dielectric layers have been electrically characterized in detail. Interface trap densities were measured by photo-assisted capacitance voltage measurements and an in-depth comparison of the dielectric layers and their impact on the device performance will be given.[1] Yole Developpement, RF GaN Market: Applications, Players, Technology and Substrates 2019, Market & Technology Report, (2019)[2] T. Kimoto, Jpn. J. Appl. Phys. 54, 40103 (2015).[3] Schmid, A.; Schröter, Ch.; Otto, R.; Schuster, M.; Klemm, V.; Rafaja, D.; Heitmann, J., Appl. Phys. Lett. 106, 053509 (2015)[4] Seidel, S., Schmid, A., Miersch, C., Schubert, J., Heitmann, J. Appl. Phys. Lett., 118(5), 052902 (2021)[5] P. Lagger, P. Steinschifter, M. Reiner, M. Stadtmüller, G. Denifl, A. Naumann, J. Müller, L. Wilde, J. Sundqvist, D. Pogany, C. Ostermaier, Appl. Phys. Lett. 105, 033412 (2014)[6] N Siebdrath, S. Seidel, A. Schmid, J. Heitmann, Mikro-Nano-Integration; 8th GMM-Workshop, 2020, pp. 1-3.[7] Garbe, V.; Schmid, A.; Seidel, S.; Abendroth, B; Stöcker, H.; Doering P.; Meyer, D.C.; Heitmann, J., Phys. Stat. Sol. (B), 2100312 (2021)

(Invited, Digital Presentation) High-κ Gate Oxide Integration and Ohmic Contact Development for AlGaN/GaN MISHEMTs

In this work we review our latest results concerning the integration of different high-κ dielectrics e.g. Al2O3, GdScO3 and TiO2 for gate passivation and the related development of ohmic contacts in metal insulator semiconductor high electron mobility transistor. Depending on deposition and crystallization temperature of the dielectric, a high-κ first and high-κ last process was used. For both concepts, the development of suitable ohmic contacts with low formation temperature were carried out. Vanadium based contacts for high-κ first and Au-free contacts for the high-κ last approach was shown. The influence of the ohmic contact formation temperature on the performance of the MISHEMT devices were studied for all high-κ gate passivation layer.

Implementation of Recessed Gate Normally off GaN Metal–Insulator–Semiconductor High Electron Mobility Transistors by Electrodeless Photoelectrochemical Etching

We demonstrated that electrodeless photoelectrochemical (ELPEC) etching can be used to realize recessed gate normally off GaN metal–insulator–semiconductor high electron mobility transistors (MISHEMTs). A slower speed etching of 0.36 nm/min has been achieved by the ELPEC etching, and it was easy to control the etching depth at this etching rate. The normally off GaN MISHEMT has been fabricated with a 20 nm atomic layer deposition hafnium oxide (HfO2) gate dielectric after a 55 min ELPEC etching, and low etched surface roughness has been obtained. A threshold voltage shift from −3.6 to 0.5 V has been achieved, performing with normally off properties. A maximum output current of 500 mA/mm and a high maximum field-effect mobility of 194 cm2/V·s has been obtained due to the high quality etching surface created with ELPEC etching.

Study of the impact of interface traps associated with SiN X passivation on AlGaN/GaN MIS-HEMTs

In this work, we show that a bilayer SiN x passivation scheme which includes a high-temperature annealed SiN x as gate dielectric, significantly improves both ON and OFF state performance of AlGaN/GaN metal insulator semiconductor high electron mobility transistors (MISHEMTs). Surface and bulk leakage paths were determined from devices with different SiN x passivation schemes. Temperature-dependent mesa leakage studies showed that the surface conduction could be explained using a 2D variable range hopping mechanism; this is attributed to the mid-gap interface states at the GaN(cap)/SiN x interface generated due to the Ga–Ga metal like bonding states. It was found that the high temperature annealed SiN x gate dielectric exhibited the lowest interface state density and a two-step C–V indicative of a superior quality SiN x /GaN interface as confirmed from conductance and capacitance measurements. High-temperature annealing helps form Ga–N bonding states, thus reducing the shallow metal-like interface states. MISHEMT measurements showed a significant reduction in gate leakage and a four-orders of magnitude improvement in the ON/OFF ratio while increasing the saturation drain current (I DS) by a factor of 2. Besides, MISHEMTs with two-step SiN x passivation exhibited a relatively flat transconductance profile, indicating lower interface states density. The dynamic R on with gate and drain stressing measurements also showed about 3× improvements in devices with bilayer SiN x passivation.

Status of Aluminum Oxide Gate Dielectric Technology for Insulated-Gate GaN-Based Devices.

Insulated-gate GaN-based transistors can fulfill the emerging demands for the future generation of highly efficient electronics for high-frequency, high-power and high-temperature applications. However, in contrast to Si-based devices, the introduction of an insulator on (Al)GaN is complicated by the absence of a high-quality native oxide for GaN. Trap states located at the insulator/(Al)GaN interface and within the dielectric can strongly affect the device performance. In particular, although AlGaN/GaN metal–insulator–semiconductor high electron mobility transistors (MIS-HEMTs) provide superior properties in terms of gate leakage currents compared to Schottky-gate HEMTs, the presence of an additional dielectric can induce threshold voltage instabilities. Similarly, the presence of trap states can be detrimental for the operational stability and reliability of other architectures of GaN devices employing a dielectric layer, such as hybrid MIS-FETs, trench MIS-FETs and vertical FinFETs. In this regard, the minimization of trap states is of critical importance to the advent of different insulated-gate GaN-based devices. Among the various dielectrics, aluminum oxide (Al2O3) is very attractive as a gate dielectric due to its large bandgap and band offsets to (Al)GaN, relatively high dielectric constant, high breakdown electric field as well as thermal and chemical stability against (Al)GaN. Additionally, although significant amounts of trap states are still present in the bulk Al2O3 and at the Al2O3/(Al)GaN interface, the current technological progress in the atomic layer deposition (ALD) process has already enabled the deposition of promising high-quality, uniform and conformal Al2O3 films to gate structures in GaN transistors. In this context, this paper first reviews the current status of gate dielectric technology using Al2O3 for GaN-based devices, focusing on the recent progress in engineering high-quality ALD-Al2O3/(Al)GaN interfaces and on the performance of Al2O3-gated GaN-based MIS-HEMTs for power switching applications. Afterwards, novel emerging concepts using the Al2O3-based gate dielectric technology are introduced. Finally, the recent status of nitride-based materials emerging as other gate dielectrics is briefly reviewed.

Investigating two-stage degradation of threshold voltage induced by off-state stress in AlGaN/GaN HEMTs

In this work, a two-step degradation phenomenon in D-mode Si3N4/AlGaN/GaN metal–insulator–semiconductor-high electron mobility transistors is discussed systematically. During off-state stress, threshold voltage shifts positively for a short duration, and is followed by a negative shift. In contrast, the off-state leakage continues to decrease throughout the entire stress. Results of varied measurement conditions indicate that carrier trapping at different regions dominates this phenomenon. It is interesting that under a large lateral electric field, electron–hole pairs are generated and will then be trapped at the gate dielectric layer. Furthermore, when increasing the stress temperature, impact ionization due to carriers from the gate electrode becomes more severe. Finally, devices with different gate insulator thicknesses are performed to verify the physical model of the degradation behavior.