Instruction Tracing Research Articles

Simulation and evaluation of flexible enhancement of thermal power unit coupled with flywheel energy storage array

Under the background of “carbon neutrality” and “carbon peak” concepts, China desires to develop a new power system based on renewable energy sources (RES), which will be the primary energy support in prospective China. Thus, it is imperative to improve the peak shaving capability of power system to address the problem of random fluctuation and intermittency of RES by developing various energy storage systems. An innovative approach to enhance the flexibility of the conventional thermal power unit (TPU) through the utilization of flywheel energy storage array (FESA) is presented, simulated, and evaluated in this paper. Using the relatively practical and specific model of TPU and FESA, modified frequency modulation and automatic generation control (AGC) instruction tracing operation scenario models are constructed. A comprehensive control strategy of FESA and a well-designed operation coordinated control method for TPU with FESA are proposed and applied. The simulation results are distinctively processed and evaluated by the methods in “two documents”, aiming to assess the real-world operation performance of the model proposed in this paper. The comprehensive analysis of the indicators demonstrates that the FESA can improve the flexibility and economy of the units. This research may guide the usage of FESA to improve the operational flexibility of TPU.

DTrace: fine-grained and efficient data integrity checking with hardware instruction tracing

Recently released Intel processors have been equipped with hardware instruction tracing facilities to securely and efficiently record the program execution path. In this paper, we study a case for data integrity checking based on Intel Processor Trace (Intel PT), the instruction tracing facility on x86 processors. We incorporate software instrumentation and hardware instruction tracing to guarantee fine-grained data integrity without frequently switching the processor mode. We incorporate the idea in a system named DTrace which provides primitives to instruct Intel PT to capture the data load and store events, even current Intel PT implementations only record control transfers. The trace is analyzed before the program makes security-sensitive operations. We apply DTrace in several case studies to show that the primitives that DTrace provides are easy to use and help to enhance data integrity in applications. We further evaluate DTrace with several microbenchmarks to show the time cost that DTrace’s data tracing operation incurs. We also evaluate DTrace on Nginx to show the performance impact when Nginx is enhanced in security to provide the integrity during the runtime execution for programmer-defined security sensitive data. We find the performance overhead that DTrace incurs for the data tracing is moderate.

Optimally profiling and tracing programs

This paper describes algorithms for inserting monitoring code to profile and trace programs. These algorithms greatly reduce the cost of measuring programs with respect to the commonly used technique of placing code in each basic block. Program profiling counts the number of times each basic block in a program executes. Instruction tracing records the sequence of basic blocks traversed in a program execution. The algorithms optimize the placement of counting/tracing code with respect to the expected or measured frequency of each block or edge in a program's control-flow graph. We have implemented the algorithms in a profiling/tracing tool, and they substantially reduce the overhead of profiling and tracing. We also define and study the hierarchy of profiling problems. These problems have two dimensions: what is profiled (i.e., vertices (basic blocks) or edges in a control-flow graph) and where the instrumentation code is placed (in blocks or along edges). We compare the optimal solutions to the profiling problems and describe a new profiling problem: basic-block profiling with edge counters. This problem is important because an optimal solution to any other profiling problem (for a given control-flow graph) is never better than an optimal solution to this problem. Unfortunately, finding an optimal placement of edge counters for vertex profiling appears to be a hard problem in general. However, our work shows that edge profiling with edge counters works well in practice because it is simple and efficient and finds optimal counter placements in most cases. Furthermore, it yields more information than a vertex profile. Tracing also benefits from placing instrumentation code along edges rather than on vertices.

A microcode-based environment for noninvasive performance analysis

We have developed an environment which allows us to collect data for performance analysis by modifying the microcode of a VAX 8600. This use of microprogramming permits data to be collected with minimal system perturbation (i.e. the data is almost as good as that obtained with a hardware monitor) but at the cost and with the ease of use of a software simulator. In this paper we describe the environment that we have developed and present two examples of its use. The first example, procedure call instrumentation, illustrates a technique for gathering data on how certain architectural features are used. The second example, instruction tracing, illustrates a technique for collecting data that can then be used in trace—driven simulation.