Inputs In Parallel Research Articles

Deep learning-enhanced atomic norm minimization for DOA estimation of coherent and incoherent sources using coprime array

Abstract In the field of array signal processing, accurate direction of arrival (DOA) estimation is crucial for handling both coherent and incoherent mixed signal sources. This paper proposes a deep learning-enhanced atomic norm minimization (DLEANM) algorithm, designed to improve DOA estimation for coprime arrays. The algorithm first models the mixed signal scenarios realistically and employs interpolation to transform coprime arrays into virtual uniform linear arrays, which facilitates the formulation of the atomic norm minimization problem. Solving this problem reconstructs an augmented Hermitian Toeplitz covariance matrix. To further enhance the accuracy of DOA estimation, we developed a multi-scale convolutional neural network with an attention mechanism, which uses the covariance matrix as input to better capture signal variations across different frequencies and spatial distributions. By processing multi-scale inputs in parallel, the model improves adaptability and robustness in estimating mixed signal sources. Simulation results show that, under equivalent SNR and snapshot conditions, the DLEANM algorithm achieves lower estimation errors, more accurate multi-target DOA estimation, and relatively faster computation speed compared to conventional methods. Field experiments further confirm the effectiveness of the proposed algorithm. Therefore, after training, the algorithm is able to accurately identify the directions of unknown signals received by sensor arrays.

Optimization of steel plate quality inspection driven by PscSE and SPPFELAN

AbstractBased on the improved YOLOv8n, a steel plate defect detection and recognition method is proposed to address the high labor costs and workload of traditional tasks. SPPFELAN processes inputs in parallel to enhance computational efficiency by executing multiple pooling operations simultaneously. The parallel feature fusion module PscSE, using a mixed‐dimension SE attention mechanism (scSE), captures global and channel‐related information better, improving characterization capability. The EIOU loss function addresses the ambiguous aspect ratio definition of CIOU loss, enhancing detection accuracy and accelerating convergence. Results show the YOLOv8n‐PscSE‐SPPFELAN model achieves 76.9% mAP@0.5 on the Northeastern University steel plate dataset, a 4.6% improvement over the original YOLOv8n, with a computation amount of 7.7 GFLOPs, reducing resource usage and greatly improving detection speed.

Design & Analysis of a PV-Piezoelectric based Off-grid Energy Harvester in Tripura

In recent years the realization and growing awareness of energy consumers regarding the environmental issues, economic and climatic challenges have accelerated a strong sustain impact in developing power technologies. To mitigate the detrimental impacts of the conventional energy resources, this paper provides an idea about an off-grid, distributed solar-piezo power generating technique usable for residential & isolated area applications. The primary power is supplied by the solar panel, and the subordinate power can be added by the produced energy from the piezoelectric modules, and the battery model is employed for continuous power supply in the suggested hybrid renewable power system.Furthermore, the dc-dc boost converter for PV and piezoelectric modules is designed to connect two power inputs in parallel. The present study focuses upon the design of the proposed system & scopes of the proposed system in Tripura, a hilly state in the North-Eastern Province of India.Tripura has ranked 56th amongst 100 smart cities in the countryaccording to Smart City rankings released in July 2020 & also 1st among all the North-Eastern states. Thus, the motto of the paper is to draw attention towards implementation of green energy harvesting techniques in Tripura which will certainly help to mitigate the techno-economic barriers in the region &successfully mitigating the energy requirements. The modelling and simulation of the proposed hybrid arrangement has been carried out in MATLAB/SIMULINK. The analysis of the proposed system portrays the effectiveness of the proposed system.

A Reconfigurable 16Kb AND8T SRAM Macro With Improved Linearity for Multibit Compute-In Memory of Artificial Intelligence Edge Devices

Compute-in Memory (CIM) has been a promising candidate to perform the energy-efficient multiply-and-accumulate (MAC) operations of the modern Artificial Intelligence (AI) edge devices. This work proposes a multi-bit precision (4b input, 4b weight, and 4b output) 128 × 128 SRAM CIM architecture. The 4b input is implemented using the voltage-scaling and charge-sharing-based scheme. To achieve efficient computation with improved linearity, a novel AND-logic-based 8T SRAM cell (AND8T) is proposed. To address the non-idealities of analog voltage or current-based operations, the proposed AND8T employs the charge-domain-based computation by overlaying a metal-oxide-metal capacitor (MOM cap) with no area overhead. The proposed AND8T mitigates the linearity issue of MAC operations which is highly desirable for the reliable operation of complex neural networks (CNNs). The proposed 16Kb macro asserts 128 inputs in parallel and processes a 128 4b dot-product in a single cycle for the array column (a single neuron). The macro can also be reconfigured for the 64 or 32 4b parallel inputs based on the need of CNN models. The AND8T SRAM macro is fabricated in a 65nm node and achieves an energy efficiency of 301.08 TOPS/W for 16 parallel neurons output, with 128 4b MAC operations at 10MHz clock frequency and 1V supply. The implemented macro supports up to 100MHz of clock frequency and occupies 0.124mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> of chip area while achieving the 96.05% and 87% classification accuracy for MNIST and CIFAR-10 datasets.

Photovoltaic power forecasting: A hybrid deep learning model incorporating transfer learning strategy

Accurate forecasting of photovoltaic power is essential in the integration, operation, and scheduling of hybrid grid systems. In particular, modeling for newly built photovoltaic sites is restricted by insufficient data and training burden. In this study, a novel hybrid photovoltaic power forecasting model assisted with a transfer learning strategy is proposed. The hybrid model, named the attention-dilate convolution neural network-bidirectional long short-term memory network, consists of three steps. Step 1 - Input reconstruction: the historical power and meteorological factors are reconstructed as new inputs based on their relevance to the forecast by introducing a long short-term memory-based attention mechanism; Step 2 - Feature extraction: a hybrid structure is applied to extract spatial and temporal features from new inputs in parallel; Step 3 - Feature mapping: the extracted features are mapped into the forecasted photovoltaic output. Furthermore, to address the modeling for new sites, a transfer learning strategy that fine-tunes the pre-trained model is proposed in this work. The structure by step-wise division allows fine-tuning to be applied to the necessary parts rather than the entire model. Subsequently, the data from the actual photovoltaic system was acquired to validate the proposed model and transfer learning strategy. The proposed model showed significantly superior performance than the other models in the tests, and the parameter transferring not only makes up for the data shortage but also effectively accelerates the model training. With the transfer learning strategy, the maximum improvement in accuracy and training efficiency reached 69.51% and 71.42%, respectively.

Distinct integration of spectrally complex sounds in mouse primary auditory cortices

The standard hierarchical signal transmission along the lemniscal auditory pathway in mice changes in the cortex, where two tonotopically organized auditory regions receive thalamic inputs in parallel: the primary auditory cortex (A1) and the anterior auditory field (AAF). These fields show distinct properties of sound-evoked responses, where A1 responds robustly to sound onset and AAF exhibits faster and more transient responses following both sound onset and offset. Previous reports showed a strong involvement of AAF in temporal processing, revealing its particular role in encoding temporal information. A more regular tonotopy, narrower frequency response areas, and more robust direction selectivity to frequency modulated sweeps led to the speculation that A1 codes better the spectral composition of a sound than AAF. However, potential mechanisms explaining why A1 favors spectral processing have not been previously described. Using in vivo electrophysiological recordings in the mouse auditory cortex, we found that A1 neurons, unlike AAF neurons, respond stronger and faster to spectrally complex tones than to pure tones. Next, we show that both regular and putative fast-spiking neurons in A1, but not in AAF, display larger responses to spectrally complex tones than to pure tones. Finally, we use a laminar analysis to demonstrate that A1 neurons in layer 2/3 respond stronger to spectrally complex tones than neurons in layer 4, indicating an important transformation of the neural representation of spectral complexity between thalamo-recipient and supragranular layers in A1, but not in AAF. Our study reveals circuit features contributing to distinct processing of spectrally simple and complex sounds in the two primary auditory cortices and supports a dual-stream processing in the core auditory cortex.

Three Controversial Hypotheses Concerning Computation in the Primate Cortex

We consider three hypotheses concerning the primate neocortex which have influenced computational neuroscience in recent years. Is the mind modular in terms of its being profitably described as a collection of relatively independent functional units? Does the regular structure of the cortex imply a single algorithm at work, operating on many different inputs in parallel? Can the cognitive differences between humans and our closest primate relatives be explained in terms of a scalable cortical architecture? We bring to bear diverse sources of evidence to argue that the answers to each of these questions — with some judicious qualifications — are in the affirmative. In particular, we argue that while our higher cognitive functions may interact in a complicated fashion, many of the component functions operate through well-defined interfaces and, perhaps more important, are built on a neural substrate that scales easily under the control of a modular genetic architecture. Processing in the primary sensory cortices seem amenable to similar algorithmic principles, and, even for those cases where alternative principles are at play, the regular structure of cortex allows the same or greater advantages as the architecture scales. Similar genetic machinery to that used by nature to scale body plans has apparently been applied to scale cortical computations. The resulting replicated computing units can be used to build larger working memory and support deeper recursions needed to qualitatively improve our abilities to handle language, abstraction and social interaction.

A NOVEL PARALLEL 4X4 TRANSFORM AND INVERSE TRANSFORM ARCHITECTURE FOR H.264

The H.264 video coding standard provides a compression gain of 1.5 x 2.0 x over H.263 and MPEG- simple profile. One of the major differences between H.263 and H.264 is the transform coding. The transforms of H.264 employ only integer arithmetic operations such as additions and shifts without multiplications, with coefficients and scaling factors that allow for 16-bit arithmetic computation on first-level transforms. The integer transforms also solve the mismatch problem like H.263. These changes lead to a significant complexity reduction, but with only less than 0.02 dB decrease in PSNR. A novel parallel 4x4 multiple transforms architecture for H.264 is presented in this paper. This architecture is based on Wallace trees and can process 4 inputs in parallel. This architecture has been designed and synthesized in SMIC 0.18um technology. The result shows that this architecture can achieves above 1,200M pixels/sec throughout and consume only 5625 gates. The timing-area property of this architecture is improved compared with the previous architecture.

Friends in Low-Entropy Places: Orthographic Neighbor Effects on Visual Word Identification Differ Across Letter Positions.

Visual word recognition is facilitated by the presence of orthographic neighbors that mismatch the target word by a single letter substitution. However, researchers typically do not consider where neighbors mismatch the target. In light of evidence that some letter positions are more informative than others, we investigate whether the influence of orthographic neighbors differs across letter positions. To do so, we quantify the number of enemies at each letter position (how many neighbors mismatch the target word at that position). Analyses of reaction time data from a visual word naming task indicate that the influence of enemies differs across letter positions, with the negative impacts of enemies being most pronounced at letter positions where readers have low prior uncertainty about which letters they will encounter (i.e., positions with low entropy). To understand the computational mechanisms that give rise to such positional entropy effects, we introduce a new computational model, VOISeR (Visual Orthographic Input Serial Reader), which receives orthographic inputs in parallel and produces an over-time sequence of phonemes as output. VOISeR produces a similar pattern of results as in the human data, suggesting that positional entropy effects may emerge even when letters are not sampled serially. Finally, we demonstrate that these effects also emerge in human subjects' data from a lexical decision task, illustrating the generalizability of positional entropy effects across visual word recognition paradigms. Taken together, such work suggests that research into orthographic neighbor effects in visual word recognition should also consider differences between letter positions.

Implementation of System Operation Modes for Health Management and Failure Prognosis in Cyber-Physical Systems.

Cyber-physical systems (CPSs) have sophisticated control mechanisms that help achieve optimal system operations and services. These mechanisms, imply considering multiple signal inputs in parallel, to timely respond to varying working conditions. Despite the advantages that control mechanisms convey, they bring new challenges in terms of failure prevention. The compensatory action the control exerts cause a fault masking effect, hampering fault diagnosis. Likewise, the multiple information inputs CPSs have to process can affect the timely system response to faults. This article proposes a failure prognosis method, which combines time series-based forecasting methods with statistically based classification techniques in order to investigate system degradation and failure forming on system levels. This method utilizes a new approach based on the concept of the system operation mode (SOM) that offers a novel perspective for health management that allows monitoring the system behavior, through the frequency and duration of SOMs. Validation of this method was conducted by systematically injecting faults in a cyber-physical greenhouse testbed. The obtained results demonstrate that the degradation and fault forming process can be monitored by analyzing the changes of the frequency and duration of SOMs. These indicators made possible to estimate the time to failure caused by various failures in the conducted experiments.

Fully hardware-implemented memristor convolutional neural network

Memristor-enabled neuromorphic computing systems provide a fast and energy-efficient approach to training neural networks1-4. However, convolutional neural networks (CNNs)-one of the most important models for image recognition5-have not yet been fully hardware-implemented using memristor crossbars, which are cross-point arrays with a memristor device at each intersection. Moreover, achieving software-comparable results is highly challenging owing to the poor yield, large variation and other non-ideal characteristics of devices6-9. Here we report the fabrication of high-yield, high-performance and uniform memristor crossbar arrays for the implementation of CNNs, which integrate eight 2,048-cell memristor arrays to improve parallel-computing efficiency. In addition, we propose an effective hybrid-training method to adapt to device imperfections and improve the overall system performance. We built a five-layer memristor-based CNN to perform MNIST10 image recognition, and achieved a high accuracy of more than 96 per cent. In addition to parallel convolutions using different kernels with shared inputs, replication of multiple identical kernels in memristor arrays was demonstrated for processing different inputs in parallel. The memristor-based CNN neuromorphic system has an energy efficiency more than two orders of magnitude greater than that of state-of-the-art graphics-processing units, and is shown to be scalable to larger networks, such as residual neural networks. Our results are expected to enable a viable memristor-based non-von Neumann hardware solution for deep neural networks and edge computing.

Extended Barrel-Shifter for Versatile QC-LDPC Decoders

In this letter, we present a Barrel-Shifter of size n extended by an additional layer that can handle any circular permutation on a vector of size m, m ≤ n, thanks to a specific initial positioning of the data. The construction of the so-called Extended Barrel-Shifter is motivated by the hardware decoder constraint related to the Low-Density Parity-Check (LDPC) code recently adopted for the 5G mobile standard. The proposed algorithm requires 42% less multiplexers than the best state-of-the-art solution for n = 384 of the 5G LDPC standard. This proposal is also able to process several inputs in parallel without extra hardware cost.

Distance-dependent inhibition facilitates focality of gamma oscillations in the dentate gyrus

Gamma oscillations (30–150 Hz) in neuronal networks are associated with the processing and recall of information. We measured local field potentials in the dentate gyrus of freely moving mice and found that gamma activity occurs in bursts, which are highly heterogeneous in their spatial extensions, ranging from focal to global coherent events. Synaptic communication among perisomatic-inhibitory interneurons (PIIs) is thought to play an important role in the generation of hippocampal gamma patterns. However, how neuronal circuits can generate synchronous oscillations at different spatial scales is unknown. We analyzed paired recordings in dentate gyrus slices and show that synaptic signaling at interneuron-interneuron synapses is distance dependent. Synaptic strength declines whereas the duration of inhibitory signals increases with axonal distance among interconnected PIIs. Using neuronal network modeling, we show that distance-dependent inhibition generates multiple highly synchronous focal gamma bursts allowing the network to process complex inputs in parallel in flexibly organized neuronal centers.

The global landscape of cognition: hierarchical aggregation as an organizational principle of human cortical networks and functions.

Though widely hypothesized, limited evidence exists that human brain functions organize in global gradients of abstraction starting from sensory cortical inputs. Hierarchical representation is accepted in computational networks, and tentatively in visual neuroscience, yet no direct holistic demonstrations exist in vivo. Our methods developed network models enriched with tiered directionality, by including input locations, a critical feature for localizing representation in networks generally. Grouped primary sensory cortices defined network inputs, displaying global connectivity to fused inputs. Depth-oriented networks guided analyses of fMRI databases (~17,000 experiments;~1/4 of fMRI literature). Formally, we tested whether network depth predicted localization of abstract versus concrete behaviors over the whole set of studied brain regions. For our results, new cortical graph metrics, termed network-depth, ranked all databased cognitive function activations by network-depth. Thus, we objectively sorted stratified landscapes of cognition, starting from grouped sensory inputs in parallel, progressing deeper into cortex. This exposed escalating amalgamation of function or abstraction with increasing network-depth, globally. Nearly 500 new participants confirmed our results. In conclusion, data-driven analyses defined a hierarchically ordered connectome, revealing a related continuum of cognitive function. Progressive functional abstraction over network depth may be a fundamental feature of brains, and is observed in artificial networks.

A Novel Memory-Based FFT Architecture for Real-Valued Signals Based on a Radix-2 Decimation-In-Frequency Algorithm

This brief presents a novel architecture for memory-based fast Fourier transform (FFT) computation for real-valued signals based on radix-2 decimation-in-frequency algorithm. A superior strategy of stage partition for the real FFT (RFFT) is proposed to minimize the computation clock cycles and maximize the utilization of the processing element (PE). The PE employed in our RFFT architecture can process four inputs in parallel by using two radix-2 butterflies and only two multiplexers. The proposed memory-addressing scheme and control of the multiplexers can be expressed in terms of a counter according to the RFFT computation stage. Furthermore, the proposed RFFT architecture can support more PEs in two dimensions as well. Compared with prior works, the proposed RFFT processors have the advantages of fewer computation cycles and lower hardware usage. The experiment shows that the proposed processor reduces the computation cycles by a factor of 17.5% for a 32-point RFFT computation compared with a recently presented work while maintaining lower hardware usage and complexity in the PE design.

센서네트워크 활용을 위한 경량 병렬 BCH 디코더 설계

Abstract This paper presents a new byte-wise BCH (4122, 4096, 2) decoder, which treats byte-wise parallel operations so as to enhance itsthroughput. In particular, we evaluate the parallel processing technique for the most time-consuming components such as syndrome gen-erator and Chien search owing to the iterative operations. Even though a syndrome generator is based on the conventional LFSR archi-tecture, it allows eight consecutive bit inputs in parallel and it treats them in a cycle. Thus, it can reduce the number of cycles that areneeded. In addition, a Chien search eliminates the redundant operations to reduce the hardware complexity. The proposed BCH decoderis implemented with VHDL and it is verified using a Xilinx FPGA. From the simulation results, the proposed BCH decoder can enha ncethe throughput as 43% and it can reduce the hardware complexity as 67% compared to its counterpart employing parallel processingarchitecture.Keywords: BCH code, Parallel BCH decoder, Syndrome generator, Chien search

An In-Place FFT Architecture for Real-Valued Signals

This brief presents a novel scalable architecture for in-place fast Fourier transform (IFFT) computation for real-valued signals. The proposed computation is based on a modified radix-2 algorithm, which removes the redundant operations from the flow graph. A new processing element (PE) is proposed using two radix-2 butterflies that can process four inputs in parallel. A novel conflict-free memory-addressing scheme is proposed to ensure the continuous operation of the FFT processor. Furthermore, the addressing scheme is extended to support multiple parallel PEs. The proposed real-FFT processor simultaneously requires fewer computation cycles and lower hardware cost compared to prior work. For example, the proposed design with two PEs reduces the computation cycles by a factor of 2 for a 256-point real fast Fourier transform (RFFT) compared to a prior work while maintaining a lower hardware complexity. The number of computation cycles is reduced proportionately with the increase in the number of PEs.

Reconstruction of sparse circuits using multi-neuronal excitation (RESCUME)

Event Abstract Back to Event Reconstruction of sparse circuits using multi-neuronal excitation (RESCUME) Tao Hu1* and Dmitri Chklovskii1 1 Janelia Farm Research Campus , HHMI, United States One of the central problems in neuroscience is reconstructing synaptic connectivity in neural circuits. Synapses onto a neuron can be probed by sequentially stimulating potentially pre-synaptic neurons while monitoring the membrane voltage of the post-synaptic neuron. Reconstructing a large neural circuit using such a "brute force" approach is rather time-consuming and inefficient because the connectivity in neural circuits is sparse. Instead, we propose to measure a post-synaptic neuron’s voltage while stimulating sequentially random subsets of multiple potentially pre-synaptic neurons. To reconstruct these synaptic connections from the recorded voltage we apply a decoding algorithm recently developed for compressive sensing. Compared to the brute force approach, our method promises significant time savings that grow with the size of the circuit. We use computer simulations to find optimal stimulation parameters and explore the feasibility of our reconstruction method under realistic experimental conditions including noise and non-linear synaptic integration. Multi-neuronal stimulation allows reconstructing synaptic connectivity just from the spiking activity of post-synaptic neurons, even when sub-threshold voltage is unavailable. By using calcium indicators, voltage-sensitive dyes, or multi-electrode arrays one could monitor activity of multiple post-synaptic neurons simultaneously, thus mapping their synaptic inputs in parallel, potentially reconstructing a complete neural circuit. Conference: Computational and Systems Neuroscience 2010, Salt Lake City, UT, United States, 25 Feb - 2 Mar, 2010. Presentation Type: Poster Presentation Topic: Poster session I Citation: Hu T and Chklovskii D (2010). Reconstruction of sparse circuits using multi-neuronal excitation (RESCUME). Front. Neurosci. Conference Abstract: Computational and Systems Neuroscience 2010. doi: 10.3389/conf.fnins.2010.03.00067 Copyright: The abstracts in this collection have not been subject to any Frontiers peer review or checks, and are not endorsed by Frontiers. They are made available through the Frontiers publishing platform as a service to conference organizers and presenters. The copyright in the individual abstracts is owned by the author of each abstract or his/her employer unless otherwise stated. Each abstract, as well as the collection of abstracts, are published under a Creative Commons CC-BY 4.0 (attribution) licence (https://creativecommons.org/licenses/by/4.0/) and may thus be reproduced, translated, adapted and be the subject of derivative works provided the authors and Frontiers are attributed. For Frontiers’ terms and conditions please see https://www.frontiersin.org/legal/terms-and-conditions. Received: 19 Feb 2010; Published Online: 19 Feb 2010. * Correspondence: Tao Hu, Janelia Farm Research Campus, HHMI, Ashburn, MD, United States, hut@janelia.hhmi.org Login Required This action requires you to be registered with Frontiers and logged in. To register or login click here. Abstract Info Abstract The Authors in Frontiers Tao Hu Dmitri Chklovskii Google Tao Hu Dmitri Chklovskii Google Scholar Tao Hu Dmitri Chklovskii PubMed Tao Hu Dmitri Chklovskii Related Article in Frontiers Google Scholar PubMed Abstract Close Back to top Javascript is disabled. Please enable Javascript in your browser settings in order to see all the content on this page.

IMPLEMENTATION OF COGNITIVE CONTROL FOR A HUMANOID ROBOT

Engineers have long employed control systems utilizing models and feedback loops to control real-world systems. Limitations of model-based control led to a generation of intelligent control techniques such as adaptive and fuzzy control. The human brain, on the other hand, is known to process a variety of inputs in parallel, and shift between different levels of cognitive activities while ignoring distractions to focus on the task in hand. This process, known as cognitive control in psychology, is unique to humans and a handful of animals. We are interested in implementing such cognitive control functionalities for our humanoid robot ISAC. This paper outlines the features of multiagent-based cognitive architecture for a humanoid robot and the progress made toward the realization of cognitive control functionalities using attention, working memory and internal rehearsal. Several experiments have been conducted to show that the implementation of an integrated cognitive robot architecture is feasible.

Reaction-diffusion chip implementing excitable lattices with multiple-valued cellular automata

We designed a special CMOS circuit for reaction-diffusion computers that accepts optical inputs in parallel and generates excitable spatial waves on a chip surface. We demonstrated the spatiotemporal properties of the proposed circuits by fabricated LSIs.