Abstract

The H.264 video coding standard provides a compression gain of 1.5 x 2.0 x over H.263 and MPEG- simple profile. One of the major differences between H.263 and H.264 is the transform coding. The transforms of H.264 employ only integer arithmetic operations such as additions and shifts without multiplications, with coefficients and scaling factors that allow for 16-bit arithmetic computation on first-level transforms. The integer transforms also solve the mismatch problem like H.263. These changes lead to a significant complexity reduction, but with only less than 0.02 dB decrease in PSNR. A novel parallel 4x4 multiple transforms architecture for H.264 is presented in this paper. This architecture is based on Wallace trees and can process 4 inputs in parallel. This architecture has been designed and synthesized in SMIC 0.18um technology. The result shows that this architecture can achieves above 1,200M pixels/sec throughout and consume only 5625 gates. The timing-area property of this architecture is improved compared with the previous architecture.

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