Input Voltage Range Research Articles

A Current-Fed Dual-Active-Bridge Integrated LC-Resonant Converter with Dynamic Power Allocating for Wide Input and Output Voltage Range Operation

A Current-Fed Dual-Active-Bridge Integrated LC-Resonant Converter with Dynamic Power Allocating for Wide Input and Output Voltage Range Operation

Design Methodology of High-Power Density Converter with Wide Input Voltage Range

Design Methodology of High-Power Density Converter with Wide Input Voltage Range

Indirect Input-Series DC Transformer with Wide Input Voltage Range

Indirect Input-Series DC Transformer with Wide Input Voltage Range

Experimental comparison of planar transformer architectures for half-bridge resonant topology

Power electronics is experiencing a strong growth, driven by industrial demand for applications as diverse as wall adapters and renewable energy. In addition to topologies, semiconductors or control, there is also a need for research in magnetics, such as planar transformers, which are very useful for certain applications where a low converter profile is desired, so that replacing traditional wire transformers has a quantitative advantage in terms of power density and geometry, as well as EMI reduction. In this paper, an experimental comparison of different planar transformer architectures is made, a contrast of the test results is presented. Six possibilities are carried out, dealing with diverse configurations in primary and secondary windings, of which a theoretical estimation of losses is performed. To demonstrate the effect of variations in the proposals, a 100 W prototype converter, with an input voltage range of 320 to 380 V and an output range of 5 to 20 V is developed based on the novel hybrid flyback topology, reaching a maximum efficiency of 97% using GaN semiconductors. With it, a comparison is made in terms of efficiency and common noise between the alternatives.

Output Ripple Voltage Analysis of Quadratic Buck–Boost Converters with Switched Inductor Network in the Entire Dynamic Range

In order to provide theoretical guidance for the design of quadratic Buck–Boost converter with switched inductor network, the minimum current flowing through the energy storage inductor L 3 is compared with the output current and zero, the working mode of the converter can be divided into the complete inductor supply in continuous conduction mode(CISM-CCM), the incomplete inductor supply in continuous conduction mode(IISM-CCM)and the incomplete inductor supply in discontinuous conduction mode(IISM-DCM). Within the given input voltage and load range, the working region of the converter is divided into five parts according to the different value of the inductor L 3. By analyzing the output ripple voltage of the converter in the five working areas, and the maximum output ripple voltage of the converter is obtained. Based on the relationship between the maximum output ripple voltage of the entire dynamic range and the value of the inductor L 3, it is pointed out that the output voltage ripple of the converter in CISM-CCM is the smallest and independent of the inductor L 3, and that the output voltage ripple in IISM-CCM and IISM-DCM is much larger and increasing with the decreasing of the inductor L 3. Meanwhile, it is concluded that the minimum inductance to guarantee the lowest output ripple voltage is the critical inductance between CISM-CCM and IISM-CCM. Finally, the experimental results verify the rationality and correctness of the theoretical analysis.

A 22.3-Bit Third-Order Delta-Sigma Modulator for EEG Signal Acquisition Systems

This paper presents a high resolution delta-sigma modulator for continuous acquisition of electroencephalography (EEG) signals. The third-order single-loop architecture with a 1-bit quantizer is adopted to achieve 22.3-bit resolution. The effects of thermal noise on the performance of the delta-sigma modulator are analyzed to reasonably allocate the switched-capacitor sizes for optimal signal to noise ratio (SNR) and minimum chip area. The coefficients in feedback path and input path are optimized to avoid the signal distortion under the full-scale input voltage range with almost no increase in total capacitance sizes. Fabricated in 0.5 µm CMOS technology and powered by a 5 V voltage supply, the proposed delta-sigma modulator can achieve 136 dB peak SNR with 16 Hz input and 137 dB dynamic range in 100 Hz signal bandwidth with an oversampling ratio of 512. The modulator dissipates 700 µA. The core chip area is 1.96 mm2. The modulator occupies 1.41 mm2 and the decimator occupies 0.55 mm2.

A Two-Step Self-Startup Hybrid Structure Step-Up Converter Using Standard 5P0 MOSFETs Achieving 36 × Voltage Boosting With 50 mV Input Voltage and 84 × Input Voltage Range for Self-Powered IoT Applications

A Two-Step Self-Startup Hybrid Structure Step-Up Converter Using Standard 5P0 MOSFETs Achieving 36 × Voltage Boosting With 50 mV Input Voltage and 84 × Input Voltage Range for Self-Powered IoT Applications

An improved transient performance boost converter using pseudo-current hysteresis control

This paper introduces an enhanced low transient voltage and fast transient response boost converter. It uses a hysteresis-controlled circuit fed by a voltage signal from a rail-to-rail current sensor, resulting in improved efficiency, and transient response. The converter is designed using Taiwan semiconductor manufacturing company (TSMC) 0.18 µm CMOS 1P6M technology, delivers an output voltage of 1.8 V while operating with an input voltage range of 0.5 V to 1 V and supports an output load current range of 10 to 100 mA. The key contributions of this paper are: i) introducing a new boost converter architecture employing pseudo-current hysteresis-controlled (PCHC) techniques, ii) incorporating voltage and current loops into the proposed architecture, and iii) demonstrating superior transient performance. Experimental measurements reveal a peak power efficiency of 98.6% at 10 mA and transient times of 15.4 µs and 11.8 µs for a step load change from 10 to 100 mA and back to 10 mA, respectively, with transient voltages of 51 mV. The presented boost converter outperforms in terms of performance, compared to previous works using the figure of merit (FOM) formula.

Dual‐channel pre‐regulator structure for the bandgaps in high step‐down DC‐DC converters

AbstractHigh step‐down DC‐DC converters require a robust and low power pre‐regulated supply for bandgap reference. This paper proposes a structure that comprised of two current paths to achieve energy efficient pre‐regulation under high and low input voltage conditions. The design eliminated large size resistors for current limiting which is usually required for high input supplies. The presented pre‐regulator structure combined with the bandgap circuit was realized with the TSMC 180‐nm BCD process. The measured results show the proposed structure has a wide input voltage range of 3.5–45 V, a temperature coefficient of 5.63 ppm/°C and typical average current consumption of 1.1 μA.

A Wide Input Voltage Range Switched-Capacitor Multilevel Inverter Based on Adjustable Number of Output Levels

A Wide Input Voltage Range Switched-Capacitor Multilevel Inverter Based on Adjustable Number of Output Levels

A 4.65 [formula omitted]V/V line regulation, transient enhanced, capacitor-less LDO with ultra-low load current dependence

A capacitor-less low-dropout regulator (CL-LDO) based on an improved flipped voltage follower (FVF) cell with robust regulation capability and high transient response is presented. The line regulation (LNR) and load regulation (LAR) are enhanced by a stable DC operating point design and multiple feedback loops. A nested feed-forward gm-stage and a nulling resistor in the nested Miller compensation (NGRNMC) topology ensures stability in various challenging conditions. The proposed CL-LDO was designed in 0.18μm BiCMOS technology and occupied an area of 0.0582 mm2, with a typical input voltage range of 3.0 V–3.6 V and a load range of 0–100 mA. Post-simulation verification under various process, voltage, and temperature (PVT) conditions confirms the design’s robustness and reliability. The proposed design achieves the best figure of merit (FoM) of 1.69 mV among state-of-the-art designs, accompanied by a LNR of 4.65 μV/V and a LAR of 27.881 nV/mA.

A high-efficiency primary-side regulation control strategy for half-bridge LLC resonant converter with wide input voltage range

The requirement of the half-bridge LLC resonant converter with a wide input voltage range is becoming higher in photovoltaic applications because of its simple structure and low switching loss. Conventional frequency modulation (FM) requires a wide switching frequency range and a high-quality factor circuit design, leading to reduced efficiency and large component volumes at light loads. To solve the problems, a high-efficiency control strategy using adaptive pulse-width and frequency modulation (APWFM) is proposed. APWFM adjusts the gain by changing the switching frequency and duty cycle simultaneously. When the output power is below the reference value, the switching frequency decreases linearly as the output power decreases, and the duty cycle is simultaneously modulated to achieve constant output voltage, so the switching frequency variation range is smaller than FM. This results in improved light or medium load efficiency in a limited frequency range while keeping a small volume of magnetic components. Also, the proposed control strategy is realized with primary-side regulation (PSR) to eliminate the optocoupler and simplify the control circuit. Experimental results demonstrate a significant improvement in efficiency at medium and light loads compared to FM, and the average efficiency is improved by 5% based on low cost and simple operation.

A real-time dynamic range expansion approach of multi-channel sampling system

Dynamic range (DR) is one of the most critical factors for evaluating a signal processing system. It is limited by all electronic components that signal passes through in the circuit, including the amplifier, analog-to-digital converter and etc. Based on the signal acquisition structure of synchronous sampling with multiple conditioning channels, this paper proposed a method to expand the DR of the system. The proposed method involves the iterative algorithm to calculate the gain and offset between different channels, the threshold voltage setting principles of channel switching, and the data combination approach. More importantly, it can easily be applied in programmable logic gate array in the real-time system. On the basis of ensuring system sensitivity, the input voltage range is increased by combining data from different channels, thereby the DR of the system is increased. The experimental results in the sampling board of the vibration and audio signal analyzer show that the method we discussed in this article has a significant effect on DR expansion in the sampling system.

A NOVEL HIGH-GAIN DC-DC CONVERTER APPLIED IN FUEL CELL VEHICLES

Fuel cell cars should have DC-DC converters with high efficiency, low voltage stress, small size, and high gain. Nevertheless, the requirements are not met by traditional two-level, three-level, or cascaded boost converters. In this work, a novel non-isolated DC-DC converter with switched capacitor and switched inducer is proposed. The proposed non-isolated DC-DC converter exhibits a common ground structure, ensuring high gain, a broad input voltage range, and minimal voltage stresses across components. The comprehensive study includes an analysis of component parameters, the elucidation of the working principle, and thorough comparisons with other high-gain converters. To establish a dynamic model, the small-signal modeling approach and state-space averaging method are employed. Experimental and simulation data affirm that the suggested structure performs as intended. The experimental prototype operates within an input voltage range of 25V to 80V, featuring a rated output voltage of 200V and a rated power of 100W. The converter achieves its most efficient state at 93.1%, an aspect that may be underappreciated. Importantly, the recommended converter is deemed suitable for fuel cell vehicles, offering a promising solution to address their unique requirements.

Fully Soft Switched Resonant Isolated SEPIC Converter With Wide Input Voltage Range

Fully Soft Switched Resonant Isolated SEPIC Converter With Wide Input Voltage Range

Single-Phase Universal-Input PFC Converter Operating at High Frequency

Single-phase ac to dc converters for computers and related applications have requirements that are difficult to meet while achieving both high power density and high efficiency: wide input voltage range, large voltage step down, galvanic isolation, harmonic current limits and hold-up requirements. This work explores a circuit architecture and topology that is structured to facilitate operation at multi-MHz frequencies in order to address this challenge. We present a 250 W, 24 V output, universal input PFC converter prototype that leverages the proposed approach to achieve a power density of 34.9 W/in <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sup> while meeting the 80 PLUS Platinum efficiency standard, EN61000-3-2 line harmonic requirements and half-cycle holdup. The converter operates at variable switching frequencies in the range of 1-4 MHz; the measured efficiency at 230 Vac RMS, 60 Hz input is 95.33% at full load and 84.57% at 8% load.

A Capacitorless LDO Regulator with Fast Feedback Loop and Damping-Factor-Control Frequency Compensation

A fast feedback loop (FFL) based on comparators is proposed in this paper. The FFL improves the transient response characteristics of the output-capacitorless low-dropout (OCL-LDO) regulator. When the load current switches between 1 mA and 100 mA with 1 μs edge time, the overshoot and undershoot are 33 mV and 37 mV, respectively, and recovery time is 1.2 μs and 1.6 μs, respectively. A damping-factor-control (DFC) frequency compensation circuit is used to ensure the stability of the OCL-LDO, and the simulation results show that the phase margin exceeds 50 degree in the entire load variation range. This design is based on 180 nm process, and the area of the chip is 0.068 mm2 (without pads). A band-gap reference circuit is also designed in this work; its output voltage is 1.2 V and its temperature coefficient is 7.96 ppm/∘C. The input voltage range of the proposed OCL-LDO is 2.5 V to 5 V with a linear regulation rate of 0.128 mV/V and a load regulation rate of 0.0017 mV/mA. In addition, the load range of the proposed OCL-LDO is 0 mA to 100 mA, and the minimum required external capacitance is 0 F. The power supply rejection ratio (PSRR) is −46 dB @ 1 kHz.

A five‐level common‐ground inverter with step‐up/step‐down dual‐mode operation for transformerless grid‐connected PV application

AbstractStep‐up multilevel inverters with common‐ground feature are attractive for transformerless photovoltaic systems. However, their performance deteriorates at step‐down voltage range. Considering a five‐level inverter with double voltage gain, the number of output voltage levels decreases from 5 to 3 for a modulation index smaller than 0.5, declining the quality of the output currents. This paper proposes a new dual‐mode five‐level common‐grounded inverter with a reduced number of switches. The proposed topology has the ability to operate as step‐up or step‐down making it well suited for application with wide input voltage range. The proposed inverter consists of five unidirectional switches, one bidirectional switch, two diodes, and two capacitors. In addition, the description of the topology, the design guidelines, and a comparison among the main topologies are given in detail. Experimental results are obtained to attest the practicability of the proposed solution.

Performance Enhancement of Organic Ternary Logic Circuits through UV Irradiation and Geometry Optimization

AbstractMultivalued logic (MVL) circuits offer higher information density compared with conventional binary logic circuits. However, achieving a proper balance between logic states and a low‐voltage gain remains a challenge in MVL devices. This study proposes two strategies to address this problem: using the optical absorption of organic semiconductors and optimizing device geometry. A ternary inverter is fabricated using a series circuit consisting of an antiambipolar transistor with a heterojunction of C8‐BTBT and PTCDI‐C8 semiconductors and a PTCDI‐C8 transistor. Although the inverter exhibits three distinct logic levels, it suffers from an inadequate voltage balance between the ternary logic states. To overcome this, UV light irradiation is employed first to modulate the transistor characteristics, thus improving the output voltage level and input voltage range of the logic ½ state. Subsequently, the channel length of the PTCDI‐C8 transistor is optimized to further enhance the voltage transfer characteristics of the inverter. Through these combined techniques, ideal output voltage levels are achieved for all three logic states along with an enhanced voltage gain during the transition from the logic ½ state to the logic 0 state. This work is thus an advancement toward reliable, efficient organic ternary logic circuits.

A novel framework for enhancing the power quality of electrical vehicle battery charging based on a modified Ferdowsi Converter

A DC–DC converter in an EV charging station is to regulate the DC voltage from the rectifier to the required voltage for battery charging. This ensures that a constant, stable, and safe charging voltage is provided to the battery However, if the EV charging is done only with a DC–DC​ converter, it results in poor Power Quality (PQ), with high levels of harmonic distortion and a low power factor. This can lead to longer charging times, increased energy costs, decreased battery performance and life, and introduce serious PQ issues. To address these issues, the Ferdowsi Converter is proposed is a combination of two interleaved Buck-Boost converters with a common input inductor as a solution with simplified PT control strategy presented, operated in operating in discontinuous conduction mode (DCM) is presented, which can achieve nearly unity power factor (PF) over universal input voltage range studied. The converter performs with fewer components, providing a charger input current that is in phase with the mains voltage, reducing the THD to below 5% under steady state and during variations in line and load side.