Input Spike Research Articles

BPLC + NOSO: backpropagation of errors based on latency code with neurons that only spike once at most

For mathematical completeness, we propose an error-backpropagation algorithm based on latency code (BPLC) with spiking neurons conforming to the spike–response model but allowed to spike once at most (NOSOs). BPLC is based on gradients derived without approximation unlike previous temporal code-based error-backpropagation algorithms. The latency code uses the spiking latency (period from the first input spike to spiking) as a measure of neuronal activity. To support the latency code, we introduce a minimum-latency pooling layer that passes the spike of the minimum latency only for a given patch. We also introduce a symmetric dual threshold for spiking (i) to avoid the dead neuron issue and (ii) to confine a potential distribution to the range between the symmetric thresholds. Given that the number of spikes (rather than timesteps) is the major cause of inference delay for digital neuromorphic hardware, NOSONets trained using BPLC likely reduce inference delay significantly. To identify the feasibility of BPLC + NOSO, we trained CNN-based NOSONets on Fashion-MNIST and CIFAR-10. The classification accuracy on CIFAR-10 exceeds the state-of-the-art result from an SNN of the same depth and width by approximately 2%. Additionally, the number of spikes for inference is significantly reduced (by approximately one order of magnitude), highlighting a significant reduction in inference delay.

Synaptic self-organization of spatio-temporal pattern selectivity.

Spiking model neurons can be set up to respond selectively to specific spatio-temporal spike patterns by optimization of their input weights. It is unknown, however, if existing synaptic plasticity mechanisms can achieve this temporal mode of neuronal coding and computation. Here it is shown that changes of synaptic efficacies which tend to balance excitatory and inhibitory synaptic inputs can make neurons sensitive to particular input spike patterns. Simulations demonstrate that a combination of Hebbian mechanisms, hetero-synaptic plasticity and synaptic scaling is sufficient for self-organizing sensitivity for spatio-temporal spike patterns that repeat in the input. In networks inclusion of hetero-synaptic plasticity that depends on the pre-synaptic neurons leads to specialization and faithful representation of pattern sequences by a group of target neurons. Pattern detection is robust against a range of distortions and noise. The proposed combination of Hebbian mechanisms, hetero-synaptic plasticity and synaptic scaling is found to protect the memories for specific patterns from being overwritten by ongoing learning during extended periods when the patterns are not present. This suggests a novel explanation for the long term robustness of memory traces despite ongoing activity with substantial synaptic plasticity. Taken together, our results promote the plausibility of precise temporal coding in the brain.

Brain-Inspired Spike Echo State Network Dynamics for Aero-Engine Intelligent Fault Prediction

Aero-engine fault prediction aims to accurately predict the development trend of the future state of aero-engines, so as to diagnose faults in advance. Traditional aero-engine parameter prediction methods mainly use the nonlinear mapping relationship of time series data but generally ignore the adequate spatio-temporal features contained in aero-engine data. To this end, we propose a brain-inspired spike echo state network (Spike-ESN) model for aero-engine intelligent fault prediction, which is used to effectively capture the evolution process of aero-engine time series data in the framework of spatio-temporal dynamics. In the proposed approach, we design a spike input layer based on Poisson distribution inspired by the spike neural encoding mechanism of biological neurons, which can extract the useful temporal characteristics in aero-engine sequence data. Then, the temporal characteristics are input into a spike reservoir through the current calculation method of spike accumulation in neurons, which projects the data into a high-dimensional sparse space. In addition, we use the ridge regression method to read out the internal state of the spike reservoir. Finally, the experimental results of aero-engine states prediction demonstrate the superiority and potential of the proposed method.

Efficient Motion Symbol Detection and Multikernel Learning for AER Object Recognition

Address event representation (AER) vision sensors process visual information by monitoring changes in light intensity and generating event streams. In this article, a threshold mechanism based on the statistical results of the peak membrane potentials is proposed to improve the accuracy and efficiency of the motion symbol detection (MSD) method based on the leaky integrate-and-fire (LIF) neuron model and a peak spiking monitoring unit (PSMU). A multikernel learning algorithm based on the tempotron rule, namely, MK-tempotron, is proposed to improve the antinoise performance of the classifier. In MK-tempotron, different kernels are applied to calculate the post-synaptic membrane potentials (PSPs) according to different input spiking patterns, to counteract the impact of noise on the spiking activities, so that the synaptic weights can be changed in the direction of correct firing. We verified the effectiveness of the threshold mechanism and multikernel learning on a variety of data sets. The experimental results show that among the several recent algorithms based on the temporal encoding and spiking neural network classifier, which have advantages in power consumption and network latency, our method achieved the best accuracy on MNIST-DVS (100 ms) and N-CARS, and it also achieved competitive results on N-MNIST, CIFAR10-DVS, Posture-DVS, Poker-DVS, and MNIST-DVS (200 ms/500 ms/2000 ms).

An Energy Efficient STDP-Based SNN Architecture With On-Chip Learning

In this paper, we propose a spike-time based unsupervised learning method using spiking-timing dependent plasticity (STDP). A simplified linear STDP learning rule is proposed for the energy efficient weight updates. To reduce unnecessary computations for the input spike values, a stop mechanism of the forward pass is introduced in the forward pass. In addition, a hardware-friendly input quantization scheme is used to reduce the computational complexities in both the encoding phase and the forward pass. We construct a two-layer fully-connected spiking neuron network (SNN) based on the proposed method. Compared to general rate-based SNNs trained by STDP, the proposed method reduces the complexity of network architecture (an extra inhibitory layer is not needed) and the computations of synaptic weight updates. According to the fixed-point simulation with 9-bit synaptic weights, the proposed SNN with 6144 excitatory neurons achieves 96% of recognition accuracy on MNIST dataset without any supervision. An SNN processor that contains 384 excitatory neurons with on-chip learning capability is designed and implemented with 28 nm CMOS technology based on the proposed low complexity methods. The SNN processor achieves an accuracy of 93% on MNIST dataset. The implementation results show that the SNN processor achieves a throughput of 277.78k FPS with <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$0.50~\mu \text{J}$ </tex-math></inline-formula> /inference energy consuming in inference mode, and a throughput of 211.77k FPS with <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$0.66~\mu \text{J}$ </tex-math></inline-formula> /learning energy consuming in learning mode.

An improved nine‐level switched capacitor‐based inverter with voltage boosting capability and limitation of capacitor current spikes for PV applications

To proceed to a net zero carbon world and to mitigate the environmental challenges associated with it, integration speed of renewable energy sources such as photovoltaic (PV) systems has been increased around the world. Here, an improved switched-capacitor based nine-level inverter is introduced for PV applications. This topology has several benefits such as, voltage boosting feature, using a single DC source, reduction of capacitor charging current spike and extendable input voltage. This inverter produces nine-level output voltage waveform using single power supply. This topology, using identical two capacitors in parallel with a single DC source, can boost the input voltage. In this inverter to limit spike current of capacitor charging mode, an inductor is placed in the charging path of capacitors with a parallel diode. The power losses and overall efficiency analysis of the improved inverter are considered. To verify the accurate performance of inverter under a step change on power flows, simulation results are obtained by MATLAB/Simulink software and presented. To highlight the benefits of the inverter, a comparison of improved topology with most recent topologies is performed. Finally, to verify the feasibility and performance of the improved inverter, experimental results of a 770 W grid-tied prototype are presented.

A step-up multilevel inverter with reduced devices and input current ripple

ABSTRACT This article presents a step-up multilevel inverter with a reduced number of devices. The inverter can realise nine output voltage levels with 4 times higher input source voltage at the output with 11 switching devices. The inverter uses switched capacitor (SC) technique to step up the output voltage. One of the important drawbacks of the recently proposed SC-based MLI is the higher input current ripples or spikes due to the capacitor charging states. These high ripples hamper the life of the source such as photovoltaic (PV) array or fuel cells. The proposed inverter can lower the input current ripples than others as well as can provide the maximum boosting at the output voltage. A detailed discussion on the operating principle, selection procedure of components, and power losses analysis of the proposed inverter has been presented. Furthermore, a comparative evaluation shows a significant reduction of input current spikes and component count of the proposed inverter than others. Moreover, the proposed inverter provides a lower cost function per boosting factor per level as compared to others. The performances of the inverter are verified by an extensive simulation and experimental study. The inverter works well with desired performances under different load conditions.

A Novel 17-Level Reduced Component Single DC Switched-Capacitor-Based Inverter With Reduced Input Spike Current

Multilevel inverters (MLIs) have become common and resourceful as a result of the fast advancement of technology in the areas of high-voltage and high-power applications, among other things. Recently, MLIs have received a great deal of attention recently, due to the growing need to harness environmentally friendly energy. With reduced power electronics switches, diodes, and a voltage boost gain factor of 8, this article presents a single-phase 17-level switching capacitor inverter design. The proposed inverter uses single dc voltage source, two diodes, 14 power electronics switches, and three capacitors. The different mode of operation of topology is explained in detail, including their self-voltage balancing technique. Additionally, an inductor is used in the capacitor charging loop to avoid current spikes caused by the input dc source while charging the capacitor quickly, thereby increasing capacitor life expectancy significantly. Compared to previously the proposed single-input MLIs, the proposed inverter has a lower semiconductor switch count and a lower cost function value that are its distinguished feature. The performance of the topology is verified by MATLAB/Simulink, and furthermore, a laboratory prototype is utilized, which confirms the feasibility of the proposed topology.

Analyzing time-to-first-spike coding schemes: A theoretical approach.

Spiking neural networks (SNNs) using time-to-first-spike (TTFS) codes, in which neurons fire at most once, are appealing for rapid and low power processing. In this theoretical paper, we focus on information coding and decoding in those networks, and introduce a new unifying mathematical framework that allows the comparison of various coding schemes. In an early proposal, called rank-order coding (ROC), neurons are maximally activated when inputs arrive in the order of their synaptic weights, thanks to a shunting inhibition mechanism that progressively desensitizes the neurons as spikes arrive. In another proposal, called NoM coding, only the first N spikes of M input neurons are propagated, and these “first spike patterns” can be readout by downstream neurons with homogeneous weights and no desensitization: as a result, the exact order between the first spikes does not matter. This paper also introduces a third option—“Ranked-NoM” (R-NoM), which combines features from both ROC and NoM coding schemes: only the first N input spikes are propagated, but their order is readout by downstream neurons thanks to inhomogeneous weights and linear desensitization. The unifying mathematical framework allows the three codes to be compared in terms of discriminability, which measures to what extent a neuron responds more strongly to its preferred input spike pattern than to random patterns. This discriminability turns out to be much higher for R-NoM than for the other codes, especially in the early phase of the responses. We also argue that R-NoM is much more hardware-friendly than the original ROC proposal, although NoM remains the easiest to implement in hardware because it only requires binary synapses.

Design of Self-Adaptive Weighted Neuron model using Floating Gate Technology

The paper presents an analog circuit solution for implementing models of synapses with short-term adaption, derives an analytical solution (Floating gate charge as weights) for spiking input signals, and presents simulation results using a 45nm CMOS process using floating gate technology. The circuit is suitable for integration in large arrays of integrate-and-fire neurons and thus, can be used for evaluating computational roles of short-term adaption at the network level. Proposed floating gate p channel MOSFET (FGPMOS) can self-adapt, learn and store data with help of external voltages highly precise non-volatile and stable programming of weights (training) after fabrication of circuit have been performed. On application of feedback in the circuit, short-term self-adaption with spiking input signal has been observed. The model can also demonstrate homeostatic intrinsic plasticity, spike-based algorithms, and LMS algorithms. The model has a 4.5µV/℃ temperature coefficient, 0.675µW power consumption, and consumes a chip area of about 130×90 nm2. The model is compact, low power, and stable. The proposed circuit has been applied to design a cell membrane (bio-sensor CMOS-based circuit) depicting the effect of Sodium (NA) and Potassium (K) on synaptic action. With the help of the Na and K feedback circuit, effects of polarization and depolarization on synapse output have been demonstrated and thus depict spike-timing-dependent plasticity. The work can be extended to design a complete neural architecture, an array of such complete neural cells, in turn, can design devices for assistive technology or human-like machines.

Heterosynaptic Plasticity Achieved by Highly Anisotropic Ionic Migration in Layered LixMoO3 for Neuromorphic Application

AbstractHeterosynaptic plasticity is important for the implementation of biological functions in an excitatory synapse. Although plenty of devices have been developed to emulate the synaptic behaviors, the capability of processing information with high heterosynaptic plasticity remains challenging. Herein, it is reported that the electrical conductance of Li+ ion pre‐intercalated MoO3 nanosheet (LixMoO3: 0 &lt; x &lt; 1) can be efficiently modulated, relying on the local phase transition associated with electric‐field‐driven ionic migration. The LixMoO3‐based in‐plane synaptic device exhibits attractive nonvolatile memory performance including high switching ratio (≈500) and long‐term retention of states (&gt;4000 s). By combining experimental studies with theoretical calculations, the anisotropic in‐plane ionic migration in LixMoO3 is revealed, which is attributed to the dissimilarity of adiabatic barriers along different crystallographic directions. A multiterminal LixMoO3 memristor responses anisotropically to input spikes, and the slope of conductance change along a‐axis is almost 7 times larger than that along c‐axis, which contributes to the emulation of heterosynaptic plasticity required for neurobiological architecture. Additionally, the device can also fulfill the in‐memory Boolean logic operations naturally. This work demonstrates the great potentials of ionic migration to develop artificial synapses, highlighting its promising applications for future brain‐inspired computing systems.

Communication Theoretical Modeling and Analysis of Tripartite Synapses With Astrocytes in Synaptic Molecular Communication

Astrocytes, the most abundant glial cells in brain, being in physical proximity of pre- and postsynaptic terminals of the chemical synapse, form tripartite synapses. The feedback from astrocytes introduces synaptic plasticity, which modulates information transmission through neurons. Various other synaptic events also cause plasticity, hence combining them in a single model is quite challenging. In this paper, we study the combined effect of short-term depression (STD) and long-term potentiation (LTP) on vesicle release process in a tripartite synapse. STD decreases the release probability due to slower replenishment rates of releasable vesicles, whereas LTP is due to the positive feedback from astrocytes that increases release probability. Thus, we evaluate vesicle release probability and mutual information between input spikes and vesicle release to quantify the effects of STD and LTP on information transmission. Moreover, the effect of different synaptic parameters such as number of releasable vesicles, input spike rate and replenishment rate of the vesicles, is analyzed on information transmission. It is observed that release probability is predominantly affected by LTP, however, presence of STD decreases the achievable average mutual information over time. Furthermore, the synapses with higher number of releasable vesicles are observed to become stronger with time.

Compartmental spiking neuron model CSNM

The purpose of this work is to develop a compartment spiking neuron model as an element of growing neural networks. Methods. As part of the work, the CSNM is compared with the Leaky Integrate-and-Fire model by comparing the reactions of point models to a single spike. The influence of hyperparameters of the proposed model on neuron excitation is also investigated. All the described experiments were carried out in the Simulink environment using the tools of the proposed library. Results. It was concluded that the proposed model is able to qualitatively reproduce the reaction of the point classical model, and the tuning of hyperparameters allows reproducing the following patterns of signal propagation in a biological neuron: a decrease in the maximum potential and an increase in the delay between input and output spikes with an increase in the size of the neuron or the length of the dendrite, as well as an increase in the potential with an increase in the number of active synapses. Conclusion. The proposed compartment spiking neuron model allows to describe the behavior of biological neurons at the level of pulse signal conversion. The hyperparameters of the model allow tuning the neuron responses at fixed other neuron parameters. The model can be used as a part of spiking neural networks with details at the level of compartments of neurons dendritic trees.

Bi-directional Control of Synaptic Input Summation and Spike Generation by GABAergic Inputs at the Axon Initial Segment.

Differing from other subtypes of inhibitory interneuron, chandelier or axo-axoniccells form depolarizing GABAergic synapses exclusively onto the axon initial segment (AIS) of targeted pyramidal cells (PCs). However, the debate whether these AIS-GABAergic inputs produce excitation or inhibition in neuronal processing is not resolved. Using realistic NEURON modeling and electrophysiological recording of cortical layer-5 PCs, we quantitatively demonstrate that the onset-timing of AIS-GABAergic input, relative to dendritic excitatory glutamatergic inputs, determines its bi-directional regulation of the efficacy of synaptic integration and spike generation in a PC. More specifically, AIS-GABAergic inputs promote the boosting effect of voltage-activated Na+ channels on summed synaptic excitation when they precede glutamatergic inputs by >15 ms, while for nearly concurrent excitatory inputs, they primarily produce a shunting inhibition at the AIS. Thus, our findings offer an integrative mechanism by which AIS-targeting interneurons exert sophisticated regulation of the input-output function in targeted PCs.

Photonic spiking neural networks with event-driven femtojoule optoelectronic neurons based on Izhikevich-inspired model.

Photonic spiking neural networks (PSNNs) potentially offer exceptionally high throughput and energy efficiency compared to their electronic neuromorphic counterparts while maintaining their benefits in terms of event-driven computing capability. While state-of-the-art PSNN designs require a continuous laser pump, this paper presents a monolithic optoelectronic PSNN hardware design consisting of an MZI mesh incoherent network and event-driven laser spiking neurons. We designed, prototyped, and experimentally demonstrated this event-driven neuron inspired by the Izhikevich model incorporating both excitatory and inhibitory optical spiking inputs and producing optical spiking outputs accordingly. The optoelectronic neurons consist of two photodetectors for excitatory and inhibitory optical spiking inputs, electrical transistors' circuits providing spiking nonlinearity, and a laser for optical spiking outputs. Additional inclusion of capacitors and resistors complete the Izhikevich-inspired optoelectronic neurons, which receive excitatory and inhibitory optical spikes as inputs from other optoelectronic neurons. We developed a detailed optoelectronic neuron model in Verilog-A and simulated the circuit-level operation of various cases with excitatory input and inhibitory input signals. The experimental results closely resemble the simulated results and demonstrate how the excitatory inputs trigger the optical spiking outputs while the inhibitory inputs suppress the outputs. The nanoscale neuron designed in our monolithic PSNN utilizes quantum impedance conversion. It shows that estimated 21.09 fJ/spike input can trigger the output from on-chip nanolasers running at a maximum of 10 Gspike/second in the neural network. Utilizing the simulated neuron model, we conducted simulations on MNIST handwritten digits recognition using fully connected (FC) and convolutional neural networks (CNN). The simulation results show 90% accuracy on unsupervised learning and 97% accuracy on a supervised modified FC neural network. The benchmark shows our PSNN can achieve 50 TOP/J energy efficiency, which corresponds to 100 × throughputs and 1000 × energy-efficiency improvements compared to state-of-art electrical neuromorphic hardware such as Loihi and NeuroGrid.

Application of a Compartmental Spiking Neuron Model with Structural Adaptation for Solving Classification Problems

The problem of classification using a compartmental spiking neuron model is considered. The state of the art of spiking neural networks analysis is carried out. It is concluded that there are very few works on the study of compartmental neuron models. The choice of a compartmental spiking model is justified as a neuron model for this work. A brief description of such a model is given, and its main features are noted in terms of the possibility of its structural reconfiguration. The method of structural adaptation of the model to the input spike pattern is described. The general scheme of the compartmental spiking neurons’ organization into a network for solving the classification problem is given. The time-to-first-spike method is chosen for encoding numerical information into spike patterns, and a formula is given for calculating the delays of individual signals in the spike pattern when encoding information. Brief results of experiments on solving the classification problem on publicly available data sets (Iris, MNIST) are presented. The conclusion is made about the comparability of the obtained results with the existing classical methods. In addition, a detailed step-by-step description of experiments to determine the state of an autonomous uninhabited underwater vehicle is provided. Estimates of computational costs for solving the classification problem using a compartmental spiking neuron model are given. The conclusion is made about the prospects of using spiking compartmental models of a neuron to increase the bio-plausibility of the implementation of behavioral functions in neuromorphic control systems. Further promising directions for the development of neuromorphic systems based on the compartmental spiking neuron model are considered.

Multiple Phase Transitions for an Infinite System of Spiking Neurons

We consider a stochastic model describing the spiking activity of a countable set of neurons spatially organized into a homogeneous tree of degree $d$, $d \geq 2$; the degree of a neuron is just the number of connections it has. Roughly, the model is as follows. Each neuron is represented by its membrane potential, which takes non-negative integer values. Neurons spike at Poisson rate 1, provided they have strictly positive membrane potential. When a spike occurs, the potential of the spiking neuron changes to 0, and all neurons connected to it receive a positive amount of potential. Moreover, between successive spikes and without receiving any spiking inputs from other neurons, each neuron's potential behaves independently as a pure death process with death rate $\gamma \geq 0$. In this article, we show that if the number $d$ of connections is large enough, then the process exhibits at least two phase transitions depending on the choice of rate $\gamma$: For large values of $\gamma$, the neural spiking activity almost surely goes extinct; For small values of $\gamma$, a fixed neuron spikes infinitely many times with a positive probability, and for "intermediate" values of $\gamma$, the system has a positive probability of always presenting spiking activity, but, individually, each neuron eventually stops spiking and remains at rest forever.

Synapse and Tunable Leaky-Integrate Neuron Functions Enabled by Oxide Trapping Dynamics in a Single Logic Transistor

We show that a high-k gated n-MOSFET can embody both the memory plasticity of a synapse and leaky-integration of a neuron, by virtue of the rich temporal dynamics of charge capture/emission by gate-oxide defects. In addition, a tunable leaky-integrate function is demonstrated. The lower limit of energy per input spike is on the order of fJ, which provides room for low-power trigger circuit design and scalability. This work points to the prospect of a gate-engineered logic transistor serving as the universal building block of hardware spiking neural networks, thereby accelerating the realization of compact, energy efficient neuromorphic computers given the relative maturity of the transistor technology.

Event-Driven Intrinsic Plasticity for Spiking Convolutional Neural Networks.

The biologically discovered intrinsic plasticity (IP) learning rule, which changes the intrinsic excitability of an individual neuron by adaptively turning the firing threshold, has been shown to be crucial for efficient information processing. However, this learning rule needs extra time for updating operations at each step, causing extra energy consumption and reducing the computational efficiency. The event-driven or spike-based coding strategy of spiking neural networks (SNNs), i.e., neurons will only be active if driven by continuous spiking trains, employs all-or-none pulses (spikes) to transmit information, contributing to sparseness in neuron activations. In this article, we propose two event-driven IP learning rules, namely, input-driven and self-driven IP, based on basic IP learning. Input-driven means that IP updating occurs only when the neuron receives spiking inputs from its presynaptic neurons, whereas self-driven means that IP updating only occurs when the neuron generates a spike. A spiking convolutional neural network (SCNN) is developed based on the ANN2SNN conversion method, i.e., converting a well-trained rate-based artificial neural network to an SNN via directly mapping the connection weights. By comparing the computational performance of SCNNs with different IP rules on the recognition of MNIST, FashionMNIST, Cifar10, and SVHN datasets, we demonstrate that the two event-based IP rules can remarkably reduce IP updating operations, contributing to sparse computations and accelerating the recognition process. This work may give insights into the modeling of brain-inspired SNNs for low-power applications.

ALSA: Associative Learning Based Supervised Learning Algorithm for SNN.

Spiking neural network (SNN) is considered to be the brain-like model that best conforms to the biological mechanism of the brain. Due to the non-differentiability of the spike, the training method of SNNs is still incomplete. This paper proposes a supervised learning method for SNNs based on associative learning: ALSA. The method is based on the associative learning mechanism, and its realization is similar to the animal conditioned reflex process, with strong physiological plausibility and rationality. This method uses improved spike-timing-dependent plasticity (STDP) rules, combined with a teacher layer to induct spikes of neurons, to strengthen synaptic connections between input spike patterns and specified output neurons, and weaken synaptic connections between unrelated patterns and unrelated output neurons. Based on ALSA, this paper also completed the supervised learning classification tasks of the IRIS dataset and the MNIST dataset, and achieved 95.7 and 91.58% recognition accuracy, respectively, which fully proves that ALSA is a feasible SNNs supervised learning method. The innovation of this paper is to establish a biological plausible supervised learning method for SNNs, which is based on the STDP learning rules and the associative learning mechanism that exists widely in animal training.