Input-series-output-parallel Research Articles

Auxiliary Power Supply for Input-Series Output-Parallel Medium-Voltage Solid State Transformers

Auxiliary power supply (APS) is an essential component of medium voltage (MV) solid state transformers (SSTs) feeding the auxiliary units, such as gate drivers, controllers and sensors. Usually APSs are obtained from the distributed bus, which may cause the input voltage imbalance before the main power transmission. This paper proposed a new design for isolated APS of an input-series output-parallel (ISOP) SST. The designed distributed MV APSs are galvanically isolated by flybacks, and the centralized APS on the low voltage (LV) side is supplied from the MV APSs via a decoupling four-port medium frequency transformer (MFT) with high isolation voltage. To solve the issue of input voltage imbalance posed by the ISOP system, a dual-loop control scheme based on APS-fluctuating is proposed, which can realize output voltage regulation (OVR) and input voltage sharing (IVS) simultaneously. The small-signal model, start-up strategy and parameter design of the proposed system are investigated. Finally, a 500 V/2.2 kW lab prototype of SST with APS has been built and the overall system efficiency reaches 95.1%.

H5-CFDAB: A Current-Fed Dual-Active-Bridge Converter for Application in Modular DC Solid-State Transformer

Isolated DC-DC converters in DC Solid-State Transformers (DCSSTs) must conform to stringent requirements such as high voltage conversion ratio, high efficiency, and reliable operation with grid fault handling capabilities. This paper proposes a novel current-fed Dual-Active-Bridge (CFDAB) converter, named H5-CFDAB, for modular DCSST application. Compared to the existing topologies, the proposed converter provides a single-stage power conversion with reduced component count and semiconductor Volt-Ampere (VA) rating. The proposed modulation scheme makes the pulse widths of the transformer winding voltages independent of the duty ratio. This allows further optimization of the high-frequency-link (HFL) characteristics like minimized HFL conduction losses and full range Zero-Voltage-Switching (ZVS) at turn ON for the switches, further increasing the converter efficiency. Several modules of the proposed H5-CFDAB converter connected in Input-Series-Output-Parallel (ISOP) configuration makes the system suitable for Medium-Voltage (MV) high-power applications. The operation of the proposed converter is analyzed in detail, including the HFL characteristics and derivation of the ZVS conditions for the switches. In addition, a closed-loop control scheme is proposed for achieving tight regulation of the converter outputs during transients. A 1.2 kW laboratory prototype is built to verify the effectiveness of the proposed converter, along with the control scheme.

An FPGA-Based Hierarchical Parallel Real-Time Simulation Method for Cascaded Solid-State Transformer

The cascaded H-bridge (CHB)-based solid-state transformer (SST) is a core interface device for power conversion in the distribution network. However, the complicated structures and higher switching frequencies bring significant challenges to real-time simulation and hardware-in-loop (HIL) testing. This article proposes a field-programmable gate array (FPGA)-based hierarchical parallel real-time simulation method for cascaded SST, which mainly includes highly parallel solving at the operation level, module level, and system level. A dual-port equivalent model of the cascaded SST is constructed based on the hierarchical parallel real-time simulation method. A cascaded SST containing 42 modules (630 components) can be simulated on a single FPGA with a minimum of 400 ns time-step. The information of the ports of the equivalent model and the information of the internal nodes of the cascaded SST can be obtained, which is the same as the simulation of detailed model. The real-time simulation of cascaded SST with input-series-output-parallel (ISOP) structure is carried out on a Xilinx Kintex-7 FPGA. The simulation results show that the real-time simulation waveforms are almost consistent with those in PSCAD/EMTDC software package.

A Burst Mode and Variable Frequency Voltage Sharing Control Mechanism for an Adjustable High Voltage Pulsed Converter

This article presents a modular adjustable high-voltage pulse (MAHVP) generation system. The proposed MAHVP generation system uses a combination of full-bridge LLC resonant converters whose input terminals are connected in parallel and whose output terminals are in series to boost the output voltage; input parallel output series configuration efficiently increases the power holding capabilities of the overall system. The MAHVP generation system uses a novel burst mode and variable frequency voltage sharing (BMVFVS) control mechanism, the BMVFVS control mechanism senses the type of load if the MAHVP generation system needs to operate at a heavy load, it uses the variable frequency voltage sharing method to divide the power equally between the modules to enhance the overall performance. For light load conditions, the MAHVP generation system operates in burst mode, and the BMVFVS control mechanism combined with the frequency modulation technique is used to control the amplitude and pulsewidth of the output voltage smoothly and efficiently. A hardware prototype of 2.4 kW is developed, and experimental results are taken to verify the feasibility and validity of the proposed system, the maximum output voltage of the developed two-module prototype is tested up to 6 kV at the high efficiency of 97%.

Autonomous Input Voltage Sharing Control and Triple Phase Shift Modulation Method for ISOP-DAB Converter in DC Microgrid: A Multiagent Deep Reinforcement Learning-Based Method

This article proposes a multiagent (MA) deep reinforcement learning (DRL) based autonomous input voltage sharing (IVS) control and triple phase shift modulation method for input-series output-parallel (ISOP) dual active bridge (DAB) converters to solve the three challenges: the uncertainties of the dc microgrid, the power balance problem, and the current stress minimization of the converter. Specifically, the control and modulation problem of the ISOP-DAB converter is formed as a Markov game with several DRL agents. Subsequently, the MA twin-delayed deep deterministic policy gradient (MA-TD3) algorithm is applied to train the DRL agents in an offline manner. After the training process, the multiple agents can provide online control decisions for the ISOP-DAB converter to balance the IVS, and minimize the current stress among different submodules. Without accurate model information, the proposed method can adaptively obtain the optimal modulation variable combinations in a stochastic and uncertain environment. Simulation and experimental results verify the effectiveness of the proposed MA-TD3-based algorithm.

Active Damping Control and Parameter Design Method for ISOP-Based Load Converter in DC Distribution System

To meet the diversified requirements of active damping configuration in a dc distribution system, the input-series-output-parallel (ISOP) load converter based on phase-shifted full-bridge (PSFB) modules is investigated in this article. The reduced-order impedance model of the PSFB-based ISOP converter with common-duty-ratio control is established first, and then the active damping control strategies using the primary- and secondary-side voltages are proposed, respectively. By reformulating the stability criterion in the form of impedance-frequency curves and using the impedance sensitivity, the sensitivity of resonance frequency is derived to develop a method for designing the parameters of active compensators. Finally, the experimental results demonstrate the effectiveness of the proposed active damping control strategies and parameter design method.

Input-Parallel Output-Series High Step-Up DC/DC Converter With Coupled Inductor and Switched Capacitor

Input-Parallel Output-Series High Step-Up DC/DC Converter With Coupled Inductor and Switched Capacitor

Stability Analysis and Design of Common Phase Shift Control for Input-Series Output-Parallel Dual Active Bridge With Consideration of Dead-Time Effect

Input-series output-parallel (ISOP) connected dual-active-bridge (DAB) converters allow the use for occasions requiring high input voltage and galvanic isolation with bidirectional power capability. However, when DAB converters are ISOP connected, the traditional analysis without consideration of the dead time cannot effectively explain the reason why the ISOP converter system is stable under common phase shift control (CPSC) when parameters are mismatched. In this article, it is first revealed that the stability of the ISOP DAB converter under common phase ratio control can be ensured by consideration of the dead time. Based on the analysis of the DAB power transmission characteristics with consideration of dead time, a new model is derived for the ISOP DAB converter, which can reveal the reason why the converter can operate stably under CPSC when the design parameters of the individual module are mismatched. Then, based on the derived model, the stability analysis and the parameters design are further performed. Finally, the effectiveness of the working principle and analysis is verified through results from a two-module ISOP experimental prototype.

Circuit Design for a 4-Channel EEG Pre-processing System with Programmable Output Control Capability

The design of a 4-channel Electro-encephalography (EEG) pre-processing circuit using 0.6m CMOS technology is proposed in this paper. The circuit is divided into two parts. To amplify and differentiate the Alpha, Beta, Delta, and Theta waves from the original EEG signal, a mixed-mode EEG pre-processing system with high gain, low power, and low input noise amplifier and four Gm-C band-pass filters driven by a 1V single power supply are designed. The 4-channel pre-processing system is implemented by connecting four of them in parallel. Second, a digital control circuit consisting of a Serial Input Parallel Output (SIPO) Shift Register and SRAM array is constructed and used to control the output of the pre-processing system, which is powered by a 3.8V power supply.

Design and Implementation of an 18-kW 500-kHz 98.8% Efficiency High-Density Battery Charger With Partial Power Processing

The demand for high-density, high-efficiency bidirectional battery chargers is driven by the fast development of energy storage system in renewable energy system, microgrid, and transportation electrification. Isolated dc–dc converter that interfaces a battery with a variable voltage range is one of the critical components. Input-parallel output-series (IPOS) partial power (PP) converter is considered a promising high-efficiency, high-density solution because only a fraction of power is processed via multistage converters to regulate the output voltage. However, due to the tight coupling between two dc transformers (DCXs), the design of PP converter is complicated. To solve this issue, an overall design procedure for a bidirectional soft-switching resonant-type PP converter is proposed. In the parameters design part, a decoupled design method is proposed to simplify the DCXs design. With this method, two DCXs can be designed separately, and a typical optimization method can be easily applied. As for the hardware design part, to minimize the ac loop inductance and resistance, a two-direction (2-D) flux cancellation method and an “intraleaving” winding structure are proposed for circuit layout and high-frequency (HF) transformer to obtain high operation efficiency and power density. Finally, the whole design procedure is verified by an 18-kW-rated, 25-kW peak, prototype operating at 500 kHz. The realized PP converter features a peak efficiency of 98. 8% and a power density of 142 W/in3. This article is accompanied by two videos demonstrating the dynamic voltage regulation test and the efficiency measurement.

A Second-Harmonic Suppression Method Based on Differentiated-Capacitance Design for Input-Parallel Output-Series DAB Fed Single-Phase VSI

In the single-phase voltage source inverter (VSI), the instantaneous output power pulsates at twice the line frequency, generating second-harmonic voltage in dc bus. Bulky electrolytic capacitors or additional auxiliary circuits are used in traditional methods, which inevitably limit the system lifetime, efficiency, and power density. In this article, the input-parallel output-series (IPOS) dual active bridge (DAB) with differentiated-capacitance design is adopted as the front-end dc–dc stage. The pulsating power is compensated by the energy gap that the differentiated output capacitors release. The small-signal model of the IPOS DAB fed VSI is built, and based on which, the voltage-complementary algorithm is proposed. Then, the preferred zone and optimization scheme of the main circuit parameters are designed according to the quantitative analysis of the suppressing effect. Furthermore, a 625-W IPOS DAB fed VSI design example is presented and tested. The experimental result shows that at least seven times the capacitance requirements can be reduced without any additional components, and the power quality of both the input current and the output voltage is well guaranteed.

Sharing Voltage and Current of an Input-Series–Output-Parallel Boost-LLC Converter

Modular input-series–output-parallel (ISOP) converters are very suitable for high-voltage and high-power applications. In order to ensure the normal operation of ISOP converters, it is necessary to realize the input-voltage and output-current equalization of each submodule. However, there are few studies on the input-voltage and output-current equalization performance of the ISOP system. In this paper, the input-voltage and output-current equalization characteristics of a Boost + LLC modular ISOP converter are studied based on the small-signal model. In this paper, the small-signal model of an ISOP system is first established, and then the input-voltage and output-current equalization performance of the ISOP system under the condition of inconsistent submodule parameters are analyzed. Finally, simulations and experiments are reported to verify the results. The experimental results show that the ISOP system composed of a Boost + LLC cascaded module has excellent voltage and current self-equalization performance.

Study of the IPOS DC/DC Converter for DC Offshore Wind Farm

With the development of the offshore wind farms, DC offshore wind farm topology is getting more attention due to its low loss and light weight, where the DC/DC converters with high voltage gain are key equipments. This paper studies the Input-Parallel-Output-Series(IPOS) converter based on Dual-Active-Bridge(DAB) topology, discusses the modulation and control method of the converter, and proposes a fault ride-through scheme. Simulation results validate the proposed topologies and control schemes.

Three-Leg Integrated Stage AC–DC Solid-State Transformer Feasible for MV Railway Applications

This work proposes an extensive investigation of a solid-state transformer (SST) with an integrated ac–dc bidirectional stage feasible to medium-voltage (MV) railway systems, based on an arrangement that uses an input-series-output-parallel (ISOP) configuration with identical power modules. Each module has a three-leg configuration: in the primary side, there are two interleaved legs using coupled windings connected to a medium-frequency transformer (MFT) and another leg operating at the grid frequency; and a conventional H-bridge is used in the secondary side. Qualitative and quantitative analyses are presented to demonstrate the aspects of the proposed topology and are validated by steady-state experimental results using an 8.33-kW prototype. Dynamics results are also presented, with a two-module structure with a low rated power to validate the control strategy and modularity. A comparative analysis considering real traction system parameters is carried out, demonstrating some well-defined trends of the proposed topology in this application, such as a reduction in conduction loss up to 32% and lower number of switches compared with another five topologies. The analyses and preliminary results show that the proposed structure could indeed be considered as a possible solution for SSTs in MV traction systems.

Input‐series output‐parallel DC–DC converter based on adaptive coefficient voltage equalization control

SummaryWith the rapid development of power electronics technology, modular series‐parallel structures have attracted more and more attention due to high reliability and good redundancy. Especially in the occasion of high input voltage and low output voltage, the input‐series output‐parallel (ISOP) DC–DC converter is applied to reduce the stress of the device. Although this modular approach has many advantages, there is a problem of unbalanced voltage and current caused by component parameter errors in each module. Therefore, this paper proposes an inverse droop control equalization method based on coefficient adaptation. This method can not only keep the input voltage sharing (IVS) of the modules among the ISOP system but also solve the problem of the deviation of the traditional inverse droop control output voltage from the reference value, which increases the dynamic response of the system. This article first introduces the principle and control logic of the method and builds a three‐way module ISOP circuit. The experiment verifies the input voltage equalization effect and dynamic performance of the control method on the ISOP system under various working conditions.

An Input-Oriented Power Sharing Control Scheme With Fast-Dynamic Response for ISOP DAB DC–DC Converter

With some advantages, such as electric isolation, high efficiency, and fast dynamic response, the input-series output-parallel (ISOP) dual-active-bridge (DAB) dc–dc converter has been regarded as one of the most promising candidates for connecting the medium voltage terminal and the low voltage terminal. For the ISOP DAB dc–dc converter, the existing control strategies are mainly focusing on the equivalent power sharing control, but the fast-dynamic response is not included and the decoupling between the regulation of input voltage and the adjustment of output voltage is not eliminated significantly. In this article, the average model of this ISOP DAB dc–dc converter is presented first, which can be employed to analyze the power distributions of this modular topology clearly. Then, an input-oriented power sharing control scheme with fast-dynamic response is proposed for ensuring both the power sharing ability and the fast-dynamic performance of the ISOP DAB dc–dc converter in this article. Compared with the existing methods, this proposed scheme can also significantly reduce the coupling between the power sharing control and the output voltage regulation. In addition, an inductance-estimating method is proposed for ensuring the power sharing performance of the ISOP DAB dc–dc converter. Finally, the experimental results are provided to verify the effectiveness of the proposed input-oriented power sharing control with fast-dynamic response for the ISOP DAB dc–dc converter system.

Model-Based Predictive Control with Graph Theory Approach Applied to Multilevel Back-to-Back Cascaded H-Bridge Converters

The multilevel back-to-back cascaded H-bridge converter (CHB-B2B) presents a significantly reduced components per level in comparison to other classical back-to-back multilevel topologies. However, this advantage cannot be fulfilled because of the several internal short circuits presented in the CHB-B2B when a conventional PWM modulation is applied. To solve this issue, a powerful math tool known as graph theory emerges as a solution for defining the converter switching matrix to be used with an appropriate control strategy, such as the model-based predictive control (MPC). Therefore, this research paper proposes a MPC with the graph theory approach applied to CHB-B2B which capable of not only eliminating the short circuit stages, but also exploring all the switching states remaining without losing the converter controllability and power quality. To demonstrate the proposed strategy applicability, the MPC with graph theory approach is tested in four different types of SST configurations, input-parallel output-parallel (IPOP), input-parallel output series (IPOS), input-series output-parallel (ISOP), and input-series output series (ISOS), attending distribution grids with different voltage and power levels. Real-time experimental results obtained in a hardware-in-the-loop (HIL) platform demonstrate the proposed strategy’s effectiveness, such as DC-link voltages regulation, multilevel voltage synthesis, and currents with reduced harmonic content.

A Three-Terminal Submodule Based High DC Conversion Ratio System With Self-Balance Feature

The input series output parallel (ISOP) and input parallel output series (IPOS) systems have been extensively researched and applied in academia and industry due to the high dc conversion ratio. Practically, the ISOP and IPOS systems faced challenges, such as relatively immature high-voltage (HV) isolated high-frequency transformer (HFT), high reliability on HV isolated control system, difficulties in the auxiliary power supply (APS), start-up process, and bypass circuit/strategy. To overcome the above-mentioned challenges without adding complexities, this article proposes the three-terminal submodule (3TSM) as the fundamental SM for high dc conversion ratio step-up/step-down applications. Thanks to the 3TSM, the system is with self-balance feature, HV isolated HFTs are unnecessary, the control system is simplified (no matter in open or closed loop). Besides, commercial APSs can be adopted directly to the SM input capacitors without the unstable “runaway” phenomenon. A bypass circuit is also proposed to retain the power of APS when the SM is bypassed. A 2SM step-down and step-up prototype, together with a subsequent 10-kV input 1 kV/1 kW output converter is built to validate the effectiveness and practical feasibility of the proposed system.

Analysis and Design of a Modular Self-Balance High-Voltage Input DC–DC Topology

In high-voltage (HV) input to low-voltage (LV) output dc/dc conversion applications, the input series output parallel (ISOP) structure is widely used and studied. Practically, the ISOP system encounters the below challenges: 1) HV isolated components, such as the HV isolated and HV input extra auxiliary power supply (APS) and the HV isolated high-frequency transformers (HFTs); 2) the submodule (SM) input voltage-sharing (IVS) control must be applied as long as the system is running, and it requires the control system to be highly reliable; and 3) scarcity of simple and high-efficient startup process with commercial APSs. To overcome the above challenges and simplify the control system, this article gave analysis and design of a modular self-balance HV input dc/dc topology without HV isolated components. A detailed time-domain SM design method, as well as the <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$s$ </tex-math></inline-formula> -domain SM input impedance analysis of the proposed topology, is proposed. Finally, a 4-/8-/10-kV/1-kW laboratory prototype is built to validate the effectiveness and practical feasibility of the proposed topology.

Design of a 5.6 kW EV low-voltage DC/DC converter based on full-bridge converter with input series output parallel structure

Design of a 5.6 kW EV low-voltage DC/DC converter based on full-bridge converter with input series output parallel structure