Input DC Source Research Articles

A New Multilevel Inverter Based on Harvest of Unused Energies for Photovoltaic Applications

In multilevel inverters, unused energies are created due to the asynchronous use of the input DC sources. when the input DC sources are replaced by renewable systems such as photovoltaic arrays, some of the input energies remain unused. This paper presents a new multilevel inverter topology that can harvest the unused energies and return them to another output which leads to the harvest of the maximum input energy. The harvest of maximum energy (HME) based multilevel inverter structure consists of two terminals. One is connected to AC-load and another is joined to DC-load or rechargeable batteries. Another merit of the proposed multilevel inverter is that the number of its switches is comparable to other structures where unused energies cannot be harvested. Selective harmonic elimination (SHE) has been used as the switching strategy in the proposed multilevel structure. To verify the performance of the HME-based multilevel inverter topology, the experimental results for a type seven-level inverter were performed by the TMS320F28379D DSP.

Thirteen-Level UXE-Type Inverter With 12-Band Hysteresis Current Control Employing PSO Based PI Controller

This work presents hysteresis control applied to UXE-type inverter topology with a PI (Proportional Integral) controller, where the gains are derived by Particle Swarm Optimization (PSO). The investigated UXE inverter can generate a thirteen-level output voltage waveform, which results in lower switching losses. It can boost the output voltage to 1.5 times the applied input DC source voltage. Satisfactory inverter operation is ensured by employing twelve-band hysteresis current control. The tuning of the PI controller required for the closed-loop hysteresis current control is achieved by nature-inspired PSO algorithm. A comparative analysis is also performed after obtaining the results applying nature-inspired PSO and conventional Ziegler Nichols (ZN) methods. The effectiveness of the control strategy is verified in the MATLAB Simulink and further validated in experiment using TMS320F28379D and also with Typhoon Hardware in Loop Technology.

A Generalized State Space Average Model for Parallel DC-to-DC Converters

The high potentiality of integrating renewable energies, such as photovoltaic, into a modern electrical microgrid system, using DC-to-DC converters, raises some issues associated with controller loop design and system stability. The generalized state space average model (GSSAM) concept was consequently introduced to design a DC-to-DC converter controller in order to evaluate DC-to-DC converter performance and to conduct stability studies. This paper presents a GSSAM for parallel DC-to-DC converters, namely: buck, boost, and buck-boost converters. The rationale of this study is that modern electrical systems, such as DC networks, hybrid microgrids, and electric ships, are formed by parallel DC-to-DC converters with separate DC input sources. Therefore, this paper proposes a GSSAM for any number of parallel DC-to-DC converters. The proposed GSSAM is validated and investigated in a time-domain simulation environment, namely a MATLAB/SIMULINK. The study compares the steady-state, transient, and oscillatory performance of the state-space average model with a fully detailed switching model.

Simulation of PEM fuel cell integrated DVR using SRF-ANFIS controller for power quality enhancement

Voltage related Power Quality (PQ) problems are attracting the eyes of researchers, as these cause huge loss in productivity and profitability for both utilities and consumers. Dynamic Voltage Restorer (DVR) is a well-known custom power device that provides an economical solution for the alleviation of power quality problems. Generally, battery energy storage is used as an input for DVR, but batteries are still bulky and costly and must be disposed once their chemicals are used, which limits the compensation capability of DVR. Nowadays, Fuel Cell (FC) technologies have attracted much attention owing to their high efficiencies and low emissions. This project aims to model and simulate Proton Exchange Membrane Fuel Cell (PEMFC) and is used as a DC input source for DVR. The suitable boost converter is designed and modelled to lift up the fuel cell output voltage suitable as DC link voltage for DVR. Adaptive Neuro Fuzzy Inference System (ANFIS) controller uses Synchronous Reference Frame Theory (SRF) algorithm to generate d and q axis components of reference signal for Voltage Source Converter (VSC) of DVR. This PEMFC DVR is verified for balanced and unbalanced voltage sag, swell, and harmonics using MATLAB/SIMULINK. A simulation result proves that this PEMFC DVR is capable of providing a technically advanced and economic solution for balanced and unbalanced voltage sag and swell. During compensation, the DVR DC input voltage is also preserved as constant, which enhances the compensation capability of DVR.

An extendable asymmetric boost multi‐level inverter with self‐balanced capacitors

AbstractThis paper proposes a basic asymmetric boost 35‐level inverter topology that can be extended to earn higher gains and levels. The proposed structure benefits from following advantages: extendibility, voltage boosting capability, natural voltage balancing of capacitors, low average voltage stress on semiconductors and large ratio of number of steps to components. The impulse charging current of capacitor(s) is suppressed by small inductor(s), which is bypassed by a diode during discharging mode. The low magnitude (accordingly small size, low price and low weight) and balanced output powers of VX and VY sources are other important profits of proposed topology. The input DC sources can be realized by batteries or combination of PVs and dc–dc converters. This paper also proposes an algorithm for deciding the magnitude of DC sources, which maximizes the number of steps. The gain and steps can be further increased by adding more cascaded switched‐capacitor cells (CSCCs). Due to large number of levels, the output voltage quality of proposed structure is high, which helps to remove or downsize the ac‐side filter. The laboratory‐scaled prototype of converter (feeding a R–L load) has been implemented. The comparison and experimental results approve superiority and correct performance of proposed topology.

Single input qZ‐source cascaded multilevel inverters : Analysis , design, and implementation

The Single Input quasi-Z-Source Cascade Multilevel Inverter (SIqZS-CMI) has the ability to make use of a single DC input source and to share active power among all cascaded qZS modules. This unique feature, do not present in any other quasi-Z-Source (qZS) multilevel inverter in the literature, is accomplished by replacing one of its Z-impedance inductances by a coupled inductor. With this topology, it is possible to make use of a single low voltage PV string, favoring the use of small size residential rooftop systems. In addition, it simplifies the system grounding and the compliance with many Installation, Maintenance, and Safety Codes and Standards. The proposed control strategy enables high quality current injection into the grid, keeping the DC bus voltage regulation, ensuring precise power balancing with symmetric multilevel waveforms. Experimental results from a 5-level SIqZS-CMI prototype demonstrate the system's performance and its advantages.

Design of a Partial Resonant Inverter for solar photovoltaic applications

This paper presents a solar-powered Partial Resonant Inverter (PRI) interfaced with an asymmetrical cascaded nine-level inverter. The DC input of the proposed system is obtained using Solar Photovoltaic (SPV) panel. The input DC sources fed to the asymmetrical cascaded nine-level inverter are in the ratio of 1:3. The step modulated nine-level inverter works with a precalculated switching angle for a fixed modulation of 0.7. Compared to the conventional 50 Hz inverter and the multi-output transformer design, the proposed system is more compact because of the high-frequency AC link. The PRI ensures Zero Voltage Switching (ZVS) and reduces the switching losses. The proposed scheme has been validated in the MATLAB/ SIMULINK environment and an experimental prototype is built in the laboratory. Based on the investigations the Selective Harmonic Elimination (SHE) method gives superior performance when compared to the Optimal Harmonic Stepped Modulation (OHSM) method. From the results and comparative analysis, the proposed system uses fewer switches to obtain the nine-level output, uses the PRI setup with the multioutput transformer to make the design compact and improves the power quality of the system.

An enhanced high-boost active-switched quasi Z-Source inverter having shorter range of shoot-through duty ratio for solar energy conversion applications

This paper proposes a three-phase enhanced high-boost active-switched quasi Z-source inverter (EHB-ASqZSI) with reduced upper margin of shoot-through duty ratio. The upper limit of the duty ratio is 0.25 per unit for the non-isolated inverter and also, numerator factor of its gain is 2. Here, the proposed inverter has highest voltage gain profile in comparison with conventional high boost configurations. It uses two inductors, four capacitors, four diodes and one active switch. Here, total nos. of components equal to most recently developed high boost active-switched quasi Z-source inverter i.e. without increase of overall component count. Also, the suggested qZSI also retains various desirable features such as continuous input current, common ground with input DC source, low ripple in input current and moderate voltage and current stresses. In this respect, various performances of proposed configuration are analysed and compared with that of existing topologies to make it more competitive option. MATLAB-SIMULINK software is used to demonstrate the working of it and the obtained responses in the simulation platform are matching with their theoretical values. Experimental study is also done in similar to that of simulation study to justify its real-time implementation.

Performance Analysis of Positive Output Luo Converter (Polc) for Pv Applications

The POLC (Positive Output LUO Converter) is a broadly useful DC to DC converter with buck and boost highlights. The geography of the POLC is unobtrusive, and it has the additional advantage that the extremity of the yield voltage doesn't get reversed with regard to the polarity of input voltage. Since the primary force control switch is arranged in series manner with the input switch and DC source, at whenever the exit point yields from the POLC isn't fundamental, it may be wholly stopped down or swapped by possession the other control switch which is to control the force is present in the OFF state. To the extent the topology of the POLC is concerned, it comprises of four stockpiling components such as two inductors and two capacitors, the force control switch and the force bearing managing diode. The appearance of four energy stockpiling components expands the request for the exchange capacity of the converter. The attribute of the converter gets nonlinear. The utilization of a PI regulator is checked for the voltage guideline of the yield DC voltage of the POLC. Utilizing the Kp and Ki esteems as provided by the Zeigler Nicholas strategy to change the exhibition of the POLC with a PI regulator, under source and burden aggravations just as following execution under adjusting rules are saved. Intellectual regulators which use a Fuzzy Logic to regulate and Artificial Neural Network (ANN) are at steady state, in recent times they include intelligence in their work. These regulators do not need perfect dimensional model, and similarly it can be utilized for schemes which are nonlinear is architecture and simulated in MATLAB platform for expanding the performance of the POLC converter. From this examination it is observed that there is an enhancement in the rise time and settling time with decrease in overshoot.

Modeling and performance analysis of a novel switched capacitor boost derived hybrid converter for solar photovoltaic applications

In this paper a novel switched capacitor boost derived hybrid converter (SCBDHC) topology is proposed to generate hybrid output of AC and DC simultaneously in higher range from a single DC input source for a solar PV AC load and DC load applications. This hybrid topology employs less number of switches for the conversion of DC to DC and DC to AC, compared with the traditional conversion techniques, as seen in the literature, reduction in switches causes reduction in power loss and overall cost of the system and may result in increased reliability and efficiency in the medium and high power applications. State space modeling of the SCBDHC has been developed and the steady-state currents and voltages have been computed and verified with MATLAB/Simulink. A closed loop scheme developed and helped regulation of the source and load fluctuations and its performance was verified with an experimental setup.

A Proposed Five-level Neutral Point Clamped Inverter

This paper presents a proposed five-level inverter based on conventional five-level Neutral Point Clamped (NPC) topology which is a type of Multilevel Inverters (MLIs). MLI is a great solution for high power application in addition to medium power, low power and renewable energy applications. The proposed topology reduces the number of input DC sources as compared with the conventional five level NPC topology. Also, this circuit reduces the conduction losses by reducing number of switches that turned on in each mode. The circuit operation analysis in each mode is illustrated. A proper modulation strategy based on Pulse Width Modulation PWM is applied on the proposed circuit. The simulation of the proposed circuit is carried out in MATLAB/SIMULINK environment. The results show a comparison between conventional five-level NPC and modified circuits which illustrate a good performance for the proposed one which make it suitable for many applications such as photovoltaic systems.

Experimental Validation of a Quasi-Z-Source Modular Multilevel Converter With DC-Fault Blocking Capability

This article considers the design methodology and the modulation of the quasi-Z-source modular multilevel converter (qZS-MMC) with half-bridge submodules (HBSMs) and evaluates its performance in the voltage boosting mode for medium voltage applications. The qZS-MMC consists of two qZS networks inserted between the two terminals of the dc input source and the dc-link terminals of an MMC, which allows the generation of an output voltage larger than the input dc voltage. Two modulation schemes have been analyzed based on a mathematical derivation for the converter internal voltages, currents, and stored energy. The qZS circuit is proven to provide the qZS-MMC with HBSMs to deal with dc faults. The experimental results validate the performance of the proposed modulation schemes and the dc-fault blocking capability of the qZS MMC. Finally, the losses of the qZS-MMC are compared against a standard MMC using full-bridge submodules that can also provide dc-fault capability. The range in which the qZS-MMC is more efficient has been identified. Furthermore, the qZS-MMC can provide a significant reduction in a number of semiconductor power devices with the same performance.

A Novel Three-Phase Transformerless Cascaded Multilevel Inverter Topology for Grid-Connected Solar PV Applications

Nowadays, multilevel inverters (MLIs) are gaining huge popularity for high power transformerless PV applications. Among the traditional MLIs, the cascaded H-bridge (CHB) MLI accommodates lower voltage rated input dc sources, which reduce the voltage stress across the devices. However, the CHB MLI requires multiple PV sources as separate dc-link voltage sources, which create more paths for leakage currents. Therefore, it is a challenging task to deal with the leakage currents in the case of CHB MLIs. In this article, a novel three-phase transformerless inverter topology for grid-connected solar PV application is introduced. This proposed that the inverter topology has six switches per phase, and it has the combined advantages of dc-bypass and ac-bypass circuit configurations. A new modulation strategy is developed for the proposed topology; it is based on a sine triangle pulsewidth modulation technique combined with the dedicated logic functions. The gate pulses for all switches are provided by using these dedicated logic functions. The switching pulses obtained from the dedicated logic functions control all the inverter switches so that the variation of common-mode voltage (CMV) is constant during the inverter operation. This results in reduced leakage current throughout the operation of the inverter. The theoretical analysis, simulations, and experimental results are presented to validate the proposed topology concept for a 3-kVA grid-connected system. Both the simulation and experimental results show that the proposed solution can well attenuate the leakage current; all the results are presented in the article.

1 MHz 48–12 V Regulated DCX With Single Transformer

In this article, a 1-MHz-regulated DCX (RDCX) with single transformer is proposed for high-power-density high-efficiency 48–12 V dc–dc conversion. In the proposed converter, a dc transformer (DCX) works at fixed switching frequency to realize isolation and output power conversion and an auxiliary pulsewidth modulation (PWM) converter is applied to realize voltage regulation. The auxiliary dc–dc is fed from the auxiliary winding of the transformer and its output is in series with the input dc source. The output regulation is achieved by regulating the output voltage of auxiliary dc–dc converter. Furthermore, only a small portion of power is dealt by the auxiliary PWM dc–dc converter. Thus, the total efficiency is a little bit lower than the DCX and higher than that of conventional two-stage solution. The operation principle and the design guidelines of the proposed RDCX are presented in this article. A 360 W 40–60 V/12 V dc–dc prototype is built to verify the theoretical analysis and design guidelines. In the prototype, 9.1% of load power is dealt by the auxiliary dc–dc at nominal 55 V input voltage and, at worst case, which happens rarely and the duration is short, 50% of load power is dealt by the auxiliary dc–dc stage. Finally, 97.3% peak efficiency is achieved.

New Asymmetrical Modular Multilevel Inverter Topology With Reduced Number of Switches

In this article, a new single-phase multilevel inverter is introduced with a reduced number of power switches and reduced voltage stress on power switches. The proposed topology consists of four input dc sources and nine semiconductor switches (eight unidirectional and one bidirectional switch). The topology can be used for asymmetrical voltage source configuration to generate seventeen voltage levels. The extended topology is constructed by a series connection of the topology circuit to produce higher voltage levels with less voltage stress on the switches without modifying the existing structure. Comparison is made with traditional and recently introduced topologies based on the number of power switches, dc sources, total blocking voltage of switches, and gate driver circuits, to prove the proposed topology’s superiority. A simple nearest level modulation has been deployed as the switching scheme. Validation on the viability of the proposed topology has been carried out through simulation and hardware experimental setup.

Switched-Capacitor-Based Multilevel Inverter for Grid-Connected Photovoltaic Application

In order to approach a voltage of high magnitude in photovoltaic (PV) application, several PV modules are connected in series to form a PV string, then the voltage of PV string is converted to an ac voltage through an H-bridge inverter. This system causes harmful harmonics, brings about leakage current, and increases the voltage stress of the components. To tackle the issue, this article proposes a new switched-capacitor-based multilevel inverter topology that uses series-connected dc sources as the input dc source and generates a staircase ac voltage of high quality and mitigates the leakage current. The proposed topology can be constructed as a three-phase inverter as well, in the three-phase configuration all the phases are connected to only one series-connected PV module or dc sources. Simulation and experimental results are provided to validate the proposed topology.

Reduced voltage stress hybrid multilevel inverter using optimised predictive control

This study presents a hybrid multilevel inverter (HMLI), capable of generating 19 voltage levels using a single DC voltage source. The peak inverse voltage of all the switches is restrained within the input DC source voltage in the proposed HMLI, which requires only three capacitors and 15 switches to achieve 19 voltage levels. In the proposed HMLI, one of the capacitors is self-balanced, while the other two capacitors are balanced using a modified finite control set model predictive control (MFCS-MPC). The proposed MFCS-MPC reduces the computation time considerably without affecting the performance of the system. The proposed HMLI is compared with some other HMLI topologies to show its merits in terms of active and passive components. Finally, the steady-state and dynamic performance of the proposed topology and its control algorithm is validated through simulation and experimentation for a 1 kW prototype.

Classical Control for Unequal DC Sources Five-Level Inverter-Based SHE Technique

This study proposes a classical control algorithm for solving the transcendental set of equations for the unequal DC sources of five-level multilevel inverters (MLIs). Such sources can be generated from renewable energy sources. Two DC sources with different values are used to produce an output voltage with five levels. Then, a set of two transcendental equations is formulated with two targeted functions to control the fundamental component and cancel the stipulated single harmonic order. The proposed solution uses a simple classical proportional control with two loops to generate two switching angles. The first switching angle is assigned with an initial value, whereas the second one is calculated from the inner loop. The outer loop is used to cancel the specified harmonic by sending the error signal to the proposed proportional control that tunes the switching angles. The proposed algorithm is easy, fast, and accurate, and has a wide-range solution in terms of modulation index (MI ) and input DC source ratio (x=V1V2≤1). The proposed algorithm is tested for a wide range of MI and x to verify its feasibility. Moreover, several simulation and laboratory tests are presented to further validate the applicability of the proposed approach.

Harmonic minimization of a single-phase asymmetrical TCHB multilevel inverter based on nearest level control method

Multilevel inverters are gaining special interest among researchers and in the industry due to their widespread applications and numerous merits. Obtaining high quality, more reliable output while using a reduced number of electronic components is the main purpose of most of the research conducted in this area of study. The purpose of this study is to apply the nearest level control (NLC) method to a 13-level transistor-clamped H-bridge (TCHB) inverter with unequal DC voltage supplies. The NLC method operates at the fundamental frequency, thus reducing switching losses, and can reduce the harmonic content significantly. The adopted multilevel inverter consists of two TCHB cells supplied with two asymmetrical DC input sources with a voltage ratio of 1:2. This structure reduces the number of electronic components, and the asymmetry in the DC input voltages results in a higher number of levels. The adopted topology and its proposed control method were simulated in Matlab/Simulink, and the simulation results were verified through experiments using an Altera field-programmable gate array (FPGA) board. The results showed that the topology and its control method are efficient in obtaining a high-quality output with an improved total harmonic distortion (THD).

A New 1-ϕ, Seventeen Level Inverter Topology With Less Number of Power Devices for Renewable Energy Application

In this paper, a new seventeen level inverter topology is proposed for single-phase grid-connected renewable energy applications. The proposed inverter topology can provide seventeen levels in the output voltage while using a lesser number of power devices. This proposed inverter topology comprises nine power switches, five power diodes and two sets of DC sources (two 3V and two V) which are in the ratio of 1:3. By properly arranging the input DC sources, power switches, and power diodes through different possible combinations the seventeen voltage levels are generated. The main advantage of this seventeen level inverter is that a maximum of six power devices conducts in any mode. Thus conduction losses are lesser compared to existing seventeen level inverter topologies which results in a highly efficient system. Further, the detailed comparison of proposed inverter topology with the existing multilevel inverter (MLI) topologies shows that the number of required power devices count is considerably lower. The possible extension of the proposed inverter topology for the three-phase application is also discussed. Further, a level-shifted based pulse modulation strategy is proposed to control the output of the proposed inverter. To verify the operation, the proposed inverter topology is simulated in MATLAB/Simulink for a 500W grid-connected system. All the major results are included in the paper. The experiments are performed to validate the proposed inverter topology for a 500W grid-connected system and all the key results are included in the paper.