Input Current Range Research Articles

Detailed numerical investigation of the dissipative stochastic mechanics based neuron model

Recently, a physical approach for the description of neuronal dynamics under the influence of ion channel noise was proposed in the realm of dissipative stochastic mechanics (Güler, Phys Rev E 76:041918, 2007). Led by the presence of a multiple number of gates in an ion channel, the approach establishes a viewpoint that ion channels are exposed to two kinds of noise: the intrinsic noise, associated with the stochasticity in the movement of gating particles between the inner and the outer faces of the membrane, and the topological noise, associated with the uncertainty in accessing the permissible topological states of open gates. Renormalizations of the membrane capacitance and of a membrane voltage dependent potential function were found to arise from the mutual interaction of the two noisy systems. The formalism therein was scrutinized using a special membrane with some tailored properties giving the Rose-Hindmarsh dynamics in the deterministic limit. In this paper, the resultant computational neuron model of the above approach is investigated in detail numerically for its dynamics using time-independent input currents. The following are the major findings obtained. The intrinsic noise gives rise to two significant coexisting effects: it initiates spiking activity even in some range of input currents for which the corresponding deterministic model is quiet and causes bursting in some other range of input currents for which the deterministic model fires tonically. The renormalization corrections are found to augment the above behavioral transitions from quiescence to spiking and from tonic firing to bursting, and, therefore, the bursting activity is found to take place in a wider range of input currents for larger values of the correction coefficients. Some findings concerning the diffusive behavior in the voltage space are also reported.

A New Translinear-Based Dual-Output Square-Rooting Circuit

A new wide input range square-rooting circuit is presented. The proposed circuit consists of a dual translinear loop, an absolute value circuit, and current mirrors. A current-mode technique is used to provide wide input range with simple circuitry. The output signal of the proposed circuit is the current which is proportional to the square root of input current. The proposed square-rooting circuit was confirmed by using PSpice simulator program. The simulation results demonstrate that the proposed circuit provides the excellent temperature stability with wide input current range.

Smart sensor interfacing circuit using square-rooting current-to-frequency conversion

A universal sensor interfacing circuit is presented in this paper. It is capable of giving a digital output directly proportional to various types of measured quantities, where those measured quantities are proportional to the square root of some other type of quantity. This sensor interfacing circuit is a square-rooting current-to-frequency converter. The design is based on two current-controlled resistors in CMOS technology with bisection of the input voltage used in place of the ordinary resistors within the relaxation oscillator. There is no need for highly stable voltage or current references in the proposed design. The temperature stability of the design is achieved without the need for any specific setting of the process parameters. Experimental results, obtained on a circuit implemented by discrete components, confirm the predictions of the analysis performed. The relative errors are less than 1% for the input current range from 12 µA to 650 µA, and for the output frequency range from 231 Hz to 2.625 kHz. A solution for extending the input current dynamic range is also given in the paper.

Comparison of 3-Phase Wide Output Voltage Range PWM Rectifiers

A three-phase buck boost pulsewidth modulation (PWM) rectifier with a three-switch buck-type rectifier input stage and an integrated dc/dc boost converter output stage, and a three-phase boost buck PWM rectifier system formed by series connection of a boost-type rectifier input stage (Vienna Rectifier) and a dc/dc buck converter output stage are presented and comparatively evaluated. Both systems are characterized by sinusoidal input current and wide output voltage control range. The comparison is for 6 kW rated output power at 400 Vrms line-to-line input and variable output voltage 200 V 600 V and identifies the buck boost approach as significantly superior regarding the overall efficiency, the volume and weight of the passive power components, and the overall system complexity.

An Experimental Investigation of Thermoelectric Air-Cooling Module

This article experimentally investigates the thermal performance of thermoelectric air-cooling module which comprises a thermoelectric cooler (TEC) and an air-cooling heat sink. The influences of input current and heat load are determined. And performances under each situation are quantified by thermal resistance analysis. Since TEC generates Joule heat, this nature makes construction of thermal resistance network difficult. To simplify the analysis, this article emphasizes on the resistance heat load might meet when passing through the device. Therefore, the thermal resistances in this paper are to divide temperature differences by heat load. According to the result, there exists an optimum input current under every heating power. In this case, the optimum input current is around 6A or 7A. The performance of the heat sink would be improved with TEC under certain heating power and input current, especially at a low heat load. According to the result, the device can even make the heat source cooler than the ambient. However, TEC is not always effective at every heat load and input current. In some situation, the device works worse than the heat sink without TEC. To determine the availability of TEC, this study figures out the effective operating region in which the TEC air-cooling module works better than the heat sink without TEC. The result shows that TEC is more effective at a lower heat load. If heat load is too high, heat sink with TEC will perform worse than without TEC. The limit of this device is 57W. Besides, TEC is not helpful if input current is too high or too low. There is an effective range of input current, and the range becomes narrower when the heat load grows.

Using neural networks to model an electromagnetic-actuated microactuator

We present the use of artificial neural networks (ANNs) to model an electromagnetic microelectromechanical system (MEMS) microactuator. It is inherently complex and time consuming to model/predict the response of an electromagnetic microactuator numerically by finite element analysis, particularly when it is actuated by a pulse of current in media with different properties (e.g., air, water, and diluted methanol). ANNs are used to model the maximum displacement (dmax) of the microactuator for a range of burst frequencies (fb) and input currents (Icoil), as well as different mechanical designs and actuation media. The prediction errors of the ANN model in normal and pressurized air are <13 and <2%, respectively. The prediction error for the same response in water or 50% diluted methanol in water is <10%. ©2007 Society of Photo-Optical Instrumentation Engineers

Compact front-end electronics for low-level current sensor measurements

A low-cost pA-meter based on the precision integrator IVC102 is presented. By reducing the external noise contribution, the low number of implemented components allows the conditioning electronics to be installed closer to the sensor. The instrument shows an excellent linearity over the investigated range of input current (10–10−5 A). Moreover, measurements of the weak signal generated by a CVD diamond sample irradiated by UV light show that the realised circuit represents a very convenient alternative in fields where a high signal-to-noise ratio constitutes the most relevant key feature.

New Four-Quadrant CMOS Current-Mode and Voltage-Mode Multipliers

In this paper, a four-quadrant current-mode multiplier based on a new squarer cell is proposed. The multiplier has a simple core, wide input current range with low power consumption, and it can easily be converted to a voltage-mode by using a balanced output transconductor (BOTA) [1]. The proposed four-quadrant current-mode and voltage-mode multipliers were confirmed by using PSPICE simulation and found to have good linearity with wide input dynamic range. For the proposed current-mode multiplier, the static power consumption is 0.671 mW, the maximum power consumption is 0.72 mW, the input current range is ±60 µA, the bandwidth is 31 MHz, the input referred noise current is 46 pA/√Hz, and the maximum linearity error is 3.9%. For the proposed voltage-mode multiplier, the static power consumption is 1.6 mW, the maximum power consumption is 1.85 mW, the input voltage range is ±1V from ±1.5V supply, the bandwidth is 25.34 MHz, the input referred noise voltage is 0.85 µV/√Hz, and the maximum linearity error is 4.1%.

High-speed and high-precision current winner-take-all circuit

A CMOS high-performance current-mode winner-take-all circuit is presented. The circuit employs a novel technique for inhibitory and excitatory feedbacks based on input currents average computation, achieving both high speed and high precision. The circuit is designed for operation with a wide range of input current values, allowing its integration with circuits operating both in subthreshold and in strong inversion regions. Two circuits, each for a different range of input currents, have been implemented in a standard 0.35-/spl mu/m CMOS process available through MOSIS and are operated via a 3.3-V supply. Their operation is discussed, simulation results are reported and preliminary measurements from a test chip are presented.

Wide-range high-linearity current-controlled pulse-width/delay circuits

A wide-range high-linearity current-controlled pulse-width/ delay circuit suitable for current-mode controlled techniques is presented in this paper. The proposed circuit has been fabricated with 0.35µm CMOS 2P4M processes. The chip area is only 0.33mm × 0.12mm. The experimental results show the variation of the output frequency within ±0.2%, the tolerance of duty cycle is less than 0.2%. The current-controlled pulse-width/delay circuit is supply independent and can be operated at 2.5V. The linear range of input current is from 4µA to 277µA, and corresponding duty cycle of pulse-width output is from 1.59% to 97.2%. The experimental results agreed with the theoretical analysis are presented in this paper.

A Novel On-Chip Amplifier for Fast IDDCurrent Monitoring

A novel circuit of the low-voltage application-specific amplifier is proposed and analyzed. A wide-band current amplifying cell is developed as a central part of the amplifier structure. The amplifier is designed for a built-in-current-sensor, on-chip circuitry used in high-frequency power supply current monitoring and test applications. It could be implemented with analog, digital, or mixed-signal cores in an integrated system-on-chip environment. The current amplifier has been fabricated in 0.13 and 0.18 μm CMOS technology processes with 1.2 and 1.8 V power supply, respectively. The impacts of technology scaling on amplifier's performances have been investigated as well. With sensitivity better than 500 nA, the 0.13 μm design achieves the gain-bandwidth product of 6.8 GHz, low frequency current gain of 48 dB, high linearity for the input current range of (−15 μA, 15 μA), and power consumption of 5.2 mW.

Low Voltage, Low Power and High Performance Current Conveyors for Low Voltage Analog and Mixed Mode Signal Processing Applications

A novel CMOS current conveyor (CC), which can be reconfigured into various types of CCs and is capable of operating at ±1.0 V, is presented. The proposed CC has near rail-to-rail input (−1.0 to 1.0 V) swings and consumes 0.6 mW power. The input current range of the proposed CC is from −0.5 to 0.5 mA. P-Spice simulations confirm the CC performance. The CC has a voltage transfer bandwidth of 100 MHz and current transfer of bandwidth of 200 MHz. Applications of CCs in the design of square rooting and current squaring functions have also been explored.

A square-rooting current-to-frequency converter

A square-rooting current-to-frequency converter is presented in this paper. It has been designed by using one relaxation oscillator where a current-controlled resistor in CMOS technology with bisection of the input voltage is used instead of the ordinary resistor. In this way, the time constant of the relaxation oscillator is current-controlled. There is no need for a high stable voltage or current references in the proposed circuit. By appropriate setting of the process parameters of the MOSFETs used, the temperature variations of the output frequency can be made smaller than 7.6/spl times/10/sup -3/%/K. Experimental results confirm that the behavior of the proposed square-rooting CFC is in good agreement with the predictions of the analysis performed. According to these results, relative errors are less than 1% for the input current range from 35 /spl mu/A to 15 mA, and for the output frequency range from 1.45 kHz to 9.80 kHz.

1.5 V four-quadrant CMOS current multiplier/divider

A low voltage CMOS four-quadrant current multiplier/divider circuit is presented. It is based on a compact V-I converter cell able to operate at very low supply voltages. Measurement results for an experimental prototype in a 0.8 /spl mu/m CMOS technology show good linearity for a /spl plusmn/15 /spl mu/A input current range and a 1.5 V supply voltage.

A Current Mirror for Low Voltage, High Performance Analog Circuits

A current mirror for low voltage analog and mixed mode circuits is proposed. The current mirror has high input and output voltage swing capability and can operate at ±1.0 V supply. P-Spice simulations confirm the input current range of 1 μA to 500 μA with 2.5 GHz bandwidth for the proposed current mirror. Adaptive biasing increases the input voltage swing capability and decreases the undesired offset current. Resistive and capacitive compensation are used to increase its bandwidth.

BEHAVIOR OF MAGNETORHEOLOGICAL FLUIDS UTILIZING NANOPOWDER IRON

Iron nanopowders for use in magnetorheological (MR) fluids were synthesized using a Microwave Plasma Synthesis technique developed at Materials Modification Inc (Fairfax VA). Transmission electron microscopy and surface area analysis measured iron particle size at 15–25 nm. The nanopowders were mixed into hydraulic oil to create nano-scale MR fluid. A micro-scale fluid was created using 45 μm iron particles as well as a hybrid fluid using a 50/50 mix of micro- and nanoparticles. All three fluids had a solids loading of 60% (w/w or weight by weight fraction). The fluids were tested in a flow mode rheometer fabricated from a modified damper using a sinusoidal input dynamometer over a speed range of 12.7 to 177.8 mm/s (0.5 to 6 in/s) and an input current range of 0 to 2 A. The yield stress and plastic viscosity of the MR fluid were characterized using a Bingham plastic model.

A 10 bit Current-Mode CMOS A/D Converter with a Current Predictor and a Modular Current Reference

This paper describes a 10 bit CMOS current-mode A/D converter with a current predictor and a modular current reference circuit. A current predictor and a modular current reference circuit are employed to reduce the number of comparator and reference current mirrors and consequently to decrease a power dissipation. The 10 bit current-mode A/D converter is fabricated by the 0.6 μm n-well double poly/triple metal CMOS technology. The measurement results show the input current range of 16–528 μA, DNL and INL of ±0.5 LSB and ±1.0 LSB, conversion rate of 10 M samples, and power dissipation of 94.4 mW with a power supply of 5 V. The effective chip area excluding the pads is 1.8 mm×2.4 mm.

Adaptive neural coding dependent on the time-varying statistics of the somatic input current.

It is generally assumed that nerve cells optimize their performance to reflect the statistics of their input. Electronic circuit analogs of neurons require similar methods of self-optimization for stable and autonomous operation. We here describe and demonstrate a biologically plausible adaptive algorithm that enables a neuron to adapt the current threshold and the slope (or gain) of its current-frequency relationship to match the man (or dc offset) and variance (or dynamic range or contrast) of the time-varying somatic input current. The adaptation algorithm estimates the somatic current signal from the spike train by way of the intracellular somatic calcium concentration, thereby continuously adjusting the neurons' firing dynamics. This principle is shown to work in an analog VLSI-designed silicon neuron.

On-focal-plane signal processing for current-mode active pixel sensors

On-focal-plane signal processing for current-mode active pixel sensors (APS), including fixed pattern noise (FPN) suppression and high-resolution analog-to-digital conversion (ADC), is presented. An FPN suppression circuit that removes the offset current variation between pixels by using a combination of an n-type and a p-type current copier cell is described. The FPN suppression circuit exhibits linear transfer characteristics in the input current range from 0 to 30 /spl mu/A. On-chip ADC is expected to improve imaging system performance and reliability, while reducing system size, weight, and cost. Operation and performance of a current-mode second-order incremental /spl Delta/-/spl Sigma/ A/D converter with column parallel architecture and for high-resolution and medium-slow-speed applications is presented. A 12-bit resolution with /spl plusmn/1.5 LSB accuracy at the conversion rate of 5.6 kHz was obtained. The LSB corresponds to less than twelve signal charges of current-mode 10-/spl mu/m pixel APS's. Based on the experimental results, a brief description of a possible image sensor with the on-chip signal processing is also described.

Dynamic range and sensitivity adaptation in a silicon spiking neuron

We here propose an adaptive procedure that enables a spiking neuron, whether artificial or biological, to make optimal use of its dynamic range and gain.We discuss an analog electronic circuit implementation of this algorithm using a biologically realistic artificial "silicon" neuron. The adaptation procedure adapts the neuron's firing threshold and the sensitivity (or gain) of its current-frequency relationship to match the dc offset (or mean) and the dynamic range (or variance) of the time-varying somatic input current. The neuron extracts the minimum and maximum levels of the reconstructed somatic current signals from the cell's own spike trains. These are used to regulate the somatic leak conductance in order to shift the somatic current-frequency relation and to adjust a calcium-activated potassium conductance to change the dynamic range of the cell's somatic current-frequency relationship. We report experimental data from a test neuron--built using analog subthreshold CMOS VLSI technology--that shows the expected behavior.