Transputer Research Articles

RISC processors in a massively parallel database machine

The paper presents an application of RISC processors in a massively parallel database machine (LSDM). Depending on the configuration, the database machine can contain a few thousand processors, each of which is equipped with a disc drive. The database model used is the semantic binary model. The combination of the database model and the architecture of LSDM provides an environment where both massively parallel computation and massively parallel I/O are possible. This paper analyses the characteristics of LSDM and argues that RISC processors are the best choice for the database machine. This machine is presented as further evidence of the potential of RISC architecture. Performance evaluation and simulation results based on the characteristics of Inmos transputers are also presented.

Parallel processing and real-time data acquisition

A detailed description of a low-cost, very-high-performance data-acquisition front-end processor is given. The front-end processor, called the transputer foundation module, is built around the Inmos transputer, an ideally suited real-time parallel processor. Special-purpose digital signal processing hardware is combined with the transputer foundation module to form a high-power, flexible data acquisition and processing system. The transputer foundation module can concurrently perform data acquisition, reduction, and high-speed transfer. One such system is capable of acquiring data at burst rates of 40 MB/s and performing 2000 and 1024-point complex FFTs (fast Fourier transforms) per second.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

Dynamic partitioning in a transputer environment

Parallel programs are characterized by their speedup behavior. As more processors are allocated to a particular parallel program, the program (potentially) executes faster. However, there is often a point of diminishing returns, beyond which extra allocated processors cannot be used effectively. Extra processors would be better utilized by allocating them to another program. Thus, given a set of processors in a multiprocessor system, and a set of parallel programs, a partitioning problem naturally arises which seeks to allocate processors to programs optimally. The problem addressed in this paper is dynamic partitioning. When the number of executable parallel programs changes, the optimal partition sizes also change. To realize the new partition settings, a dynamic repartitioning of all processors is triggered. When extra processors suddenly become available to a running program due to a program departure, or when processors suddenly are taken away from a running program due to a program arrival, a nontrivial repartitioning overhead occurs. Depending upon the specific environment, this overhead cost may negate any potential repartitioning benefit. To gain insight into this dynamic partitioning problem, a specific system, a specific workload, and a specific analytical model are studied. The specific system is an INMOS transputer system consisting of an IIP Vectra front-end, an INMOS B004 evaluation board with a single T414 transputer, and an EB8-10 board with eight T800 transputers. The specific workload consists of parallel versions of a classical N-body problem and a classical search problem. The specific analytical model is a Markov model which is parameterized using the concept of program execution signatures. The sensitivity analysis experiments both validate the model and indicate the characteristics of those workloads which benefit from dynamic partitioning.

Parallel processing for power system analysis using band matrix

Two kinds of parallel processing schemes using band matrix are discussed. One is with m*m processors, and the other is with m processors only. The program considered involves only one aspect of power system analysis, i.e. the solution of a linear system of equations. To verify the developed parallel algorithm, a multiple microprocessor system was made operational using INMOS transputers. In order to apply this method to real systems, the reduced bandwidths of the matrices of several test power systems are calculated to estimate the number of processors required. The proposed parallel processing method is compared with a sparse technique where only a single processor is used. >

Symmetric degree-four chordal ring networks

Techniques for analysing symmetric chordal ring networks of degree four are presented and expressions for the network diameter and the mean internode distance are derived. The network incorporates the maximum number of nodes for a given diameter, and has a communications cost, measured either as network diameter or as the mean internode distance, of O[√(N)]. Possible modifications to this network include breaking the ring to provide communications with a host computer, and a nonoptimal chordal displacement to allow a cellular array to be mapped onto the chordal ring. Such networks provide a practical means of networking processors such as the transputer, and the results presented in this paper have been verified on a network of transputers. The work originated from a study of the way in which the INMOS transputer could be best applied to image procesing.

Fault-tolerant transputer-based controller configurations for gas-turbine engines

Parallel processing is often employed in real-time control systems to reduce execution times. The paper, however, investigates the potential of parallel processing, and one device, in particular, the Inmos transputer, in the design of a fault-tolerant high-integrity computer module for gas-turbine engine control. Introducing multiple processors into a control system has the potential to render that system less reliable in an operational sense, than a conventional single processor implementation. However, attention to system design can, in fact, exploit parallel-processing capability to result in improved reliability. While three-lane voting systems are commonly favoured in avionics systems, owing to hardware implementation constraints, gas-turbine engine controllers are generally realised as two-lane systems. Transputer system configurations are devised in an attempt to overcome this constraint. In particular, an ‘overlapping triad’ topology is investigated in detail, and both strength and weaknesses of the present transputer architecture are revealed.

Searching of chemical structure data bases with parallel computer hardware

The use of two types of parallel computer hardware for increasing the efficiency of processing in chemical structure data bases is discussed. The distributed array processor can be used for the clustering of 2-D chemical structure data bases by using the Jarvis—Patrick clustering method and for the ranking of output in an experimental system for substructure searching in the 3-D macromolecules in the Protein Data Bank. The Inmos transputer can be used in the construction of PC-based systems for 2-D substructure searching and in the identification of the maximal substructures common to pairs of 3-D molecules.

A fully parallel, multi-processor software system using Inmos transputers and the occam programming language

A complete description of a fully parallel command processor, data acquisition, and process control software system given. The system runs on custom hardware built around the Inmos transputer and is written in the first truly parallel real-time programming language, called occam. Occam coding techniques are discussed, and code benchmarks are given. Results for interrupt response time, data transfer rates, and processor performance are presented.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

Chemical database processing using parallel computer hardware

Research activities in the fine chemicals industry involve the generation and analysis of huge amounts of chemical and biological data, and this has led to the development of highly sophisticated, computer-based, chemical information systems to support the research [ 11. Most chemical databases contain two-dimensional structural data, i.e. planar chemical structure diagrams, but there is also increasing interest in the processing of three-dimensional structural data, e.g. from X-ray crystallography and molecular mechanics studies. In this paper, we summarize work in our laboratory over the last 3 years which seeks to determine the utility of parallel hardware for the efficient processing of the structural data that are contained in chemical information systems. Two of the very many different types of parallel computer [2] are discussed, these being the ICL Distributed Array Processor and the INMOS transputer.

A high-speed, multi-processor data acquisition and process control system using the Inmos transputer

A brief description of parallel processor design considerations and a complete description of an Inmos transputer-based multiprocessor system are given. The system can collect continuous-wave radar output at 2 Mbyte/s and perform over 2000 1024-point FFTs per second while simultaneously doing radar target acquisition, target tracking, and aim-point selection. The reasons for selecting the transputer and its performance are examined.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

Occamflow: A methodology for programming multiprocessor systems

The data-flow model of computation is an attractive methodology for multiprocessor programming for it offers the potential for unlimited parallelism detection at no programmer expense. It is here applied to a distributed architecture based on a commercially available microprocessor (the Inmos Transputer). In this project, we have integrated the high-level data driven principles of scheduling within the Transputer architecture so as to provide high programmability of our multicomputer system. A complete programming environment which translates a complex data-flow program graph into occam has been developed and is presented in this paper. We describe here in detail the mapping from the SISAL high-level constructs into low-level mechanisms of the Transputer (synchronization, structure representation, etc.). The partitioning issues (granularity of the graph) are presented and several solutions based upon both data-flow analysis (communication costs) and program syntax (program structure) are proposed and have been implemented in our programming environment. Finally, we present and analyze graph allocation and optimization schemes to improve the performance of the resulting occam program.

Textual and chemical information processing using parallel computer hardware

This paper discusses the use of parallel computer hardware to increase the efficiency of processing in databases of text and chemical structures. After a general introduction to parallelism, two types of parallel computer are described: the ICL Distrib uted Array Processor and the INMOS Transputer. Experimen tal results are presented of the use of the DAP for cluster analysis, of the transputer for chemical substructure and maxi mal common substructure searching, and of both machines for text retrieval.

Analogue I/O strategies for transputers

With the advent of increasingly sophisticated multivariable systems for the control of advanced aircraft designs 1,2 has come the demand for further improvements in processing capacity and speed. These are becoming increasingly difficult to satisfy using conventional, sequential microprocessor-based systems, but the use of parallel processing concepts exemplified by the Inmos transputer will realize the required performance. To achieve this the transputer must be provided with a large bandwidth, high-performance data acquisition system. The paper surveys several practical strategies which provide the Inmos transputer development system (TDS) with a flexible analogue data acquisition capability. Three techniques have been implemented in Salford University's Department of Aeronautical and Mechanical Engineering, two of which are examined in detail. The interfacing methods identified may be categorized as: Host-based systems — (a) software interface and (b) combined software and hardware interface; External bus-based systems — (a) transputer(s) on the bus and (b) bus emulation; and Wholely transputer-based systems — (a) link-compatible autonomous devices and (b) memory mapped devices. Each type is discussed briefly and examples of combined software and hardware interface systems, and memory mapped devices are presented as case studies.

Two Parallel Methods for Polygon Clipping

AbstractA control parallel and a novel data parallel implementation of the Sutherland‐Hodgman polygon clipping algorithm are presented. The two implementations are based on the INMOS transputer and the AMT Distributed Array Processor respectively; both of these machines are general purpose parallel processors. Performance Figures are reported and implications for further work are discussed.

Real-time system implementation — The transputer and occam alternative

This paper introduces the Inmos transputer and the programming language occam as a viable alternative to conventional methods of implementing microprocessor-based real-time systems. The hardware and software characteristics typically involved are assessed.

Constructing replicated systems using processors with point-to-point communication links

Replicated processing with majority voting is a well known method of achieving fault tolerance. We consider the problem of constructing a distributed system composed of an arbitrarily large number of N-modular redundant (NMR) nodes, where each node itself is composed of N, N = 2m + 1 and m ≥ 1, processing and voting elements. Advanced microprocessors, such as Inmos Transputers, provide fast serial communication links for inter-processor communication, making it possible to construct large networks of processors. We describe how replicated processing with majority voting can be achieved for such processor networks. This paper will present the overall systems architecture, including voting and NMR synchronization algorithms specially developed to exploit fast point to point communication facilities.

A VLSI Systolic Implementation of a String Pattern Matcher — Part II

In Part I surveys of the architectural concepts involved in designing special purpose VLSI computing structures and systolic array, WARP and CHIP architectures and their applications were discussed. The INMOS transputer chip and the parallel language OCCAM were also introduced. In Part II the soft simulation of systolic algorithms via OCCAM programs is considered with particular reference to their constraints and classification. Finally, the systolisation of the pattern matching problem is discussed together with various soft systolic string matcher chip designs and their simulation.

A VLSI Systolic Implementation of a String Pattern Matcher — Part I

In Part I of this article, surveys of the architectural concepts involved in designing special‐purpose VLSI computing structures are given. This leads to a discussion of systolic array, wavefront array, WARP and CHiP architectures and their applications. The INMOS transputer chip design and the parallel language OCCAM are introduced. The authors believe that together they form a modular hardware/software component of the type which is essential in the construction of highly parallel computer systems. (Part II of this article will consider the soft simulation of systolic algorithms via OCCAM and the systolisaion of the pattern matching problem).

Quarks, Lattices and Transputers

Quarks, Lattices and Transputers

２５ＭＨｚトランスピュータを用いたボードの開発とそのＦＯＲＴＲＡＮ演算性能評価

２５ＭＨｚトランスピュータを用いたボードの開発とそのＦＯＲＴＲＡＮ演算性能評価