Injection-locked Frequency Divider Core Research Articles

Low‐power divide‐by‐4 injection‐locked frequency divider using an inductive resonating technique

AbstractAn injection‐locked frequency divider (ILFD) with the low‐power divide‐by‐4 feature for K‐band applications in a 0.18 μm CMOS process is reported in this letter. Output differential signals (f0 = 4f0‐3f0) are obtained by the third‐harmonic signals (3f0) from the free‐running core mixing with injection signals (4f0) through injection transistors in the proposed ILFD. This improves the locking range and saves power consumption by employing an inductive resonator technique and double cross‐coupled transistor pairs without the help of varactors. For the proposed ILFD, the measured free‐running frequency is 5.126 GHz and input injection frequencies at an input power level of 0 dBm are from 19.4 to 21.4 GHz. From a supply voltage of 1.5 V, the proposed ILFD core only dissipates 4.2 mW.

Low‐power divide‐by‐five injection‐locked frequency divider with a built‐in balun

AbstractThis paper reports an injection‐locked frequency divider (ILFD) with a divide‐by‐five feature, a built‐in balun, and low power consumption fabricated in a standard 0.18 μm CMOS process. By employing a fourth harmonic (4f0) enhancement technique realized in a stacked cross‐coupled pair and mixing with an injection signal (5f0) through injection transistors, an output signal (f0 = 5f0‐4f0) is obtained without using extra passive devices. The built‐in balun is employed to transfer a single‐ended signal to differential signals injected into injection transistors. The proposed ILFD improves the locking range without the help of varactors and the power dissipation by adopting two cross‐coupled transistor pairs. The proposed ILFD has the free‐running frequency of 4.3 GHz and the injection frequencies from 21.1 to 22.1 GHz at an input power level of 0 dBm. The proposed ILFD core only consumes 3.75 mW from a supply voltage of 1.5 V.

Divide‐by‐2 LC injection‐locked frequency divider with wide locking range at low and high injection powers

SummaryA wide locking range nMOS divide‐by‐2 RLC injection‐locked frequency divider (ILFD) was designed and implemented in the TSMC 0.18‐µm BiCMOS process. The ILFD is based on a cross‐coupled oscillator with one direct injection MOSFET and a RLC resonator. The RLC resonator is used to extend the locking range so that dual‐band locking ranges can be merged in one locking range at both low and high injection powers. At the drain‐source bias of 0.9 V for switching transistors, and at the incident power of 0 dBm the locking range of the divide‐by‐2 ILFD is 7.24 GHz, from the incident frequency 2.65 to 9.89 GHz, the locking range percentage is 115.47%. The power consumption of ILFD core is 8.685 mW. The die area is 0.726 × 0.930 mm2. Copyright © 2016 John Wiley & Sons, Ltd.

A triple-band divide-by-2 CMOS injection-locked frequency divider

A triple-band and wide operation range divide-by-2 injection-locked frequency divider (ILFD) using a TSMC 0.18 μm 1P6 M CMOS technology is presented. The ÷2 ILFD circuit is realized with a cross-coupled n-core MOS LC-tank oscillator with a 6th order LC resonator constructed from three single-resonance parallel LC resonators. The core power consumption of the ILFD core is 11.6 mW at the supply voltage of 1 V. The free-running ILFD can operate at three frequency bands: 8.75, 5.79 and 3.7 GHz, and the ILFD operation range covers a high-band frequency range from 17.1 to 18.3 GHz, a middle-band from 10.1 to 12.7 GHz, and a low-band from 6.0 to 7.7 GHz. The band selection is obtained by tuning the varactor's control bias.

Wide‐locking range class‐C injection‐locked frequency divider

A novel wide-locking range divide-by-3 injection-locked frequency divider (ILFD) is designed and fabricated in a standard 0.18 μm CMOS process. The CMOS ILFD uses a class-C capacitive cross-coupled oscillator as the core. It has been found that the locking range of the ILFD is enhanced when the DC-gate bias is smaller than the drain bias in the cross-coupled pair. At the supply voltage of 1.8 V, the core power consumption of the ILFD core is 10.7 mW. At the incident power of 0 dBm, the maximum locking range is 3.3 GHz (24.17%), from the incident frequency 12–15.3 GHz. At the incident power of 0 dBm, the operation range is 4.8 GHz (37.2%), from the incident frequency 10.5–15.3 GHz.

A 10.5‐GHz divide‐by‐3 injection‐locked frequency divider with enhanced locking range by even‐harmonic phase tuning in 0.18 μm BiCMOS

ABSTRACTA fully integrated 10.5‐GHz divide‐by‐3 (1/3) injection‐locked frequency divider (ILFD) that can provide extra locking range is presented. The ILFD consists of a previously measured on‐chip 10.5‐GHz voltage controlled oscillator (VCO) functioning as an injection source, a 1/3 ILFD core, and an output inverter buffer. A phase tuner implemented using an asymmetric inductor is proposed to increase the locking range through even‐harmonic phase tuning. With a fixed internal injection signal power of only −18 dBm, a 25% enhancement in the locking range from 12 to 15 MHz is achieved with the proposed phase tuning. The proposed even‐harmonic phase tuning can be used to provide extra locking range to those achieved by other techniques. The proposed integrated 1/3 ILFD has a frequency tuning range of 3.3–4.2 GHz. It is realized using a 0.18‐μm BiCMOS process, occupies 0.6 mm × 0.7 mm, and consumes 10.6 mA while the ILFD core alone only consumes 6.15 mA from 1.8‐V supply voltage. © 2014 Wiley Periodicals, Inc. Microwave Opt Technol Lett 56:2249–2252, 2014

A wide‐locking ÷3 BiCMOS injection‐locked frequency divider using internal feedback

ABSTRACTA wide locking range divide‐by‐3 injection‐locked frequency divider (ILFD) using a standard 0.18‐μm SiGe 3P6M BiCMOS process is presented. The ÷3 ILFD circuit is realized with an n‐core MOS LC‐tank oscillator. The ILFD uses a push‐push signal circuit and two linear mixers with one radio‐frequency injection input port and one push‐push signal input port. An HBT is used to amplify the push‐push signal and extend locking range. The core power consumption of the ILFD core is 13.2 mW at the drain‐source voltage of 0.8 V. The divider's free‐running frequency is tunable from 3.079 to 3.163 GHz and at the incident power of 0 dBm, the locking range is 19.28%, from 8.9 to 10.8 GHz. © 2014 Wiley Periodicals, Inc. Microwave Opt Technol Lett 56:493–497, 2014

A wide-locking range ÷3 injection-locked frequency divider using concurrent injection mechanisms

A new wide locking range divide-by-3 injection-locked frequency divider (ILFD) using a standard 0.18 μm CMOS process is presented. The ILFD uses two concurrent injection mechanisms with two independent push---push circuits to extend the locking range. It is realized with a cross-coupled n-core MOS LC-tank oscillator. The core power consumption of the ILFD core is 11.496 mW. The divider's free-running oscillation frequency is tunable from 4.32 to 3.78 GHz by tuning the varactor's control bias, and at the incident power of 0 dBm the maximum locking range is 3 GHz (25 %), from the incident frequency 10.5 to 13.5 GHz. The operation range is 3.6 GHz (30.76 %), from 9.9 to 13.5 GHz.

Wide-locking range ÷3 series-tuned injection-locked frequency divider

A new wide locking range series-tuned (ST) divide-by-3 injection-locked frequency divider (ILFD) using a standard 0.18 μm CMOS process is presented. The ÷3 ILFD circuit is realized with a ST cross-coupled n-core MOS LC-tank oscillator. Two direct-injection MOSFETs in series are used as a frequency doubler and a dynamic linear mixer to widen the locking range. The power consumption of the ILFD core is 10.56 mW. The divider's free-running frequency is tunable from 3.529 to 3.828 GHz by tuning the varactor's control bias, and at the incident power of 0 dBm the maximum locking range is 2.3 GHz (21.6 %), from the incident frequency 9.5 to 11.8 GHz. The operation range is 2.5 GHz (23.7 %), from 9.3 to 11.8 GHz.

Low-voltage wide-locking range LC-tank divide-by-3 injection-locked frequency divider

A low-voltage and wide-locking range divide-by-3 injection-locked frequency divider (ILFD) using a standard 90 nm complementary metal-oxide-silicon (CMOS) process is presented. The ÷3 ILFD circuit is realized with an n-core MOS LC-tank oscillator. The bodies of cross-coupled transistors are forward-biased using a rectified dc voltage for low-voltage operation. The core power consumption of the ILFD core is 3.45 mW at the drain-source voltage of 0.4 V. The divider's free-running frequency is tunable from 5.93 to 6.49 GHz and at the incident power of 0 dBm, the maximum locking range is 1.9 GHz (10.52%), from the incident frequency 17.1–19.0 GHz. The operation range is 3.6 GHz (19.04%), from 17.1 to 20.7 GHz.

SiGe 140 GHz ring-oscillator-based injection-locked frequency divider

Presented is a D-band divide-by-3 injection-locked frequency divider (ILFD) based on a ring oscillator in a 0.18 µm SiGe BiCMOS technology. The ILFD exhibits a locking range of 7.9 GHz (132.5–140.4 GHz) at an input signal power of −2 dBm, dissipating a total DC power of 71.2 mW. The ILFD core occupies an area of 0.0021 mm2.

Wide‐locking range ÷3 active‐inductor injection‐locked frequency divider using the push–push oscillator

AbstractA new wide locking range active‐inductor divide‐by‐3 injection‐locked frequency divider (ILFD) using a standard 0.18‐μm CMOS process is presented.The push–push ILFD circuit is realized with a push–push cross‐coupled n‐core MOS LC‐tank oscillator. The core power consumption of the ILFD core is 7.41 mW. The divider's free‐running frequency is tunable from 1.39 to 3.18 GHz by tuning the varactor's control bias, and at the incident power of 0 dBm the maximum locking range is 2.9 GHz (43.6%), from the incident frequency 5.2 to 8.1 GHz. The operation range is 5.9 GHz (80.27%), from 4.4 to 10.3 GHz. © 2011 Wiley Periodicals, Inc. Microwave Opt Technol Lett 53:2771–2773, 2011; View this article online at wileyonlinelibrary.com. DOI 10.1002/mop.26426

A 0.18.MU.m CMOS Wide-Band Injection-Locked Frequency Divider Using Push-Push Oscillator

A novel divide-by-3 injection-locked frequency divider (ILFD) is proposed. The ILFD circuit is realized with a cross-coupled n-core MOS LC-tank oscillator embedded with a push-push signal generator and two injection MOSFETs for coupling the injection signal into the resonator. The ILFD uses the linear mixer to extend the locking range and has been implemented in a standard 0.18µm CMOS process. The core power consumption of the ILFD core is 3.12mW. The divider's free-running frequency is tunable from 4.26GHz to 4.9GHz by tuning the varactor's control bias, and at the incident power of 0dBm the locking range of the ILFD used as a divide-by-3 divider is 1.5GHz, from 12.5GHz to 14.0GHz.

A Wide-Locking Range <formula formulatype="inline"> <tex Notation="TeX">${\div} 3$</tex></formula> Injection-Locked Frequency Divider Using Linear Mixer

A new low power wide locking range divide-by-3 injection-locked frequency divider (ILFD) using a standard 0.13 m CMOS process is presented. The push-push ILFD circuit is realized with a cross-coupled n-core MOS LC-tank oscillator with linear mixer to extend the locking range. The power consumption of the ILFD core is 2.05 mW. The divider's free-running frequency is tunable from 4.37 to 5.43 GHz by tuning the varactor's control bias, and at the incident power of 0 dBm the maximum locking range is 2.6 GHz (16.5%), from the incident frequency 14.5 to 17.1 GHz. The operation range is 5.1 GHz (35.1%), from 12.0 to 17.1 GHz.

Dual-Band CMOS Injection-Locked Frequency Divider with Variable Division Ratio

A dual band 0.18µm CMOS LC-tank injection locked frequency divider (ILFD) is proposed. The ILFD circuit is realized with a cross-coupled pMOS LC-tank oscillator with an inductor switch for frequency band selection. The self-oscillating VCO is injection-locked by nth-harmonic input to obtain the division factor of n. The division ratio of 1, 2, and 3 has been found for the proposed ILFD. Measurement results show that at the supply voltage of 1.1V, the free-running frequency is from 2.28(3.09)GHz to 2.78(3.72)GHz for the low- (high-) frequency band. The power consumption of the ILFD core is 3.7mW (6.2mW) at low (high) band. The total area including the output buffer and the pads is 0.841 × 0.764mm2.

A $W$-band Injection-Locked Frequency Divider Using GaAs pHEMTs and Cascode Circuit Topology

This study presents a W-band injection-locked frequency divider (ILFD) with a wide locking range characteristic by using 0.15 mum GaAs pHEMT techniques. Based on the cascode circuit topology, the oscillation and the injection parts can be designed individually without the trade-off between the input matching and the oscillation condition. Including with a characteristic of the active capacitance in this ILFD, a free-running oscillation frequency about 50 GHz was obtained with a frequency tuning function, in which the tuning range was about 1.2 GHz (50.5-49.3 GHz). By injecting a signal of around 100 GHz into this ILFD, the maximum locking range was measured up to 400 MHz, while the injected power was set to -5 dBm under a 3 V supply with a power consumption of 21 mW in the ILFD core.