Influence Of Parasitic Inductance Research Articles

A Miniaturized Wideband SIR Interdigital Bandpass Filter With High Performance Based on TSV Technology for W-Band Application

In this paper, an ultra-compact wideband stepped impedance resonators (SIR) interdigital bandpass filter (IBPF) is proposed based on through-silicon via (TSV) and three-dimensional integrated circuit (3D IC) technology. SIR structure can achieve higher coupling strength at a small impedance ratio. On this basis, the IBPF is designed by exploiting λ/4 SIR, the proposed filter is realized with compact size and far parasitic passband, and exhibits superior fractional bandwidth and out of band suppression characteristics. Based on the transformation of Chebyshev low-pass circuit model, a seventh-order IBPF centered at 98.5GHz is obtained. An improved method combining TSV technology with coupling coefficient method is proposed, which simplifies the design process and improves the influence of parasitic inductance on the design process. The fractional bandwidth (FBW) of SIR IBPF based on TSV is 40%, the insertion loss is less than 1.3dB, and a reflection of better than 30 dB in the passband. The size of the compact SIR IBPF is only 0.24×0.7mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> (0.28 × 0.79 λg <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> ).

Main Circuit Topology and Electromagnetic Interference of Electric Vehicle Bidirectional Charger

In order to improve the electromagnetic compatibility performance of electric vehicle bidirectional chargers, the authors propose a main circuit topology and electromagnetic interference of the electric vehicle bidirectional charger. The design adopts the parallel connection of silicon carbide (SiC) MOSFETs and completes the bidirectional charging system based on the cascade connection of dual active bridge (DAB) and three-phase four-wire inverter. This paper mainly analyzes the influence of parasitic inductance on the drive and power loop of the T0-247 packaged switch in actual use, and according to the operating characteristics of the system, different gate resistors are used to reduce switching losses and improve system efficiency. And, we explore on how to reduce the overshoot voltage through the RC absorption circuit, thereby reducing the conducted interference. The result shows the following: the primary side absorption circuit resistance is 470 Ω and the capacitor is 47 nf, the secondary side absorption circuit resistance is 40 Ω and the capacitance is 4.7 nf, and the circuit power is 5000 W. Under the same conditions, without adding the RC absorption circuit, the conducted interference on the AC side does not meet the standard, and the amount of disturbance is large. After adding a suitable RC absorption circuit, the conducted interference on the AC side reaches the required value. Conclusion. This research provides a systematic design scheme and optimization method for designing power electronic devices using SiC.

Shunted Josephson Junctions and Optimization of Niobium Integrated Matching Circuits

Josephson junctions (JJs) with non-hysteretic I-V characteristic and high critical parameters are required for many applications; in particular, they are needed to create tunable THz range oscillators. We fabricated and studied shunted superconductor-insulator-superconductor (SIS) Nb-AlO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">x</sub> -Nb tunnel junctions with an area of about 1μm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> , estimated their parameters, and compared them with theoretical models. To assess the performance of shunted junctions in the terahertz range, their characteristics were studied under the influence of a high-frequency signal; the estimated value of the characteristic voltage for the shunted junction at a high frequency is about 1 mV. To improve the circuit parameters, a new type of the shunting based on application of NIS junctions was proposed, which reduces the influence of parasitic inductance, expands the frequency range of the generator, and decreases the size of the structure. The JJs with a new type of shunting have been fabricated and studied. The niobium integrated circuits intended for matching the superconducting oscillator and an SIS junction as a microwave detector were designed, fabricated, and tested. Such structures are required for studying the spectral characteristics and analyzing the operation of the oscillator. The developed circuits have demonstrated efficient operation at frequencies from 300 to 700 GHz; the experimental results are in good agreement with the simulated characteristics. The results obtained will be implemented for further development of the THz range oscillators.

The decreasing of the influence of parasitic inductance of tested object on the accuracy of its electrical capacitance measurement

This paper gives a description of measurement technique which can be used in practice of carrying out estimation of electrical capacitance of tested object with substantial stray inductance. Electrical capacitance is determined as a ratio of mean value of discharge current to the mean value of time derivative, taken from voltage on unknown capacitance. The decreasing of deleterious impact of stray inductance on accuracy of measurements is achieved by proper selection of the duration of analyzed signals. In proposed technique the duration is limited by instants of time that correspond to the maximum value of discharge current and to the termination of transient. The accuracy of described method for electrical capacitance estimation is affected by noisy components of obtained oscillograms. This deleterious impact can be alleviated by smoothing of time dependence by applying of least square method. Another reason for lost of accuracy is associated with possible influence of skin-effect in conductive elements of discharge circuit, which can cause time dependence of resistance and inner inductance of conductive parts of tested object and discharge circuit. Described technique, however, is based on taking into consideration independent on time parameters of equivalent lamped discharge circuit. Nevertheless, the example of practical implementation has shown that described approach allows to partially mitigate the influence of stray inductance on carried out measurements of electrical capacitance, as the value of relative error turned out to be equal to 2.04%

The influence of stray inductance of storage capacitor and load capacitance on transients in high voltage facil-ities with pulse transformers

High voltage facilities based on gaining of voltage pulses by means of applying various types of pulse transformers are widely used in various engineering applications. Such high voltage facilities can be used for the elaboration of particle accelerators and in practice of forming pulses of high voltage for the purposes of electrical equipment testing. Technical characteristics of such high voltage facilities are significantly influenced by the technical characteristics of applied pulse transformer and, therefore, by the parameters of applied equivalent scheme of pulse transformer. Requirements to the obtained time dependencies of formed voltage pulses that arise in practice of testing high voltage insulation by applying pulses of high voltage demand to take into consideration the influence of parasitic parameters of equivalent scheme. This paper presents the results of consideration of the influence of parasitic inductances of storage capacitor and capacitance of tested object on currents in primary and secondary windings of pulse transformer. The influence of stray inductance on time dependence of voltage on load capacitance of tested object of control, as well as on time dependence of voltage on capacitance of storage capacitor is also considered. According to the results of carried out simulations, the inevitable parasitic inductance of tested object has more significant effect on time dependence of voltage on load capacitance than the parasitic inductance of storage capacitor.

Toward an In-Depth Understanding of the Commutation Processes in a SiC MOSFET Switching Cell Including Parasitic Elements

This article provides in-depth insight into the commutation processes of high-speed SiC <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">mosfet</small> s and investigates how they are influenced by various parasitic inductances. The switching dynamics of wide-bandgap power semiconductor devices are significantly larger compared to those of silicon devices. Therefore, the parasitic elements in the switching cell become increasingly important, as they limit the current and voltage slopes and cause oscillations. A thorough understanding of these effects is necessary for the design of highly efficient and integrated next-generation power electronic converters. However, the means of modeling hard-switched transitions, e.g., equivalent circuits, have not been adapted sufficiently compared to existing models on relatively slow-switching devices. This article presents the theory of commutation in high-speed semiconductor devices and outlines its key differences to traditional commutation models. These new insights are used to analyze the influence of parasitic inductances on the switching transitions. The theory is validated experimentally by double-pulse tests with variable parasitic inductances, performed on a test printed circuit board equipped with SiC <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">mosfet</small> s. The results are in good agreement with the theoretical findings.

Microwave Three-Dimensional Capacitive Stubs

Introduction. Microstrip filters are widely used in a variety of radio-electronic systems, including telecommunications. Low frequency filters (LPFs) are constructed on the basis of quasi-lumped inductances and capacitances. Quasi-lumped capacitances are performed as microstrip sections with a wide signal conductor or open stubs. Traditional quasi-lumped elements are two-dimensional (2D). Three-dimensional (3D) quasi-lumped elements have 1.5 to 4 times greater reactivity values. The purpose of the paper is to analyze 3D-stubs charateristics. Capacitive 3D-stub transfer characteristic. The 3D-stub is a deaf metalized hole. In the presented paper hole is a square with rounded corners. Dependencies of 1D-model parameters of 3D-stub are shown. From a comparison of 3D- and 1D-transfer characteristics of the 3D-stub it is shown that the 3D-stub in the first approximation can be simulated by a 1D-model in the form of a long line stub. Influence of parasitic inductance on stub notch frequency. For a 1D-model, the stub notch frequency is determined by a quarter-wave condition of it’s length. Stub’s T-junction brings in parasitic reactivities. The parasitic inductance and stub form a series oscillatory circuit. The resonance frequency of this circuit is equal to stub notch frequency. Since traditionally this inductance is negative, the notch frequency increases and stub and LPF transfer characteristics slope decreases. In order to reduce the inductance influence for stub and line contact it is suggested to use a small contact pad. 3D-stub notch frequency and parasitic inductance dependences. The dependences of the notch frequency and parasitic inductance on the 3D-stub heterogeneity depth and contact pad length are analyzed. According to simulation results for a variant with a contact pad inductance values can be not only negative, but also positive. If inductance is positive, notch frequency is less than according to quarter-wave condition. In this case, stub and LPF transfer characteristics slope is higher compared to quarter-wave condition. Discussion of the results. With an increase of the 3D-stub heterogeneity depth from 0.5 to 1 mm, its wave impedance is less in 1.4 ... 3.5 times compared to 2D-stub, and the capacity is greater in 1.6 ... 4.1 times. Contact pad between the stub and line allows to optimize the stub parameters from the condition of the required transfer characteristics slope. Conclusion. 3D-stub has significantly better parameters than 2D-stub. Since the LPF requires the specified capacitance values, depending on the 3D-stub inhomogeneity depth, the area of the 3D-stub is less than 1.6 ... 4.1 times. The 1D-model of the 3D-stub allows to characterize the stub by equivalent wave impedance and relative dielectric permittivity and can be used as the first approximation model for the design and simulating of microstrip LPFs based on capacitive 3D-stubs.

High Current Applications Issues in Designs of High Current Applications

This paper deals with design high current printed circuit boards (PCB), with the issues of implementation the power layer into standard PCB and influence of parasitic parameters of conductive traces of PCB. The parasitic parameters of conductive traces play a significant role in design of high current PCB, and therefore must be minimized. The technology of manufacturing PCB for high current designs as a compact device is mentioned in the paper. The quality of MOSFET switching power in high current design was compared in two ways of proposed leading power lines in order to demonstrate the influence of parasitic inductances of conductive traces.

Influence of Parasitic Inductances on Switching Performance of SiC MOSFET

Compared to the silicon power devices, silicon carbide device has shorter switch time. Hence, as a result of the faster transition of voltage (dv/dt) and current (di/dt) in SiC MOSFET, the influence of parasitic parameters on SiC MOSFET’s switching transient is more serious. This paper gives an experimental study of the influence of parasitic inductance on SiC MOSFET’s switching characteristics. Most significance parameters are the parasitic inductances of gate driver loop and power switching loop. These include the SiC MOSFET package’s parasitic inductance, interconnect inductance and the parasitic inductance of dc link PCB trace. This paper therefore focuses on analysis and comparison of different parasitic parameters under various operation conditions in terms of their effect on overvoltage, overcurrent and switching power loss.

Comprehensive Study of the Performance of SiC MOSFET-Based Automotive DC–DC Converter Under the Influence of Parasitic Inductance

With low loss, fast switching speed, and high-temperature capabilities, silicon carbide (SiC)-based devices are beneficial to automotive power converters in terms of efficiency increase and size reduction. Nevertheless, as a result of fast switching transitions and low on-state resistance of SiC devices, SiC-based converters are prone to overshoots and oscillations on switching waveforms, with the presence of parasitic inductances in the circuit. The overshoots and oscillations further contribute to increased converter loss and EMI emissions. This paper aims to study the influence of parasitic inductances on the performance of SiC MOSFETs for automotive dc–dc converters from the loss and electromagnetic interference perspective.

The influence of parasitic components on power MOSFET switching operation in power conversion circuits

This paper discusses the quantification of parasitic components inherent in printed circuit board (PCB) wiring, which can be of considerable value in power conversion circuits. The influence of parasitic inductance and mutual coupling are evaluated in terms of electromagnetic compatibility (EMC) for the switching operation of power MOSFETs in a dc-dc buck converter. The parasitic components are identified based on the partial element equivalent circuit (PEEC) method and modeled with circuit simulation. The estimated effect of the parasitic component on the switching operation of a power MOSFET is validated by comparing it with experimental results.

Influence of parasitic inductances on transient current sharing in parallel connected synchronous rectifiers and Schottky-barrier diodes

The transient current sharing in parallel connected Schottky-barrier diodes and MOSFET synchronous rectifiers is analysed. It is shown that, because of parasitic inductances the desired reduction of dead-time conducting losses and reverse-recovery peak current is limited, when discrete devices are used. The total amount of conducting losses in the free-wheeling circuit can increase. A reduction of switching losses in half-bridge configurations is possible because of secondary effects.

Equivalent Circuits of Unipolar Pulsed Plasma System for Electrical and Optical Signal Analysis

Matching of pulse plasma generators to various gas discharges for surface treatment of materials depends on plasma processing equipment. In order to investigate the influence of pulse plasma generator and gas discharge parameters on electrical signal waveforms during the process of unipolar pulse plasma nitriding, equivalent electrical circuit was introduced. The influence of parasitic inductance of interconnection lines and vacuum chamber physical properties was also included in the given equivalent circuit. Gas discharge characteristics at different process parameters were investigated. It was found that the gas discharge and pulse plasma generator properties, as well as the electrical characteristics of interconnecting lines determined the system electrical signal response. From the analysis of optical signals emitted by the gas discharge it was found that the optical signal response might be represented by a typical RC integrator circuit response with the time constant higher than that of the equivalent electrical circuit of generator load. The conclusion was drawn that the process of charge particles generation is followed by the process of active species generation responsible for thermo-chemical processes on the cathode surface. Thus, the increase of the pulse plasma frequency is limited by the thermo-chemical process efficiency, and not only by the generator switching characteristics or by gas discharge electrical properties.

Inductance-controlled electroabsorption Modulator modules using the flip-chip bonding technique

The wire-bonding technique is widely used for the connections between the electroabsorption (EA) modulator chips and the electrical signal transmission lines. However, the parasitic inductance of the bonding wire degrades the electrical characteristics of the EA modulator modules in a high-frequency region. In this paper, we theoretically analyze the influence of parasitic inductance on the base-band digital transmission and obtain the relationship between the EA modulator capacitance and the optimum lead inductance. For precise inductance control, we introduced the flip-chip bonding (FCB) technique and fabricated 40-Gb/s EA modulator modules.