In advanced semiconductor packaging, silicon wafers are typically thinned to tens of microns in thickness using ultra-precision grinding techniques, and the cutting speed greatly determines their surface integrity. However, an in-depth understanding of fundamental material removal mechanism considering the strain rate effect has not been revealed yet. This paper systematically explores the impact of cutting speed on the penetration depth, subsurface damage characteristics and scratch-induced stress field for monocrystal silicon material. First, nanoscratch tests in varied-load and constant-load modes are performed under different scratch speeds on the silicon specimen surface. The surface morphology of generated groove is observed to identify its brittle and plastic features. Next, the geometric relationship and contact pressure between the indenter and workpiece during the scratching process are analyzed. A theoretical penetration depth model is developed considering scratch speed, indenter tip radius and elastic recovery. The corresponding parameters are solved via the particle swarm optimization algorithm and agree very well with the experimental data. Then, the subsurface damage under different scratch speeds is measured by a transmission electron microscope. The atomic scale lattice defects are presented, involving the amorphous layer, stacking faults and phase transformation. Finally, a scratch-induced stress field model is established to interpret the distortion degree variation in damaged regions with scratch speed. The distribution of stress components in the scratch region is presented.
Read full abstract